OLD | NEW |
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/os.h" | 10 #include "vm/os.h" |
(...skipping 1828 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1839 __ ret(); | 1839 __ ret(); |
1840 } | 1840 } |
1841 | 1841 |
1842 | 1842 |
1843 ASSEMBLER_TEST_RUN(FldrdFstrdScaledReg, test) { | 1843 ASSEMBLER_TEST_RUN(FldrdFstrdScaledReg, test) { |
1844 typedef int (*SimpleCode)(); | 1844 typedef int (*SimpleCode)(); |
1845 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); | 1845 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
1846 } | 1846 } |
1847 | 1847 |
1848 | 1848 |
| 1849 ASSEMBLER_TEST_GENERATE(VinswVmovrs, assembler) { |
| 1850 __ LoadImmediate(R0, 42, kNoPP); |
| 1851 __ LoadImmediate(R1, 43, kNoPP); |
| 1852 __ LoadImmediate(R2, 44, kNoPP); |
| 1853 __ LoadImmediate(R3, 45, kNoPP); |
| 1854 |
| 1855 __ vinsw(V0, 0, R0); |
| 1856 __ vinsw(V0, 1, R1); |
| 1857 __ vinsw(V0, 2, R2); |
| 1858 __ vinsw(V0, 3, R3); |
| 1859 |
| 1860 __ vmovrs(R4, V0, 0); |
| 1861 __ vmovrs(R5, V0, 1); |
| 1862 __ vmovrs(R6, V0, 2); |
| 1863 __ vmovrs(R7, V0, 3); |
| 1864 |
| 1865 __ add(R0, R4, Operand(R5)); |
| 1866 __ add(R0, R0, Operand(R6)); |
| 1867 __ add(R0, R0, Operand(R7)); |
| 1868 __ ret(); |
| 1869 } |
| 1870 |
| 1871 |
| 1872 ASSEMBLER_TEST_RUN(VinswVmovrs, test) { |
| 1873 EXPECT(test != NULL); |
| 1874 typedef int (*Tst)(); |
| 1875 EXPECT_EQ(174, EXECUTE_TEST_CODE_INT64(Tst, test->entry())); |
| 1876 } |
| 1877 |
| 1878 |
| 1879 ASSEMBLER_TEST_GENERATE(VinsxVmovrd, assembler) { |
| 1880 __ LoadImmediate(R0, 42, kNoPP); |
| 1881 __ LoadImmediate(R1, 43, kNoPP); |
| 1882 |
| 1883 __ vinsx(V0, 0, R0); |
| 1884 __ vinsx(V0, 1, R1); |
| 1885 |
| 1886 __ vmovrd(R2, V0, 0); |
| 1887 __ vmovrd(R3, V0, 1); |
| 1888 |
| 1889 __ add(R0, R2, Operand(R3)); |
| 1890 __ ret(); |
| 1891 } |
| 1892 |
| 1893 |
| 1894 ASSEMBLER_TEST_RUN(VinsxVmovrd, test) { |
| 1895 EXPECT(test != NULL); |
| 1896 typedef int (*Tst)(); |
| 1897 EXPECT_EQ(85, EXECUTE_TEST_CODE_INT64(Tst, test->entry())); |
| 1898 } |
| 1899 |
| 1900 |
| 1901 ASSEMBLER_TEST_GENERATE(Vnot, assembler) { |
| 1902 __ LoadImmediate(R0, 0xfffffffe, kNoPP); |
| 1903 __ LoadImmediate(R1, 0xffffffff, kNoPP); |
| 1904 __ vinsw(V1, 0, R1); |
| 1905 __ vinsw(V1, 1, R0); |
| 1906 __ vinsw(V1, 2, R1); |
| 1907 __ vinsw(V1, 3, R0); |
| 1908 |
| 1909 __ vnot(V0, V1); |
| 1910 |
| 1911 __ vmovrs(R2, V0, 0); |
| 1912 __ vmovrs(R3, V0, 1); |
| 1913 __ vmovrs(R4, V0, 2); |
| 1914 __ vmovrs(R5, V0, 3); |
| 1915 __ add(R0, R2, Operand(R3)); |
| 1916 __ add(R0, R0, Operand(R4)); |
| 1917 __ add(R0, R0, Operand(R5)); |
| 1918 __ ret(); |
| 1919 } |
| 1920 |
| 1921 |
| 1922 ASSEMBLER_TEST_RUN(Vnot, test) { |
| 1923 EXPECT(test != NULL); |
| 1924 typedef int (*Tst)(); |
| 1925 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT64(Tst, test->entry())); |
| 1926 } |
| 1927 |
| 1928 |
| 1929 ASSEMBLER_TEST_GENERATE(Vabss, assembler) { |
| 1930 __ LoadDImmediate(V1, 21.0, kNoPP); |
| 1931 __ LoadDImmediate(V2, -21.0, kNoPP); |
| 1932 |
| 1933 __ fcvtsd(V1, V1); |
| 1934 __ fcvtsd(V2, V2); |
| 1935 |
| 1936 __ veor(V3, V3, V3); |
| 1937 __ vinss(V3, 1, V1, 0); |
| 1938 __ vinss(V3, 3, V2, 0); |
| 1939 |
| 1940 __ vabss(V4, V3); |
| 1941 |
| 1942 __ vinss(V5, 0, V4, 1); |
| 1943 __ vinss(V6, 0, V4, 3); |
| 1944 |
| 1945 __ fcvtds(V5, V5); |
| 1946 __ fcvtds(V6, V6); |
| 1947 |
| 1948 __ faddd(V0, V5, V6); |
| 1949 __ ret(); |
| 1950 } |
| 1951 |
| 1952 |
| 1953 ASSEMBLER_TEST_RUN(Vabss, test) { |
| 1954 typedef int (*SimpleCode)(); |
| 1955 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
| 1956 } |
| 1957 |
| 1958 |
| 1959 ASSEMBLER_TEST_GENERATE(Vabsd, assembler) { |
| 1960 __ LoadDImmediate(V1, 21.0, kNoPP); |
| 1961 __ LoadDImmediate(V2, -21.0, kNoPP); |
| 1962 |
| 1963 __ vinsd(V3, 0, V1, 0); |
| 1964 __ vinsd(V3, 1, V2, 0); |
| 1965 |
| 1966 __ vabsd(V4, V3); |
| 1967 |
| 1968 __ vinsd(V5, 0, V4, 0); |
| 1969 __ vinsd(V6, 0, V4, 1); |
| 1970 |
| 1971 __ faddd(V0, V5, V6); |
| 1972 __ ret(); |
| 1973 } |
| 1974 |
| 1975 |
| 1976 ASSEMBLER_TEST_RUN(Vabsd, test) { |
| 1977 typedef int (*SimpleCode)(); |
| 1978 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
| 1979 } |
| 1980 |
| 1981 |
| 1982 ASSEMBLER_TEST_GENERATE(Vnegs, assembler) { |
| 1983 __ LoadDImmediate(V1, 42.0, kNoPP); |
| 1984 __ LoadDImmediate(V2, -84.0, kNoPP); |
| 1985 |
| 1986 __ fcvtsd(V1, V1); |
| 1987 __ fcvtsd(V2, V2); |
| 1988 |
| 1989 __ veor(V3, V3, V3); |
| 1990 __ vinss(V3, 1, V1, 0); |
| 1991 __ vinss(V3, 3, V2, 0); |
| 1992 |
| 1993 __ vnegs(V4, V3); |
| 1994 |
| 1995 __ vinss(V5, 0, V4, 1); |
| 1996 __ vinss(V6, 0, V4, 3); |
| 1997 |
| 1998 __ fcvtds(V5, V5); |
| 1999 __ fcvtds(V6, V6); |
| 2000 __ faddd(V0, V5, V6); |
| 2001 __ ret(); |
| 2002 } |
| 2003 |
| 2004 |
| 2005 ASSEMBLER_TEST_RUN(Vnegs, test) { |
| 2006 typedef int (*SimpleCode)(); |
| 2007 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
| 2008 } |
| 2009 |
| 2010 |
| 2011 ASSEMBLER_TEST_GENERATE(Vnegd, assembler) { |
| 2012 __ LoadDImmediate(V1, 42.0, kNoPP); |
| 2013 __ LoadDImmediate(V2, -84.0, kNoPP); |
| 2014 |
| 2015 __ vinsd(V3, 0, V1, 0); |
| 2016 __ vinsd(V3, 1, V2, 0); |
| 2017 |
| 2018 __ vnegd(V4, V3); |
| 2019 |
| 2020 __ vinsd(V5, 0, V4, 0); |
| 2021 __ vinsd(V6, 0, V4, 1); |
| 2022 |
| 2023 __ faddd(V0, V5, V6); |
| 2024 __ ret(); |
| 2025 } |
| 2026 |
| 2027 |
| 2028 ASSEMBLER_TEST_RUN(Vnegd, test) { |
| 2029 typedef int (*SimpleCode)(); |
| 2030 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
| 2031 } |
| 2032 |
| 2033 |
1849 ASSEMBLER_TEST_GENERATE(Vadds, assembler) { | 2034 ASSEMBLER_TEST_GENERATE(Vadds, assembler) { |
1850 __ LoadDImmediate(V0, 0.0, kNoPP); | 2035 __ LoadDImmediate(V0, 0.0, kNoPP); |
1851 __ LoadDImmediate(V1, 1.0, kNoPP); | 2036 __ LoadDImmediate(V1, 1.0, kNoPP); |
1852 __ LoadDImmediate(V2, 2.0, kNoPP); | 2037 __ LoadDImmediate(V2, 2.0, kNoPP); |
1853 __ LoadDImmediate(V3, 3.0, kNoPP); | 2038 __ LoadDImmediate(V3, 3.0, kNoPP); |
1854 | 2039 |
1855 __ fcvtsd(V0, V0); | 2040 __ fcvtsd(V0, V0); |
1856 __ fcvtsd(V1, V1); | 2041 __ fcvtsd(V1, V1); |
1857 __ fcvtsd(V2, V2); | 2042 __ fcvtsd(V2, V2); |
1858 __ fcvtsd(V3, V3); | 2043 __ fcvtsd(V3, V3); |
1859 | 2044 |
1860 const int sword_bytes = 1 << Log2OperandSizeBytes(kSWord); | 2045 __ vinss(V4, 0, V0, 0); |
1861 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2046 __ vinss(V4, 1, V1, 0); |
1862 __ fstrs(V0, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2047 __ vinss(V4, 2, V2, 0); |
1863 __ fstrs(V1, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2048 __ vinss(V4, 3, V3, 0); |
1864 __ fstrs(V2, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
1865 __ fstrs(V3, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
1866 | 2049 |
1867 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
1868 __ vadds(V5, V4, V4); | 2050 __ vadds(V5, V4, V4); |
1869 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
1870 | 2051 |
1871 __ fldrs(V0, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2052 __ vinss(V0, 0, V5, 0); |
1872 __ fldrs(V1, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2053 __ vinss(V1, 0, V5, 1); |
1873 __ fldrs(V2, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2054 __ vinss(V2, 0, V5, 2); |
1874 __ fldrs(V3, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2055 __ vinss(V3, 0, V5, 3); |
1875 | 2056 |
1876 __ fcvtds(V0, V0); | 2057 __ fcvtds(V0, V0); |
1877 __ fcvtds(V1, V1); | 2058 __ fcvtds(V1, V1); |
1878 __ fcvtds(V2, V2); | 2059 __ fcvtds(V2, V2); |
1879 __ fcvtds(V3, V3); | 2060 __ fcvtds(V3, V3); |
1880 | 2061 |
1881 __ faddd(V0, V0, V1); | 2062 __ faddd(V0, V0, V1); |
1882 __ faddd(V0, V0, V2); | 2063 __ faddd(V0, V0, V2); |
1883 __ faddd(V0, V0, V3); | 2064 __ faddd(V0, V0, V3); |
1884 __ ret(); | 2065 __ ret(); |
(...skipping 11 matching lines...) Expand all Loading... |
1896 __ LoadDImmediate(V1, 1.0, kNoPP); | 2077 __ LoadDImmediate(V1, 1.0, kNoPP); |
1897 __ LoadDImmediate(V2, 2.0, kNoPP); | 2078 __ LoadDImmediate(V2, 2.0, kNoPP); |
1898 __ LoadDImmediate(V3, 3.0, kNoPP); | 2079 __ LoadDImmediate(V3, 3.0, kNoPP); |
1899 __ LoadDImmediate(V5, 0.0, kNoPP); | 2080 __ LoadDImmediate(V5, 0.0, kNoPP); |
1900 | 2081 |
1901 __ fcvtsd(V0, V0); | 2082 __ fcvtsd(V0, V0); |
1902 __ fcvtsd(V1, V1); | 2083 __ fcvtsd(V1, V1); |
1903 __ fcvtsd(V2, V2); | 2084 __ fcvtsd(V2, V2); |
1904 __ fcvtsd(V3, V3); | 2085 __ fcvtsd(V3, V3); |
1905 | 2086 |
1906 const int sword_bytes = 1 << Log2OperandSizeBytes(kSWord); | 2087 __ vinss(V4, 0, V0, 0); |
1907 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2088 __ vinss(V4, 1, V1, 0); |
1908 __ fstrs(V0, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2089 __ vinss(V4, 2, V2, 0); |
1909 __ fstrs(V1, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2090 __ vinss(V4, 3, V3, 0); |
1910 __ fstrs(V2, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
1911 __ fstrs(V3, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
1912 | 2091 |
1913 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
1914 __ vsubs(V5, V5, V4); | 2092 __ vsubs(V5, V5, V4); |
1915 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
1916 | 2093 |
1917 __ fldrs(V0, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2094 __ vinss(V0, 0, V5, 0); |
1918 __ fldrs(V1, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2095 __ vinss(V1, 0, V5, 1); |
1919 __ fldrs(V2, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2096 __ vinss(V2, 0, V5, 2); |
1920 __ fldrs(V3, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2097 __ vinss(V3, 0, V5, 3); |
1921 | 2098 |
1922 __ fcvtds(V0, V0); | 2099 __ fcvtds(V0, V0); |
1923 __ fcvtds(V1, V1); | 2100 __ fcvtds(V1, V1); |
1924 __ fcvtds(V2, V2); | 2101 __ fcvtds(V2, V2); |
1925 __ fcvtds(V3, V3); | 2102 __ fcvtds(V3, V3); |
1926 | 2103 |
1927 __ faddd(V0, V0, V1); | 2104 __ faddd(V0, V0, V1); |
1928 __ faddd(V0, V0, V2); | 2105 __ faddd(V0, V0, V2); |
1929 __ faddd(V0, V0, V3); | 2106 __ faddd(V0, V0, V3); |
1930 __ ret(); | 2107 __ ret(); |
(...skipping 10 matching lines...) Expand all Loading... |
1941 __ LoadDImmediate(V0, 0.0, kNoPP); | 2118 __ LoadDImmediate(V0, 0.0, kNoPP); |
1942 __ LoadDImmediate(V1, 1.0, kNoPP); | 2119 __ LoadDImmediate(V1, 1.0, kNoPP); |
1943 __ LoadDImmediate(V2, 2.0, kNoPP); | 2120 __ LoadDImmediate(V2, 2.0, kNoPP); |
1944 __ LoadDImmediate(V3, 3.0, kNoPP); | 2121 __ LoadDImmediate(V3, 3.0, kNoPP); |
1945 | 2122 |
1946 __ fcvtsd(V0, V0); | 2123 __ fcvtsd(V0, V0); |
1947 __ fcvtsd(V1, V1); | 2124 __ fcvtsd(V1, V1); |
1948 __ fcvtsd(V2, V2); | 2125 __ fcvtsd(V2, V2); |
1949 __ fcvtsd(V3, V3); | 2126 __ fcvtsd(V3, V3); |
1950 | 2127 |
1951 const int sword_bytes = 1 << Log2OperandSizeBytes(kSWord); | 2128 __ vinss(V4, 0, V0, 0); |
1952 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2129 __ vinss(V4, 1, V1, 0); |
1953 __ fstrs(V0, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2130 __ vinss(V4, 2, V2, 0); |
1954 __ fstrs(V1, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2131 __ vinss(V4, 3, V3, 0); |
1955 __ fstrs(V2, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
1956 __ fstrs(V3, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
1957 | 2132 |
1958 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
1959 __ vmuls(V5, V4, V4); | 2133 __ vmuls(V5, V4, V4); |
1960 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
1961 | 2134 |
1962 __ fldrs(V0, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2135 __ vinss(V0, 0, V5, 0); |
1963 __ fldrs(V1, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2136 __ vinss(V1, 0, V5, 1); |
1964 __ fldrs(V2, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2137 __ vinss(V2, 0, V5, 2); |
1965 __ fldrs(V3, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2138 __ vinss(V3, 0, V5, 3); |
1966 | 2139 |
1967 __ fcvtds(V0, V0); | 2140 __ fcvtds(V0, V0); |
1968 __ fcvtds(V1, V1); | 2141 __ fcvtds(V1, V1); |
1969 __ fcvtds(V2, V2); | 2142 __ fcvtds(V2, V2); |
1970 __ fcvtds(V3, V3); | 2143 __ fcvtds(V3, V3); |
1971 | 2144 |
1972 __ faddd(V0, V0, V1); | 2145 __ faddd(V0, V0, V1); |
1973 __ faddd(V0, V0, V2); | 2146 __ faddd(V0, V0, V2); |
1974 __ faddd(V0, V0, V3); | 2147 __ faddd(V0, V0, V3); |
1975 __ ret(); | 2148 __ ret(); |
(...skipping 10 matching lines...) Expand all Loading... |
1986 __ LoadDImmediate(V0, 0.0, kNoPP); | 2159 __ LoadDImmediate(V0, 0.0, kNoPP); |
1987 __ LoadDImmediate(V1, 1.0, kNoPP); | 2160 __ LoadDImmediate(V1, 1.0, kNoPP); |
1988 __ LoadDImmediate(V2, 2.0, kNoPP); | 2161 __ LoadDImmediate(V2, 2.0, kNoPP); |
1989 __ LoadDImmediate(V3, 3.0, kNoPP); | 2162 __ LoadDImmediate(V3, 3.0, kNoPP); |
1990 | 2163 |
1991 __ fcvtsd(V0, V0); | 2164 __ fcvtsd(V0, V0); |
1992 __ fcvtsd(V1, V1); | 2165 __ fcvtsd(V1, V1); |
1993 __ fcvtsd(V2, V2); | 2166 __ fcvtsd(V2, V2); |
1994 __ fcvtsd(V3, V3); | 2167 __ fcvtsd(V3, V3); |
1995 | 2168 |
1996 const int sword_bytes = 1 << Log2OperandSizeBytes(kSWord); | 2169 __ vinss(V4, 0, V0, 0); |
1997 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2170 __ vinss(V4, 1, V1, 0); |
1998 __ fstrs(V0, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2171 __ vinss(V4, 2, V2, 0); |
1999 __ fstrs(V1, Address(SP, -1 * sword_bytes, Address::PreIndex)); | 2172 __ vinss(V4, 3, V3, 0); |
2000 __ fstrs(V2, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
2001 __ fstrs(V3, Address(SP, -1 * sword_bytes, Address::PreIndex)); | |
2002 | 2173 |
2003 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
2004 __ vdivs(V5, V4, V4); | 2174 __ vdivs(V5, V4, V4); |
2005 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
2006 | 2175 |
2007 __ fldrs(V3, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2176 __ vinss(V0, 0, V5, 0); |
2008 __ fldrs(V2, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2177 __ vinss(V1, 0, V5, 1); |
2009 __ fldrs(V1, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2178 __ vinss(V2, 0, V5, 2); |
2010 __ fldrs(V0, Address(SP, 1 * sword_bytes, Address::PostIndex)); | 2179 __ vinss(V3, 0, V5, 3); |
2011 | 2180 |
2012 __ fcvtds(V0, V0); | 2181 __ fcvtds(V0, V0); |
2013 __ fcvtds(V1, V1); | 2182 __ fcvtds(V1, V1); |
2014 __ fcvtds(V2, V2); | 2183 __ fcvtds(V2, V2); |
2015 __ fcvtds(V3, V3); | 2184 __ fcvtds(V3, V3); |
2016 | 2185 |
2017 __ faddd(V0, V1, V1); | 2186 __ faddd(V0, V1, V1); |
2018 __ faddd(V0, V0, V2); | 2187 __ faddd(V0, V0, V2); |
2019 __ faddd(V0, V0, V3); | 2188 __ faddd(V0, V0, V3); |
2020 __ ret(); | 2189 __ ret(); |
2021 } | 2190 } |
2022 | 2191 |
2023 | 2192 |
2024 ASSEMBLER_TEST_RUN(Vdivs, test) { | 2193 ASSEMBLER_TEST_RUN(Vdivs, test) { |
2025 typedef int (*SimpleCode)(); | 2194 typedef int (*SimpleCode)(); |
2026 EXPECT_EQ(4.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); | 2195 EXPECT_EQ(4.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
2027 } | 2196 } |
2028 | 2197 |
2029 | 2198 |
2030 | |
2031 ASSEMBLER_TEST_GENERATE(Vaddd, assembler) { | 2199 ASSEMBLER_TEST_GENERATE(Vaddd, assembler) { |
2032 __ LoadDImmediate(V0, 2.0, kNoPP); | 2200 __ LoadDImmediate(V0, 2.0, kNoPP); |
2033 __ LoadDImmediate(V1, 3.0, kNoPP); | 2201 __ LoadDImmediate(V1, 3.0, kNoPP); |
2034 | 2202 |
2035 const int dword_bytes = 1 << Log2OperandSizeBytes(kDWord); | 2203 __ vinsd(V4, 0, V0, 0); |
2036 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2204 __ vinsd(V4, 1, V1, 0); |
2037 __ fstrd(V0, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2038 __ fstrd(V1, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2039 | 2205 |
2040 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
2041 __ vaddd(V5, V4, V4); | 2206 __ vaddd(V5, V4, V4); |
2042 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
2043 | 2207 |
2044 __ fldrd(V1, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2208 __ vinsd(V0, 0, V5, 0); |
2045 __ fldrd(V0, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2209 __ vinsd(V1, 0, V5, 1); |
2046 | 2210 |
2047 __ faddd(V0, V0, V1); | 2211 __ faddd(V0, V0, V1); |
2048 __ ret(); | 2212 __ ret(); |
2049 } | 2213 } |
2050 | 2214 |
2051 | 2215 |
2052 ASSEMBLER_TEST_RUN(Vaddd, test) { | 2216 ASSEMBLER_TEST_RUN(Vaddd, test) { |
2053 typedef int (*SimpleCode)(); | 2217 typedef int (*SimpleCode)(); |
2054 EXPECT_EQ(10.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); | 2218 EXPECT_EQ(10.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
2055 } | 2219 } |
2056 | 2220 |
2057 | 2221 |
2058 ASSEMBLER_TEST_GENERATE(Vsubd, assembler) { | 2222 ASSEMBLER_TEST_GENERATE(Vsubd, assembler) { |
2059 __ LoadDImmediate(V0, 2.0, kNoPP); | 2223 __ LoadDImmediate(V0, 2.0, kNoPP); |
2060 __ LoadDImmediate(V1, 3.0, kNoPP); | 2224 __ LoadDImmediate(V1, 3.0, kNoPP); |
2061 __ LoadDImmediate(V5, 0.0, kNoPP); | 2225 __ LoadDImmediate(V5, 0.0, kNoPP); |
2062 | 2226 |
2063 const int dword_bytes = 1 << Log2OperandSizeBytes(kDWord); | 2227 __ vinsd(V4, 0, V0, 0); |
2064 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2228 __ vinsd(V4, 1, V1, 0); |
2065 __ fstrd(V0, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2066 __ fstrd(V1, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2067 | 2229 |
2068 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
2069 __ vsubd(V5, V5, V4); | 2230 __ vsubd(V5, V5, V4); |
2070 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
2071 | 2231 |
2072 __ fldrd(V1, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2232 __ vinsd(V0, 0, V5, 0); |
2073 __ fldrd(V0, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2233 __ vinsd(V1, 0, V5, 1); |
2074 | 2234 |
2075 __ faddd(V0, V0, V1); | 2235 __ faddd(V0, V0, V1); |
2076 __ ret(); | 2236 __ ret(); |
2077 } | 2237 } |
2078 | 2238 |
2079 | 2239 |
2080 ASSEMBLER_TEST_RUN(Vsubd, test) { | 2240 ASSEMBLER_TEST_RUN(Vsubd, test) { |
2081 typedef int (*SimpleCode)(); | 2241 typedef int (*SimpleCode)(); |
2082 EXPECT_EQ(-5.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); | 2242 EXPECT_EQ(-5.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
2083 } | 2243 } |
2084 | 2244 |
2085 | 2245 |
2086 ASSEMBLER_TEST_GENERATE(Vmuld, assembler) { | 2246 ASSEMBLER_TEST_GENERATE(Vmuld, assembler) { |
2087 __ LoadDImmediate(V0, 2.0, kNoPP); | 2247 __ LoadDImmediate(V0, 2.0, kNoPP); |
2088 __ LoadDImmediate(V1, 3.0, kNoPP); | 2248 __ LoadDImmediate(V1, 3.0, kNoPP); |
2089 | 2249 |
2090 const int dword_bytes = 1 << Log2OperandSizeBytes(kDWord); | 2250 __ vinsd(V4, 0, V0, 0); |
2091 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2251 __ vinsd(V4, 1, V1, 0); |
2092 __ fstrd(V0, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2093 __ fstrd(V1, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2094 | 2252 |
2095 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
2096 __ vmuld(V5, V4, V4); | 2253 __ vmuld(V5, V4, V4); |
2097 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
2098 | 2254 |
2099 __ fldrd(V1, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2255 __ vinsd(V0, 0, V5, 0); |
2100 __ fldrd(V0, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2256 __ vinsd(V1, 0, V5, 1); |
2101 | 2257 |
2102 __ faddd(V0, V0, V1); | 2258 __ faddd(V0, V0, V1); |
2103 __ ret(); | 2259 __ ret(); |
2104 } | 2260 } |
2105 | 2261 |
2106 | 2262 |
2107 ASSEMBLER_TEST_RUN(Vmuld, test) { | 2263 ASSEMBLER_TEST_RUN(Vmuld, test) { |
2108 typedef int (*SimpleCode)(); | 2264 typedef int (*SimpleCode)(); |
2109 EXPECT_EQ(13.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); | 2265 EXPECT_EQ(13.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
2110 } | 2266 } |
2111 | 2267 |
2112 | 2268 |
2113 ASSEMBLER_TEST_GENERATE(Vdivd, assembler) { | 2269 ASSEMBLER_TEST_GENERATE(Vdivd, assembler) { |
2114 __ LoadDImmediate(V0, 2.0, kNoPP); | 2270 __ LoadDImmediate(V0, 2.0, kNoPP); |
2115 __ LoadDImmediate(V1, 3.0, kNoPP); | 2271 __ LoadDImmediate(V1, 3.0, kNoPP); |
2116 | 2272 |
2117 const int dword_bytes = 1 << Log2OperandSizeBytes(kDWord); | 2273 __ vinsd(V4, 0, V0, 0); |
2118 const int qword_bytes = 1 << Log2OperandSizeBytes(kQWord); | 2274 __ vinsd(V4, 1, V1, 0); |
2119 __ fstrd(V0, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2120 __ fstrd(V1, Address(SP, -1 * dword_bytes, Address::PreIndex)); | |
2121 | 2275 |
2122 __ fldrq(V4, Address(SP, 1 * qword_bytes, Address::PostIndex)); | |
2123 __ vdivd(V5, V4, V4); | 2276 __ vdivd(V5, V4, V4); |
2124 __ fstrq(V5, Address(SP, -1 * qword_bytes, Address::PreIndex)); | |
2125 | 2277 |
2126 __ fldrd(V1, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2278 __ vinsd(V0, 0, V5, 0); |
2127 __ fldrd(V0, Address(SP, 1 * dword_bytes, Address::PostIndex)); | 2279 __ vinsd(V1, 0, V5, 1); |
2128 | 2280 |
2129 __ faddd(V0, V0, V1); | 2281 __ faddd(V0, V0, V1); |
2130 __ ret(); | 2282 __ ret(); |
2131 } | 2283 } |
2132 | 2284 |
2133 | 2285 |
2134 ASSEMBLER_TEST_RUN(Vdivd, test) { | 2286 ASSEMBLER_TEST_RUN(Vdivd, test) { |
2135 typedef int (*SimpleCode)(); | 2287 typedef int (*SimpleCode)(); |
2136 EXPECT_EQ(2.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); | 2288 EXPECT_EQ(2.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
2137 } | 2289 } |
(...skipping 102 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2240 __ ret(); | 2392 __ ret(); |
2241 } | 2393 } |
2242 | 2394 |
2243 | 2395 |
2244 ASSEMBLER_TEST_RUN(Vinss, test) { | 2396 ASSEMBLER_TEST_RUN(Vinss, test) { |
2245 typedef int (*SimpleCode)(); | 2397 typedef int (*SimpleCode)(); |
2246 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); | 2398 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
2247 } | 2399 } |
2248 | 2400 |
2249 | 2401 |
| 2402 ASSEMBLER_TEST_GENERATE(Vand, assembler) { |
| 2403 __ LoadDImmediate(V1, 21.0, kNoPP); |
| 2404 __ LoadImmediate(R0, 0xffffffff, kNoPP); |
| 2405 |
| 2406 // V0 <- (0, 0xffffffff, 0, 0xffffffff) |
| 2407 __ fmovdr(V0, R0); |
| 2408 __ vinss(V0, 2, V0, 0); |
| 2409 |
| 2410 // V1 <- (21.0, 21.0, 21.0, 21.0) |
| 2411 __ fcvtsd(V1, V1); |
| 2412 __ vdups(V1, V1, 0); |
| 2413 |
| 2414 __ vand(V2, V1, V0); |
| 2415 |
| 2416 __ vinss(V3, 0, V2, 0); |
| 2417 __ vinss(V4, 0, V2, 1); |
| 2418 __ vinss(V5, 0, V2, 2); |
| 2419 __ vinss(V6, 0, V2, 3); |
| 2420 |
| 2421 __ fcvtds(V3, V3); |
| 2422 __ fcvtds(V4, V4); |
| 2423 __ fcvtds(V5, V5); |
| 2424 __ fcvtds(V6, V6); |
| 2425 |
| 2426 __ vaddd(V0, V3, V4); |
| 2427 __ vaddd(V0, V0, V5); |
| 2428 __ vaddd(V0, V0, V6); |
| 2429 __ ret(); |
| 2430 } |
| 2431 |
| 2432 |
| 2433 ASSEMBLER_TEST_RUN(Vand, test) { |
| 2434 typedef int (*SimpleCode)(); |
| 2435 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
| 2436 } |
| 2437 |
| 2438 |
| 2439 ASSEMBLER_TEST_GENERATE(Vorr, assembler) { |
| 2440 __ LoadDImmediate(V1, 10.5, kNoPP); |
| 2441 __ fcvtsd(V1, V1); |
| 2442 |
| 2443 // V0 <- (0, 10.5, 0, 10.5) |
| 2444 __ fmovdd(V0, V1); |
| 2445 __ vinss(V0, 2, V0, 0); |
| 2446 |
| 2447 // V1 <- (10.5, 0, 10.5, 0) |
| 2448 __ veor(V1, V1, V1); |
| 2449 __ vinss(V1, 1, V0, 0); |
| 2450 __ vinss(V1, 3, V0, 0); |
| 2451 |
| 2452 __ vorr(V2, V1, V0); |
| 2453 |
| 2454 __ vinss(V3, 0, V2, 0); |
| 2455 __ vinss(V4, 0, V2, 1); |
| 2456 __ vinss(V5, 0, V2, 2); |
| 2457 __ vinss(V6, 0, V2, 3); |
| 2458 |
| 2459 __ fcvtds(V3, V3); |
| 2460 __ fcvtds(V4, V4); |
| 2461 __ fcvtds(V5, V5); |
| 2462 __ fcvtds(V6, V6); |
| 2463 |
| 2464 __ vaddd(V0, V3, V4); |
| 2465 __ vaddd(V0, V0, V5); |
| 2466 __ vaddd(V0, V0, V6); |
| 2467 __ ret(); |
| 2468 } |
| 2469 |
| 2470 |
| 2471 ASSEMBLER_TEST_RUN(Vorr, test) { |
| 2472 typedef int (*SimpleCode)(); |
| 2473 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); |
| 2474 } |
| 2475 |
| 2476 |
| 2477 ASSEMBLER_TEST_GENERATE(Veor, assembler) { |
| 2478 __ LoadImmediate(R1, 0xffffffff, kNoPP); |
| 2479 __ LoadImmediate(R2, ~21, kNoPP); |
| 2480 |
| 2481 __ vinsw(V1, 0, R1); |
| 2482 __ vinsw(V1, 1, R2); |
| 2483 __ vinsw(V1, 2, R1); |
| 2484 __ vinsw(V1, 3, R2); |
| 2485 |
| 2486 __ vinsw(V2, 0, R1); |
| 2487 __ vinsw(V2, 1, R1); |
| 2488 __ vinsw(V2, 2, R1); |
| 2489 __ vinsw(V2, 3, R1); |
| 2490 |
| 2491 __ veor(V0, V1, V2); |
| 2492 |
| 2493 __ vmovrs(R3, V0, 0); |
| 2494 __ vmovrs(R4, V0, 1); |
| 2495 __ vmovrs(R5, V0, 2); |
| 2496 __ vmovrs(R6, V0, 3); |
| 2497 |
| 2498 __ add(R0, R3, Operand(R4)); |
| 2499 __ add(R0, R0, Operand(R5)); |
| 2500 __ add(R0, R0, Operand(R6)); |
| 2501 __ ret(); |
| 2502 } |
| 2503 |
| 2504 |
| 2505 ASSEMBLER_TEST_RUN(Veor, test) { |
| 2506 typedef int (*SimpleCode)(); |
| 2507 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(SimpleCode, test->entry())); |
| 2508 } |
| 2509 |
| 2510 |
| 2511 ASSEMBLER_TEST_GENERATE(Vaddw, assembler) { |
| 2512 __ LoadImmediate(R4, 21, kNoPP); |
| 2513 |
| 2514 __ vdupw(V1, R4); |
| 2515 __ vdupw(V2, R4); |
| 2516 |
| 2517 __ vaddw(V0, V1, V2); |
| 2518 |
| 2519 __ vmovrs(R0, V0, 0); |
| 2520 __ vmovrs(R1, V0, 1); |
| 2521 __ vmovrs(R2, V0, 2); |
| 2522 __ vmovrs(R3, V0, 3); |
| 2523 __ add(R0, R0, Operand(R1)); |
| 2524 __ add(R0, R0, Operand(R2)); |
| 2525 __ add(R0, R0, Operand(R3)); |
| 2526 __ ret(); |
| 2527 } |
| 2528 |
| 2529 |
| 2530 ASSEMBLER_TEST_RUN(Vaddw, test) { |
| 2531 typedef int (*SimpleCode)(); |
| 2532 EXPECT_EQ(168, EXECUTE_TEST_CODE_INT64(SimpleCode, test->entry())); |
| 2533 } |
| 2534 |
| 2535 |
| 2536 ASSEMBLER_TEST_GENERATE(Vsubw, assembler) { |
| 2537 __ LoadImmediate(R4, 31, kNoPP); |
| 2538 __ LoadImmediate(R5, 10, kNoPP); |
| 2539 |
| 2540 __ vdupw(V1, R4); |
| 2541 __ vdupw(V2, R5); |
| 2542 |
| 2543 __ vsubw(V0, V1, V2); |
| 2544 |
| 2545 __ vmovrs(R0, V0, 0); |
| 2546 __ vmovrs(R1, V0, 1); |
| 2547 __ vmovrs(R2, V0, 2); |
| 2548 __ vmovrs(R3, V0, 3); |
| 2549 __ add(R0, R0, Operand(R1)); |
| 2550 __ add(R0, R0, Operand(R2)); |
| 2551 __ add(R0, R0, Operand(R3)); |
| 2552 __ ret(); |
| 2553 } |
| 2554 |
| 2555 |
| 2556 ASSEMBLER_TEST_RUN(Vsubw, test) { |
| 2557 typedef int (*SimpleCode)(); |
| 2558 EXPECT_EQ(84, EXECUTE_TEST_CODE_INT64(SimpleCode, test->entry())); |
| 2559 } |
| 2560 |
| 2561 |
| 2562 ASSEMBLER_TEST_GENERATE(Vaddx, assembler) { |
| 2563 __ LoadImmediate(R4, 21, kNoPP); |
| 2564 |
| 2565 __ vdupx(V1, R4); |
| 2566 __ vdupx(V2, R4); |
| 2567 |
| 2568 __ vaddx(V0, V1, V2); |
| 2569 |
| 2570 __ vmovrd(R0, V0, 0); |
| 2571 __ vmovrd(R1, V0, 1); |
| 2572 __ add(R0, R0, Operand(R1)); |
| 2573 __ ret(); |
| 2574 } |
| 2575 |
| 2576 |
| 2577 ASSEMBLER_TEST_RUN(Vaddx, test) { |
| 2578 typedef int (*SimpleCode)(); |
| 2579 EXPECT_EQ(84, EXECUTE_TEST_CODE_INT64(SimpleCode, test->entry())); |
| 2580 } |
| 2581 |
| 2582 |
| 2583 ASSEMBLER_TEST_GENERATE(Vsubx, assembler) { |
| 2584 __ LoadImmediate(R4, 31, kNoPP); |
| 2585 __ LoadImmediate(R5, 10, kNoPP); |
| 2586 |
| 2587 __ vdupx(V1, R4); |
| 2588 __ vdupx(V2, R5); |
| 2589 |
| 2590 __ vsubx(V0, V1, V2); |
| 2591 |
| 2592 __ vmovrd(R0, V0, 0); |
| 2593 __ vmovrd(R1, V0, 1); |
| 2594 __ add(R0, R0, Operand(R1)); |
| 2595 __ ret(); |
| 2596 } |
| 2597 |
| 2598 |
| 2599 ASSEMBLER_TEST_RUN(Vsubx, test) { |
| 2600 typedef int (*SimpleCode)(); |
| 2601 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(SimpleCode, test->entry())); |
| 2602 } |
| 2603 |
| 2604 |
2250 // Called from assembler_test.cc. | 2605 // Called from assembler_test.cc. |
2251 // LR: return address. | 2606 // LR: return address. |
2252 // R0: context. | 2607 // R0: context. |
2253 // R1: value. | 2608 // R1: value. |
2254 // R2: growable array. | 2609 // R2: growable array. |
2255 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) { | 2610 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) { |
2256 __ TagAndPushPP(); | 2611 __ TagAndPushPP(); |
2257 __ LoadPoolPointer(PP); | 2612 __ LoadPoolPointer(PP); |
2258 __ Push(CTX); | 2613 __ Push(CTX); |
2259 __ Push(LR); | 2614 __ Push(LR); |
2260 __ mov(CTX, R0); | 2615 __ mov(CTX, R0); |
2261 __ StoreIntoObject(R2, | 2616 __ StoreIntoObject(R2, |
2262 FieldAddress(R2, GrowableObjectArray::data_offset()), | 2617 FieldAddress(R2, GrowableObjectArray::data_offset()), |
2263 R1); | 2618 R1); |
2264 __ Pop(LR); | 2619 __ Pop(LR); |
2265 __ Pop(CTX); | 2620 __ Pop(CTX); |
2266 __ PopAndUntagPP(); | 2621 __ PopAndUntagPP(); |
2267 __ ret(); | 2622 __ ret(); |
2268 } | 2623 } |
2269 | 2624 |
2270 } // namespace dart | 2625 } // namespace dart |
2271 | 2626 |
2272 #endif // defined(TARGET_ARCH_ARM64) | 2627 #endif // defined(TARGET_ARCH_ARM64) |
OLD | NEW |