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Side by Side Diff: runtime/vm/assembler_mips.h

Issue 2947633002: VM-codegen: Clean up the way we emit code for comparison instructions. (Closed)
Patch Set: Simplify DBC ComparisonInstr::EmitNativeCode Created 3 years, 6 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef RUNTIME_VM_ASSEMBLER_MIPS_H_ 5 #ifndef RUNTIME_VM_ASSEMBLER_MIPS_H_
6 #define RUNTIME_VM_ASSEMBLER_MIPS_H_ 6 #define RUNTIME_VM_ASSEMBLER_MIPS_H_
7 7
8 #ifndef RUNTIME_VM_ASSEMBLER_H_ 8 #ifndef RUNTIME_VM_ASSEMBLER_H_
9 #error Do not include assembler_mips.h directly; use assembler.h instead. 9 #error Do not include assembler_mips.h directly; use assembler.h instead.
10 #endif 10 #endif
(...skipping 144 matching lines...) Expand 10 before | Expand all | Expand 10 after
155 kImmPos = kRelOpPos + kRelOpSize, 155 kImmPos = kRelOpPos + kRelOpSize,
156 kImmSize = 16, 156 kImmSize = 16,
157 }; 157 };
158 158
159 class LeftBits : public BitField<uword, Register, kLeftPos, kLeftSize> {}; 159 class LeftBits : public BitField<uword, Register, kLeftPos, kLeftSize> {};
160 class RightBits : public BitField<uword, Register, kRightPos, kRightSize> {}; 160 class RightBits : public BitField<uword, Register, kRightPos, kRightSize> {};
161 class RelOpBits 161 class RelOpBits
162 : public BitField<uword, RelationOperator, kRelOpPos, kRelOpSize> {}; 162 : public BitField<uword, RelationOperator, kRelOpPos, kRelOpSize> {};
163 class ImmBits : public BitField<uword, uint16_t, kImmPos, kImmSize> {}; 163 class ImmBits : public BitField<uword, uint16_t, kImmPos, kImmSize> {};
164 164
165 Register left() const { return LeftBits::decode(bits_); } 165 Register left() const {
166 Register right() const { return RightBits::decode(bits_); } 166 ASSERT(IsValid());
167 return LeftBits::decode(bits_);
168 }
169
170 Register right() const {
171 ASSERT(IsValid());
172 return RightBits::decode(bits_);
173 }
167 RelationOperator rel_op() const { return RelOpBits::decode(bits_); } 174 RelationOperator rel_op() const { return RelOpBits::decode(bits_); }
168 int16_t imm() const { return static_cast<int16_t>(ImmBits::decode(bits_)); } 175 int16_t imm() const {
176 ASSERT(IsValid());
177 return static_cast<int16_t>(ImmBits::decode(bits_));
178 }
169 179
170 static bool IsValidImm(int32_t value) { 180 static bool IsValidImm(int32_t value) {
171 // We want both value and value + 1 to fit in an int16_t. 181 // We want both value and value + 1 to fit in an int16_t.
172 return (-0x08000 <= value) && (value < 0x7fff); 182 return (-0x08000 <= value) && (value < 0x7fff);
173 } 183 }
174 184
175 void set_rel_op(RelationOperator value) { 185 void set_rel_op(RelationOperator value) {
176 ASSERT(IsValidRelOp(value)); 186 ASSERT(IsValidRelOp(value));
177 bits_ = RelOpBits::update(value, bits_); 187 bits_ = RelOpBits::update(value, bits_);
178 } 188 }
179 189
190 bool IsValid() const { return rel_op() != INVALID_RELATION; }
191
180 // Uninitialized condition. 192 // Uninitialized condition.
181 Condition() : ValueObject(), bits_(0) {} 193 Condition() : ValueObject(), bits_(RelOpBits::update(INVALID_RELATION, 0)) {}
182 194
183 // Copy constructor. 195 // Copy constructor.
184 Condition(const Condition& other) : ValueObject(), bits_(other.bits_) {} 196 Condition(const Condition& other) : ValueObject(), bits_(other.bits_) {}
185 197
186 // Copy assignment operator. 198 // Copy assignment operator.
187 Condition& operator=(const Condition& other) { 199 Condition& operator=(const Condition& other) {
188 bits_ = other.bits_; 200 bits_ = other.bits_;
189 return *this; 201 return *this;
190 } 202 }
191 203
192 Condition(Register left, 204 Condition(Register left,
193 Register right, 205 Register right,
194 RelationOperator rel_op, 206 RelationOperator rel_op,
195 int16_t imm = 0) { 207 int16_t imm = 0) {
196 // At most one constant, ZR or immediate. 208 // At most one constant, ZR or immediate.
197 ASSERT(!(((left == ZR) || (left == IMM)) && 209 ASSERT(!(((left == ZR) || (left == IMM)) &&
198 ((right == ZR) || (right == IMM)))); 210 ((right == ZR) || (right == IMM))));
199 // Non-zero immediate value is only allowed for IMM. 211 // Non-zero immediate value is only allowed for IMM.
200 ASSERT((imm != 0) == ((left == IMM) || (right == IMM))); 212 ASSERT((imm != 0) == ((left == IMM) || (right == IMM)));
201 set_left(left); 213 set_left(left);
202 set_right(right); 214 set_right(right);
203 set_rel_op(rel_op); 215 if (rel_op == INVALID_RELATION) {
216 SetToInvalidState();
217 } else {
218 set_rel_op(rel_op);
219 }
204 set_imm(imm); 220 set_imm(imm);
205 } 221 }
206 222
207 private: 223 private:
224 void SetToInvalidState() {
225 bits_ = RelOpBits::update(INVALID_RELATION, bits_);
226 }
227
208 static bool IsValidRelOp(RelationOperator value) { 228 static bool IsValidRelOp(RelationOperator value) {
209 return (AL <= value) && (value <= ULE); 229 return (AL <= value) && (value <= ULE);
210 } 230 }
211 231
212 static bool IsValidRegister(Register value) { 232 static bool IsValidRegister(Register value) {
213 return (ZR <= value) && (value <= IMM) && (value != AT); 233 return (ZR <= value) && (value <= IMM) && (value != AT);
214 } 234 }
215 235
216 void set_left(Register value) { 236 void set_left(Register value) {
217 ASSERT(IsValidRegister(value)); 237 ASSERT(IsValidRegister(value));
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1693 Register value, 1713 Register value,
1694 Label* no_update); 1714 Label* no_update);
1695 1715
1696 DISALLOW_ALLOCATION(); 1716 DISALLOW_ALLOCATION();
1697 DISALLOW_COPY_AND_ASSIGN(Assembler); 1717 DISALLOW_COPY_AND_ASSIGN(Assembler);
1698 }; 1718 };
1699 1719
1700 } // namespace dart 1720 } // namespace dart
1701 1721
1702 #endif // RUNTIME_VM_ASSEMBLER_MIPS_H_ 1722 #endif // RUNTIME_VM_ASSEMBLER_MIPS_H_
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