OLD | NEW |
1 // Copyright 2016 the V8 project authors. All rights reserved. | 1 // Copyright 2016 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/assembler-inl.h" | 5 #include "src/assembler-inl.h" |
6 #include "test/cctest/cctest.h" | 6 #include "test/cctest/cctest.h" |
7 #include "test/cctest/compiler/value-helper.h" | 7 #include "test/cctest/compiler/value-helper.h" |
8 #include "test/cctest/wasm/wasm-run-utils.h" | 8 #include "test/cctest/wasm/wasm-run-utils.h" |
9 #include "test/common/wasm/wasm-macro-gen.h" | 9 #include "test/common/wasm/wasm-macro-gen.h" |
10 | 10 |
(...skipping 388 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
399 #define WASM_SIMD_I8x16_REPLACE_LANE(lane, x, y) \ | 399 #define WASM_SIMD_I8x16_REPLACE_LANE(lane, x, y) \ |
400 x, y, WASM_SIMD_OP(kExprI8x16ReplaceLane), TO_BYTE(lane) | 400 x, y, WASM_SIMD_OP(kExprI8x16ReplaceLane), TO_BYTE(lane) |
401 | 401 |
402 #define WASM_SIMD_S8x16_SHUFFLE_OP(opcode, m, x, y) \ | 402 #define WASM_SIMD_S8x16_SHUFFLE_OP(opcode, m, x, y) \ |
403 x, y, WASM_SIMD_OP(opcode), TO_BYTE(m[0]), TO_BYTE(m[1]), TO_BYTE(m[2]), \ | 403 x, y, WASM_SIMD_OP(opcode), TO_BYTE(m[0]), TO_BYTE(m[1]), TO_BYTE(m[2]), \ |
404 TO_BYTE(m[3]), TO_BYTE(m[4]), TO_BYTE(m[5]), TO_BYTE(m[6]), \ | 404 TO_BYTE(m[3]), TO_BYTE(m[4]), TO_BYTE(m[5]), TO_BYTE(m[6]), \ |
405 TO_BYTE(m[7]), TO_BYTE(m[8]), TO_BYTE(m[9]), TO_BYTE(m[10]), \ | 405 TO_BYTE(m[7]), TO_BYTE(m[8]), TO_BYTE(m[9]), TO_BYTE(m[10]), \ |
406 TO_BYTE(m[11]), TO_BYTE(m[12]), TO_BYTE(m[13]), TO_BYTE(m[14]), \ | 406 TO_BYTE(m[11]), TO_BYTE(m[12]), TO_BYTE(m[13]), TO_BYTE(m[14]), \ |
407 TO_BYTE(m[15]) | 407 TO_BYTE(m[15]) |
408 | 408 |
| 409 #define WASM_SIMD_LOAD_MEM(index) \ |
| 410 index, WASM_SIMD_OP(kExprS128LoadMem), ZERO_ALIGNMENT, ZERO_OFFSET |
| 411 #define WASM_SIMD_STORE_MEM(index, val) \ |
| 412 index, val, WASM_SIMD_OP(kExprS128StoreMem), ZERO_ALIGNMENT, ZERO_OFFSET |
| 413 |
409 // Skip FP tests involving extremely large or extremely small values, which | 414 // Skip FP tests involving extremely large or extremely small values, which |
410 // may fail due to non-IEEE-754 SIMD arithmetic on some platforms. | 415 // may fail due to non-IEEE-754 SIMD arithmetic on some platforms. |
411 bool SkipFPValue(float x) { | 416 bool SkipFPValue(float x) { |
412 float abs_x = std::fabs(x); | 417 float abs_x = std::fabs(x); |
413 const float kSmallFloatThreshold = 1.0e-32f; | 418 const float kSmallFloatThreshold = 1.0e-32f; |
414 const float kLargeFloatThreshold = 1.0e32f; | 419 const float kLargeFloatThreshold = 1.0e32f; |
415 return abs_x != 0.0f && // 0 or -0 are fine. | 420 return abs_x != 0.0f && // 0 or -0 are fine. |
416 (abs_x < kSmallFloatThreshold || abs_x > kLargeFloatThreshold); | 421 (abs_x < kSmallFloatThreshold || abs_x > kLargeFloatThreshold); |
417 } | 422 } |
418 | 423 |
(...skipping 1765 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2184 } | 2189 } |
2185 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || | 2190 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || |
2186 // V8_TARGET_ARCH_MIPS64 | 2191 // V8_TARGET_ARCH_MIPS64 |
2187 | 2192 |
2188 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || \ | 2193 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || \ |
2189 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 | 2194 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
2190 WASM_SIMD_TEST(SimdLoadStoreLoad) { | 2195 WASM_SIMD_TEST(SimdLoadStoreLoad) { |
2191 WasmRunner<int32_t> r(kExecuteCompiled); | 2196 WasmRunner<int32_t> r(kExecuteCompiled); |
2192 int32_t* memory = r.module().AddMemoryElems<int32_t>(4); | 2197 int32_t* memory = r.module().AddMemoryElems<int32_t>(4); |
2193 | 2198 |
2194 BUILD(r, | 2199 BUILD(r, WASM_SIMD_STORE_MEM(WASM_ZERO, WASM_SIMD_LOAD_MEM(WASM_ZERO)), |
2195 WASM_STORE_MEM(MachineType::Simd128(), WASM_ZERO, | 2200 WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_SIMD_LOAD_MEM(WASM_ZERO))); |
2196 WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO)), | |
2197 WASM_SIMD_I32x4_EXTRACT_LANE( | |
2198 0, WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO))); | |
2199 | 2201 |
2200 FOR_INT32_INPUTS(i) { | 2202 FOR_INT32_INPUTS(i) { |
2201 int32_t expected = *i; | 2203 int32_t expected = *i; |
2202 r.module().WriteMemory(&memory[0], expected); | 2204 r.module().WriteMemory(&memory[0], expected); |
2203 CHECK_EQ(expected, r.Call()); | 2205 CHECK_EQ(expected, r.Call()); |
2204 } | 2206 } |
2205 } | 2207 } |
2206 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || | 2208 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || |
2207 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 | 2209 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
OLD | NEW |