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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. |
| 6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
| 7 | 7 |
| 8 #include "vm/intermediate_language.h" | 8 #include "vm/intermediate_language.h" |
| 9 | 9 |
| 10 #include "vm/cpu.h" | 10 #include "vm/cpu.h" |
| (...skipping 1185 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1196 case 16: | 1196 case 16: |
| 1197 __ add(idx, array, ShifterOperand(idx, LSL, 3)); | 1197 __ add(idx, array, ShifterOperand(idx, LSL, 3)); |
| 1198 break; | 1198 break; |
| 1199 default: | 1199 default: |
| 1200 // Case 2 is not reachable: We don't have unboxed 16-bit sized loads. | 1200 // Case 2 is not reachable: We don't have unboxed 16-bit sized loads. |
| 1201 UNREACHABLE(); | 1201 UNREACHABLE(); |
| 1202 } | 1202 } |
| 1203 if (!IsExternal()) { | 1203 if (!IsExternal()) { |
| 1204 ASSERT(this->array()->definition()->representation() == kTagged); | 1204 ASSERT(this->array()->definition()->representation() == kTagged); |
| 1205 __ AddImmediate(idx, | 1205 __ AddImmediate(idx, |
| 1206 FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag); | 1206 Instance::DataOffsetFor(class_id()) - kHeapObjectTag); |
| 1207 } | 1207 } |
| 1208 Address element_address(idx); | 1208 Address element_address(idx); |
| 1209 const QRegister result = locs()->out(0).fpu_reg(); | 1209 const QRegister result = locs()->out(0).fpu_reg(); |
| 1210 const DRegister dresult0 = EvenDRegisterOf(result); | 1210 const DRegister dresult0 = EvenDRegisterOf(result); |
| 1211 switch (class_id()) { | 1211 switch (class_id()) { |
| 1212 case kTypedDataFloat32ArrayCid: | 1212 case kTypedDataFloat32ArrayCid: |
| 1213 // Load single precision float. | 1213 // Load single precision float. |
| 1214 // vldrs does not support indexed addressing. | 1214 // vldrs does not support indexed addressing. |
| 1215 __ vldrs(EvenSRegisterOf(dresult0), element_address); | 1215 __ vldrs(EvenSRegisterOf(dresult0), element_address); |
| 1216 break; | 1216 break; |
| (...skipping 15 matching lines...) Expand all Loading... |
| 1232 const Register array = locs()->in(0).reg(); | 1232 const Register array = locs()->in(0).reg(); |
| 1233 Location index = locs()->in(1); | 1233 Location index = locs()->in(1); |
| 1234 ASSERT(index.IsRegister()); // TODO(regis): Revisit. | 1234 ASSERT(index.IsRegister()); // TODO(regis): Revisit. |
| 1235 Address element_address(kNoRegister, 0); | 1235 Address element_address(kNoRegister, 0); |
| 1236 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays | 1236 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays |
| 1237 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the | 1237 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the |
| 1238 // index is expected to be untagged before accessing. | 1238 // index is expected to be untagged before accessing. |
| 1239 ASSERT(kSmiTagShift == 1); | 1239 ASSERT(kSmiTagShift == 1); |
| 1240 const intptr_t offset = IsExternal() | 1240 const intptr_t offset = IsExternal() |
| 1241 ? 0 | 1241 ? 0 |
| 1242 : FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag; | 1242 : Instance::DataOffsetFor(class_id()) - kHeapObjectTag; |
| 1243 switch (index_scale()) { | 1243 switch (index_scale()) { |
| 1244 case 1: { | 1244 case 1: { |
| 1245 __ add(index.reg(), array, ShifterOperand(index.reg(), ASR, kSmiTagSize)); | 1245 __ add(index.reg(), array, ShifterOperand(index.reg(), ASR, kSmiTagSize)); |
| 1246 element_address = Address(index.reg(), offset); | 1246 element_address = Address(index.reg(), offset); |
| 1247 break; | 1247 break; |
| 1248 } | 1248 } |
| 1249 case 2: { | 1249 case 2: { |
| 1250 // No scaling needed, since index is a smi. | 1250 // No scaling needed, since index is a smi. |
| 1251 if (!IsExternal()) { | 1251 if (!IsExternal()) { |
| 1252 __ AddImmediate(index.reg(), index.reg(), | 1252 __ AddImmediate(index.reg(), index.reg(), |
| 1253 FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag); | 1253 Instance::DataOffsetFor(class_id()) - kHeapObjectTag); |
| 1254 element_address = Address(array, index.reg(), LSL, 0); | 1254 element_address = Address(array, index.reg(), LSL, 0); |
| 1255 } else { | 1255 } else { |
| 1256 element_address = Address(array, index.reg(), LSL, 0); | 1256 element_address = Address(array, index.reg(), LSL, 0); |
| 1257 } | 1257 } |
| 1258 break; | 1258 break; |
| 1259 } | 1259 } |
| 1260 case 4: { | 1260 case 4: { |
| 1261 __ add(index.reg(), array, ShifterOperand(index.reg(), LSL, 1)); | 1261 __ add(index.reg(), array, ShifterOperand(index.reg(), LSL, 1)); |
| 1262 element_address = Address(index.reg(), offset); | 1262 element_address = Address(index.reg(), offset); |
| 1263 break; | 1263 break; |
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| 1463 case 16: | 1463 case 16: |
| 1464 __ add(idx, array, ShifterOperand(idx, LSL, 3)); | 1464 __ add(idx, array, ShifterOperand(idx, LSL, 3)); |
| 1465 break; | 1465 break; |
| 1466 default: | 1466 default: |
| 1467 // Case 2 is not reachable: We don't have unboxed 16-bit sized loads. | 1467 // Case 2 is not reachable: We don't have unboxed 16-bit sized loads. |
| 1468 UNREACHABLE(); | 1468 UNREACHABLE(); |
| 1469 } | 1469 } |
| 1470 if (!IsExternal()) { | 1470 if (!IsExternal()) { |
| 1471 ASSERT(this->array()->definition()->representation() == kTagged); | 1471 ASSERT(this->array()->definition()->representation() == kTagged); |
| 1472 __ AddImmediate(idx, | 1472 __ AddImmediate(idx, |
| 1473 FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag); | 1473 Instance::DataOffsetFor(class_id()) - kHeapObjectTag); |
| 1474 } | 1474 } |
| 1475 switch (class_id()) { | 1475 switch (class_id()) { |
| 1476 case kTypedDataFloat32ArrayCid: { | 1476 case kTypedDataFloat32ArrayCid: { |
| 1477 const SRegister value_reg = | 1477 const SRegister value_reg = |
| 1478 EvenSRegisterOf(EvenDRegisterOf(value.fpu_reg())); | 1478 EvenSRegisterOf(EvenDRegisterOf(value.fpu_reg())); |
| 1479 __ StoreSToOffset(value_reg, idx, 0); | 1479 __ StoreSToOffset(value_reg, idx, 0); |
| 1480 break; | 1480 break; |
| 1481 } | 1481 } |
| 1482 case kTypedDataFloat64ArrayCid: { | 1482 case kTypedDataFloat64ArrayCid: { |
| 1483 const DRegister value_reg = EvenDRegisterOf(value.fpu_reg()); | 1483 const DRegister value_reg = EvenDRegisterOf(value.fpu_reg()); |
| (...skipping 17 matching lines...) Expand all Loading... |
| 1501 Location index = locs()->in(1); | 1501 Location index = locs()->in(1); |
| 1502 | 1502 |
| 1503 Address element_address(kNoRegister, 0); | 1503 Address element_address(kNoRegister, 0); |
| 1504 ASSERT(index.IsRegister()); // TODO(regis): Revisit. | 1504 ASSERT(index.IsRegister()); // TODO(regis): Revisit. |
| 1505 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays | 1505 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays |
| 1506 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the | 1506 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the |
| 1507 // index is expected to be untagged before accessing. | 1507 // index is expected to be untagged before accessing. |
| 1508 ASSERT(kSmiTagShift == 1); | 1508 ASSERT(kSmiTagShift == 1); |
| 1509 const intptr_t offset = IsExternal() | 1509 const intptr_t offset = IsExternal() |
| 1510 ? 0 | 1510 ? 0 |
| 1511 : FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag; | 1511 : Instance::DataOffsetFor(class_id()) - kHeapObjectTag; |
| 1512 switch (index_scale()) { | 1512 switch (index_scale()) { |
| 1513 case 1: { | 1513 case 1: { |
| 1514 __ add(index.reg(), array, ShifterOperand(index.reg(), ASR, kSmiTagSize)); | 1514 __ add(index.reg(), array, ShifterOperand(index.reg(), ASR, kSmiTagSize)); |
| 1515 element_address = Address(index.reg(), offset); | 1515 element_address = Address(index.reg(), offset); |
| 1516 break; | 1516 break; |
| 1517 } | 1517 } |
| 1518 case 2: { | 1518 case 2: { |
| 1519 // No scaling needed, since index is a smi. | 1519 // No scaling needed, since index is a smi. |
| 1520 if (!IsExternal()) { | 1520 if (!IsExternal()) { |
| 1521 __ AddImmediate(index.reg(), index.reg(), offset); | 1521 __ AddImmediate(index.reg(), index.reg(), offset); |
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| 6438 compiler->GenerateCall(token_pos(), | 6438 compiler->GenerateCall(token_pos(), |
| 6439 &label, | 6439 &label, |
| 6440 PcDescriptors::kOther, | 6440 PcDescriptors::kOther, |
| 6441 locs()); | 6441 locs()); |
| 6442 __ Drop(ArgumentCount()); // Discard arguments. | 6442 __ Drop(ArgumentCount()); // Discard arguments. |
| 6443 } | 6443 } |
| 6444 | 6444 |
| 6445 } // namespace dart | 6445 } // namespace dart |
| 6446 | 6446 |
| 6447 #endif // defined TARGET_ARCH_ARM | 6447 #endif // defined TARGET_ARCH_ARM |
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