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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_ARM64_H_ | 5 #ifndef VM_CONSTANTS_ARM64_H_ |
6 #define VM_CONSTANTS_ARM64_H_ | 6 #define VM_CONSTANTS_ARM64_H_ |
7 | 7 |
8 #include "platform/assert.h" | 8 #include "platform/assert.h" |
9 | 9 |
10 namespace dart { | 10 namespace dart { |
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446 AND = LogicalShiftFixed, | 446 AND = LogicalShiftFixed, |
447 BIC = LogicalShiftFixed | B21, | 447 BIC = LogicalShiftFixed | B21, |
448 ORR = LogicalShiftFixed | B29, | 448 ORR = LogicalShiftFixed | B29, |
449 ORN = LogicalShiftFixed | B29 | B21, | 449 ORN = LogicalShiftFixed | B29 | B21, |
450 EOR = LogicalShiftFixed | B30, | 450 EOR = LogicalShiftFixed | B30, |
451 EON = LogicalShiftFixed | B30 | B21, | 451 EON = LogicalShiftFixed | B30 | B21, |
452 ANDS = LogicalShiftFixed | B30 | B29, | 452 ANDS = LogicalShiftFixed | B30 | B29, |
453 BICS = LogicalShiftFixed | B30 | B29 | B21, | 453 BICS = LogicalShiftFixed | B30 | B29 | B21, |
454 }; | 454 }; |
455 | 455 |
| 456 // C.3.6.5 |
| 457 enum SIMDCopyOp { |
| 458 SIMDCopyMask = 0x9fe08400, |
| 459 SIMDCopyFixed = DPSimd1Fixed | B10, |
| 460 VDUP = SIMDCopyFixed | B30, |
| 461 VINS = SIMDCopyFixed | B30 | B29, |
| 462 }; |
| 463 |
| 464 // C.3.6.16 |
| 465 enum SIMDThreeSameOp { |
| 466 SIMDThreeSameMask = 0x9f200400, |
| 467 SIMDThreeSameFixed = DPSimd1Fixed | B21 | B10, |
| 468 VADDS = SIMDThreeSameFixed | B30 | B15 | B14 | B12, |
| 469 VADDD = SIMDThreeSameFixed | B30 | B22 | B15 | B14 | B12, |
| 470 VSUBS = SIMDThreeSameFixed | B30 | B23 | B15 | B14 | B12, |
| 471 VSUBD = SIMDThreeSameFixed | B30 | B23 | B22 | B15 | B14 | B12, |
| 472 VMULS = SIMDThreeSameFixed | B30 | B29 | B15 | B14 | B12 | B11, |
| 473 VMULD = SIMDThreeSameFixed | B30 | B29 | B22 | B15 | B14 | B12 | B11, |
| 474 VDIVS = SIMDThreeSameFixed | B30 | B29 | B15 | B14 | B13 | B12 | B11, |
| 475 VDIVD = SIMDThreeSameFixed | B30 | B29 | B22 | B15 | B14 | B13 | B12 | B11, |
| 476 }; |
| 477 |
456 // C.3.6.22 | 478 // C.3.6.22 |
457 enum FPCompareOp { | 479 enum FPCompareOp { |
458 FPCompareMask = 0xffa0fc07, | 480 FPCompareMask = 0xffa0fc07, |
459 FPCompareFixed = FPFixed | B21 | B13, | 481 FPCompareFixed = FPFixed | B21 | B13, |
460 FCMPD = FPCompareFixed | B22, | 482 FCMPD = FPCompareFixed | B22, |
461 FCMPZD = FPCompareFixed | B22 | B3, | 483 FCMPZD = FPCompareFixed | B22 | B3, |
462 }; | 484 }; |
463 | 485 |
464 // C3.6.25 | 486 // C3.6.25 |
465 enum FPOneSourceOp { | 487 enum FPOneSourceOp { |
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521 _V(LoadRegLiteral) \ | 543 _V(LoadRegLiteral) \ |
522 _V(AddSubImm) \ | 544 _V(AddSubImm) \ |
523 _V(LogicalImm) \ | 545 _V(LogicalImm) \ |
524 _V(MoveWide) \ | 546 _V(MoveWide) \ |
525 _V(PCRel) \ | 547 _V(PCRel) \ |
526 _V(AddSubShiftExt) \ | 548 _V(AddSubShiftExt) \ |
527 _V(ConditionalSelect) \ | 549 _V(ConditionalSelect) \ |
528 _V(MiscDP2Source) \ | 550 _V(MiscDP2Source) \ |
529 _V(MiscDP3Source) \ | 551 _V(MiscDP3Source) \ |
530 _V(LogicalShift) \ | 552 _V(LogicalShift) \ |
| 553 _V(SIMDCopy) \ |
| 554 _V(SIMDThreeSame) \ |
| 555 _V(FPCompare) \ |
531 _V(FPOneSource) \ | 556 _V(FPOneSource) \ |
532 _V(FPTwoSource) \ | 557 _V(FPTwoSource) \ |
533 _V(FPImm) \ | 558 _V(FPImm) \ |
534 _V(FPIntCvt) \ | 559 _V(FPIntCvt) \ |
535 _V(FPCompare) \ | |
536 | 560 |
537 | 561 |
538 enum Shift { | 562 enum Shift { |
539 kNoShift = -1, | 563 kNoShift = -1, |
540 LSL = 0, // Logical shift left | 564 LSL = 0, // Logical shift left |
541 LSR = 1, // Logical shift right | 565 LSR = 1, // Logical shift right |
542 ASR = 2, // Arithmetic shift right | 566 ASR = 2, // Arithmetic shift right |
543 ROR = 3, // Rotate right | 567 ROR = 3, // Rotate right |
544 kMaxShift = 4, | 568 kMaxShift = 4, |
545 }; | 569 }; |
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595 kVnShift = 5, | 619 kVnShift = 5, |
596 kVnBits = 5, | 620 kVnBits = 5, |
597 kVmShift = 16, | 621 kVmShift = 16, |
598 kVmBits = 5, | 622 kVmBits = 5, |
599 kVtShift = 0, | 623 kVtShift = 0, |
600 kVtBits = 5, | 624 kVtBits = 5, |
601 | 625 |
602 // Immediates. | 626 // Immediates. |
603 kImm3Shift = 10, | 627 kImm3Shift = 10, |
604 kImm3Bits = 3, | 628 kImm3Bits = 3, |
| 629 kImm4Shift = 11, |
| 630 kImm4Bits = 4, |
| 631 kImm5Shift = 16, |
| 632 kImm5Bits = 5, |
605 kImm6Shift = 10, | 633 kImm6Shift = 10, |
606 kImm6Bits = 6, | 634 kImm6Bits = 6, |
607 kImm8Shift = 13, | 635 kImm8Shift = 13, |
608 kImm8Bits = 8, | 636 kImm8Bits = 8, |
609 kImm9Shift = 12, | 637 kImm9Shift = 12, |
610 kImm9Bits = 9, | 638 kImm9Bits = 9, |
611 kImm12Shift = 10, | 639 kImm12Shift = 10, |
612 kImm12Bits = 12, | 640 kImm12Bits = 12, |
613 kImm12Mask = 0xfff << kImm12Shift, | 641 kImm12Mask = 0xfff << kImm12Shift, |
614 kImm12ShiftShift = 22, | 642 kImm12ShiftShift = 22, |
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947 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } | 975 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } |
948 | 976 |
949 private: | 977 private: |
950 DISALLOW_ALLOCATION(); | 978 DISALLOW_ALLOCATION(); |
951 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); | 979 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); |
952 }; | 980 }; |
953 | 981 |
954 } // namespace dart | 982 } // namespace dart |
955 | 983 |
956 #endif // VM_CONSTANTS_ARM64_H_ | 984 #endif // VM_CONSTANTS_ARM64_H_ |
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