Beings adding SIMD support to arm64.

runtime/vm/assembler_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_ARM64_H_
 #define VM_ASSEMBLER_ARM64_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_arm64.h directly; use assembler.h instead.
 #endif
@@ skipping 715 matching lines @@
   void fdivd(VRegister vd, VRegister vn, VRegister vm) {
     EmitFPTwoSourceOp(FDIVD, vd, vn, vm);
   }
   void faddd(VRegister vd, VRegister vn, VRegister vm) {
     EmitFPTwoSourceOp(FADDD, vd, vn, vm);
   }
   void fsubd(VRegister vd, VRegister vn, VRegister vm) {
     EmitFPTwoSourceOp(FSUBD, vd, vn, vm);
   }
 
+  // SIMD operations.
+  void vadds(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VADDS, vd, vn, vm);
+  }
+  void vaddd(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VADDD, vd, vn, vm);
+  }
+  void vsubs(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VSUBS, vd, vn, vm);
+  }
+  void vsubd(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VSUBD, vd, vn, vm);
+  }
+  void vmuls(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VMULS, vd, vn, vm);
+  }
+  void vmuld(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VMULD, vd, vn, vm);
+  }
+  void vdivs(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VDIVS, vd, vn, vm);
+  }
+  void vdivd(VRegister vd, VRegister vn, VRegister vm) {
+    EmitSIMDThreeSameOp(VDIVD, vd, vn, vm);
+  }
+  void vdups(VRegister vd, VRegister vn, int32_t idx) {
+    EmitSIMDCopyOp(VDUP, vd, vn, kSWord, 0, idx);
+  }
+  void vdupd(VRegister vd, VRegister vn, int32_t idx) {
+    EmitSIMDCopyOp(VDUP, vd, vn, kDWord, 0, idx);
+  }
+  void vinss(VRegister vd, int32_t didx, VRegister vn, int32_t sidx) {
+    EmitSIMDCopyOp(VINS, vd, vn, kSWord, sidx, didx);
+  }
+  void vinsd(VRegister vd, int32_t didx, VRegister vn, int32_t sidx) {
+    EmitSIMDCopyOp(VINS, vd, vn, kDWord, sidx, didx);
+  }
+
   // Aliases.
   void mov(Register rd, Register rn) {
     if ((rd == SP) || (rn == SP)) {
       add(rd, rn, Operand(0));
     } else {
       orr(rd, ZR, Operand(rn));
     }
   }
   void mvn(Register rd, Register rm) {
     orn(rd, ZR, Operand(rm));
@@ skipping 217 matching lines @@
   void EnterCallRuntimeFrame(intptr_t frame_size);
   void LeaveCallRuntimeFrame();
   void CallRuntime(const RuntimeEntry& entry, intptr_t argument_count);
 
   // Set up a stub frame so that the stack traversal code can easily identify
   // a stub frame.
   void EnterStubFrame(bool load_pp = false);
   void LeaveStubFrame();
 
   void UpdateAllocationStats(intptr_t cid,
-                             Register temp_reg,
                              Register pp,
                              Heap::Space space = Heap::kNew);
 
   void UpdateAllocationStatsWithSize(intptr_t cid,
                                      Register size_reg,
-                                     Register temp_reg,
                                      Register pp,
                                      Heap::Space space = Heap::kNew);
 
   // Inlined allocation of an instance of class 'cls', code has no runtime
   // calls. Jump to 'failure' if the instance cannot be allocated here.
   // Allocated instance is returned in 'instance_reg'.
   // Only the tags field of the object is initialized.
   void TryAllocate(const Class& cls,
                    Label* failure,
                    Register instance_reg,
-                   Register temp_reg,
                    Register pp);
 
  private:
   AssemblerBuffer buffer_;  // Contains position independent code.
 
   // Objects and patchable jump targets.
   GrowableObjectArray& object_pool_;
 
   // Patchability of pool entries.
   GrowableArray<Patchability> patchable_pool_entries_;
@@ skipping 397 matching lines @@
   }
 
   void EmitFPCompareOp(FPCompareOp op, VRegister vn, VRegister vm) {
     const int32_t encoding =
         op |
         (static_cast<int32_t>(vn) << kVnShift) |
         (static_cast<int32_t>(vm) << kVmShift);
     Emit(encoding);
   }
 
+  void EmitSIMDThreeSameOp(SIMDThreeSameOp op,
+                           VRegister vd, VRegister vn, VRegister vm) {
+    const int32_t encoding =
+        op |
+        (static_cast<int32_t>(vd) << kVdShift) |
+        (static_cast<int32_t>(vn) << kVnShift) |
+        (static_cast<int32_t>(vm) << kVmShift);
+    Emit(encoding);
+  }
+
+  void EmitSIMDCopyOp(SIMDCopyOp op, VRegister vd, VRegister vn, OperandSize sz,
+                      int32_t idx4, int32_t idx5) {
+    const int32_t shift = Log2OperandSizeBytes(sz);
+    const int32_t imm5 = ((idx5 << (shift + 1)) | (1 << shift)) & 0x1f;
+    const int32_t imm4 = (idx4 << shift) & 0xf;
+    const int32_t encoding =
+        op |
+        (imm5 << kImm5Shift) |
+        (imm4 << kImm4Shift) |
+        (static_cast<int32_t>(vd) << kVdShift) |
+        (static_cast<int32_t>(vn) << kVnShift);
+    Emit(encoding);
+  }
+
   void StoreIntoObjectFilter(Register object, Register value, Label* no_update);
 
   // Shorter filtering sequence that assumes that value is not a smi.
   void StoreIntoObjectFilterNoSmi(Register object,
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM64_H_