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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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355 __ faddp(3); | 355 __ faddp(3); |
356 __ fsubp(3); | 356 __ fsubp(3); |
357 __ fmulp(3); | 357 __ fmulp(3); |
358 __ fdivp(3); | 358 __ fdivp(3); |
359 __ fcompp(); | 359 __ fcompp(); |
360 __ fwait(); | 360 __ fwait(); |
361 __ frndint(); | 361 __ frndint(); |
362 __ fninit(); | 362 __ fninit(); |
363 __ nop(); | 363 __ nop(); |
364 | 364 |
365 // SSE instruction | |
366 { | |
367 // Move operation | |
368 __ movaps(xmm0, xmm1); | |
369 __ shufps(xmm0, xmm0, 0x0); | |
370 | |
371 // logic operation | |
372 __ andps(xmm0, xmm1); | |
373 __ andps(xmm0, Operand(ebx, ecx, times_4, 10000)); | |
374 __ orps(xmm0, xmm1); | |
375 __ orps(xmm0, Operand(ebx, ecx, times_4, 10000)); | |
376 __ xorps(xmm0, xmm1); | |
377 __ xorps(xmm0, Operand(ebx, ecx, times_4, 10000)); | |
378 | |
379 // Arithmetic operation | |
380 __ addps(xmm1, xmm0); | |
381 __ addps(xmm1, Operand(ebx, ecx, times_4, 10000)); | |
382 __ subps(xmm1, xmm0); | |
383 __ subps(xmm1, Operand(ebx, ecx, times_4, 10000)); | |
384 __ mulps(xmm1, xmm0); | |
385 __ mulps(xmm1, Operand(ebx, ecx, times_4, 10000)); | |
386 __ divps(xmm1, xmm0); | |
387 __ divps(xmm1, Operand(ebx, ecx, times_4, 10000)); | |
388 } | |
389 { | |
390 __ cvttss2si(edx, Operand(ebx, ecx, times_4, 10000)); | |
391 __ cvtsi2sd(xmm1, Operand(ebx, ecx, times_4, 10000)); | |
392 __ movsd(xmm1, Operand(ebx, ecx, times_4, 10000)); | |
393 __ movsd(Operand(ebx, ecx, times_4, 10000), xmm1); | |
394 // 128 bit move instructions. | |
395 __ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000)); | |
396 __ movdqa(Operand(ebx, ecx, times_4, 10000), xmm0); | |
397 __ movdqu(xmm0, Operand(ebx, ecx, times_4, 10000)); | |
398 __ movdqu(Operand(ebx, ecx, times_4, 10000), xmm0); | |
399 | |
400 __ addsd(xmm1, xmm0); | |
401 __ mulsd(xmm1, xmm0); | |
402 __ subsd(xmm1, xmm0); | |
403 __ divsd(xmm1, xmm0); | |
404 __ ucomisd(xmm0, xmm1); | |
405 __ cmpltsd(xmm0, xmm1); | |
406 | |
407 __ andpd(xmm0, xmm1); | |
408 __ psllq(xmm0, 17); | |
409 __ psllq(xmm0, xmm1); | |
410 __ psrlq(xmm0, 17); | |
411 __ psrlq(xmm0, xmm1); | |
412 __ por(xmm0, xmm1); | |
413 } | |
414 | |
415 // cmov. | |
416 { | |
417 __ cmov(overflow, eax, Operand(eax, 0)); | |
418 __ cmov(no_overflow, eax, Operand(eax, 1)); | |
419 __ cmov(below, eax, Operand(eax, 2)); | |
420 __ cmov(above_equal, eax, Operand(eax, 3)); | |
421 __ cmov(equal, eax, Operand(ebx, 0)); | |
422 __ cmov(not_equal, eax, Operand(ebx, 1)); | |
423 __ cmov(below_equal, eax, Operand(ebx, 2)); | |
424 __ cmov(above, eax, Operand(ebx, 3)); | |
425 __ cmov(sign, eax, Operand(ecx, 0)); | |
426 __ cmov(not_sign, eax, Operand(ecx, 1)); | |
427 __ cmov(parity_even, eax, Operand(ecx, 2)); | |
428 __ cmov(parity_odd, eax, Operand(ecx, 3)); | |
429 __ cmov(less, eax, Operand(edx, 0)); | |
430 __ cmov(greater_equal, eax, Operand(edx, 1)); | |
431 __ cmov(less_equal, eax, Operand(edx, 2)); | |
432 __ cmov(greater, eax, Operand(edx, 3)); | |
433 } | |
434 | |
435 { | |
436 if (CpuFeatures::IsSupported(SSE4_1)) { | |
437 CpuFeatureScope scope(&assm, SSE4_1); | |
438 __ pextrd(eax, xmm0, 1); | |
439 __ pinsrd(xmm1, eax, 0); | |
440 __ extractps(eax, xmm1, 0); | |
441 } | |
442 } | |
443 | |
444 // Nop instructions | 365 // Nop instructions |
445 for (int i = 0; i < 16; i++) { | 366 for (int i = 0; i < 16; i++) { |
446 __ Nop(i); | 367 __ Nop(i); |
447 } | 368 } |
448 | 369 |
449 __ ret(0); | 370 __ ret(0); |
450 | 371 |
451 CodeDesc desc; | 372 CodeDesc desc; |
452 assm.GetCode(&desc); | 373 assm.GetCode(&desc); |
453 Handle<Code> code = isolate->factory()->NewCode( | 374 Handle<Code> code = isolate->factory()->NewCode( |
454 desc, Code::ComputeFlags(Code::STUB), Handle<Code>()); | 375 desc, Code::ComputeFlags(Code::STUB), Handle<Code>()); |
455 USE(code); | 376 USE(code); |
456 #ifdef OBJECT_PRINT | 377 #ifdef OBJECT_PRINT |
457 code->Print(); | 378 code->Print(); |
458 byte* begin = code->instruction_start(); | 379 byte* begin = code->instruction_start(); |
459 byte* end = begin + code->instruction_size(); | 380 byte* end = begin + code->instruction_size(); |
460 disasm::Disassembler::Disassemble(stdout, begin, end); | 381 disasm::Disassembler::Disassemble(stdout, begin, end); |
461 #endif | 382 #endif |
462 } | 383 } |
463 | 384 |
464 #undef __ | 385 #undef __ |
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