Introduce x87 port

src/x87/disasm-x87.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <assert.h>
 #include <stdio.h>
 #include <stdarg.h>
 
 #include "v8.h"
 
-#if V8_TARGET_ARCH_IA32
+#if V8_TARGET_ARCH_X87
 
 #include "disasm.h"
 
 namespace disasm {
 
 enum OperandOrder {
   UNSET_OP_ORDER = 0,
   REG_OPER_OP_ORDER,
   OPER_REG_OP_ORDER
 };
@@ skipping 211 matching lines @@
 void InstructionTable::AddJumpConditionalShort() {
   for (byte b = 0x70; b <= 0x7F; b++) {
     InstructionDesc* id = &instructions_[b];
     ASSERT_EQ(NO_INSTR, id->type);  // Information not already entered.
     id->mnem = jump_conditional_mnem[b & 0x0F];
     id->type = JUMP_CONDITIONAL_SHORT_INSTR;
   }
 }
 
 
-// The IA32 disassembler implementation.
-class DisassemblerIA32 {
+// The X87 disassembler implementation.
+class DisassemblerX87 {
  public:
-  DisassemblerIA32(const NameConverter& converter,
+  DisassemblerX87(const NameConverter& converter,
                    bool abort_on_unimplemented = true)
       : converter_(converter),
         instruction_table_(InstructionTable::get_instance()),
         tmp_buffer_pos_(0),
         abort_on_unimplemented_(abort_on_unimplemented) {
     tmp_buffer_[0] = '\0';
   }
 
-  virtual ~DisassemblerIA32() {}
+  virtual ~DisassemblerX87() {}
 
   // Writes one disassembled instruction into 'buffer' (0-terminated).
   // Returns the length of the disassembled machine instruction in bytes.
   int InstructionDecode(v8::internal::Vector<char> buffer, byte* instruction);
 
  private:
   const NameConverter& converter_;
   InstructionTable* instruction_table_;
   v8::internal::EmbeddedVector<char, 128> tmp_buffer_;
   unsigned int tmp_buffer_pos_;
@@ skipping 49 matching lines @@
     *rm = data & 7;
   }
 
 
   static void get_sib(byte data, int* scale, int* index, int* base) {
     *scale = (data >> 6) & 3;
     *index = (data >> 3) & 7;
     *base = data & 7;
   }
 
-  typedef const char* (DisassemblerIA32::*RegisterNameMapping)(int reg) const;
+  typedef const char* (DisassemblerX87::*RegisterNameMapping)(int reg) const;
 
   int PrintRightOperandHelper(byte* modrmp, RegisterNameMapping register_name);
   int PrintRightOperand(byte* modrmp);
   int PrintRightByteOperand(byte* modrmp);
   int PrintRightXMMOperand(byte* modrmp);
   int PrintOperands(const char* mnem, OperandOrder op_order, byte* data);
   int PrintImmediateOp(byte* data);
   int F7Instruction(byte* data);
   int D1D3C1Instruction(byte* data);
   int JumpShort(byte* data);
@@ skipping 10 matching lines @@
   void UnimplementedInstruction() {
     if (abort_on_unimplemented_) {
       UNIMPLEMENTED();
     } else {
       AppendToBuffer("'Unimplemented Instruction'");
     }
   }
 };
 
 
-void DisassemblerIA32::AppendToBuffer(const char* format, ...) {
+void DisassemblerX87::AppendToBuffer(const char* format, ...) {
   v8::internal::Vector<char> buf = tmp_buffer_ + tmp_buffer_pos_;
   va_list args;
   va_start(args, format);
   int result = v8::internal::OS::VSNPrintF(buf, format, args);
   va_end(args);
   tmp_buffer_pos_ += result;
 }
 
-int DisassemblerIA32::PrintRightOperandHelper(
+int DisassemblerX87::PrintRightOperandHelper(
     byte* modrmp,
     RegisterNameMapping direct_register_name) {
   int mod, regop, rm;
   get_modrm(*modrmp, &mod, &regop, &rm);
   RegisterNameMapping register_name = (mod == 3) ? direct_register_name :
-      &DisassemblerIA32::NameOfCPURegister;
+      &DisassemblerX87::NameOfCPURegister;
   switch (mod) {
     case 0:
       if (rm == ebp) {
         int32_t disp = *reinterpret_cast<int32_t*>(modrmp+1);
         AppendToBuffer("[0x%x]", disp);
         return 5;
       } else if (rm == esp) {
         byte sib = *(modrmp + 1);
         int scale, index, base;
         get_sib(sib, &scale, &index, &base);
@@ skipping 61 matching lines @@
       AppendToBuffer("%s", (this->*register_name)(rm));
       return 1;
     default:
       UnimplementedInstruction();
       return 1;
   }
   UNREACHABLE();
 }
 
 
-int DisassemblerIA32::PrintRightOperand(byte* modrmp) {
-  return PrintRightOperandHelper(modrmp, &DisassemblerIA32::NameOfCPURegister);
+int DisassemblerX87::PrintRightOperand(byte* modrmp) {
+  return PrintRightOperandHelper(modrmp, &DisassemblerX87::NameOfCPURegister);
 }
 
 
-int DisassemblerIA32::PrintRightByteOperand(byte* modrmp) {
+int DisassemblerX87::PrintRightByteOperand(byte* modrmp) {
   return PrintRightOperandHelper(modrmp,
-                                 &DisassemblerIA32::NameOfByteCPURegister);
+                                 &DisassemblerX87::NameOfByteCPURegister);
 }
 
 
-int DisassemblerIA32::PrintRightXMMOperand(byte* modrmp) {
+int DisassemblerX87::PrintRightXMMOperand(byte* modrmp) {
   return PrintRightOperandHelper(modrmp,
-                                 &DisassemblerIA32::NameOfXMMRegister);
+                                 &DisassemblerX87::NameOfXMMRegister);
 }
 
 
 // Returns number of bytes used including the current *data.
 // Writes instruction's mnemonic, left and right operands to 'tmp_buffer_'.
-int DisassemblerIA32::PrintOperands(const char* mnem,
+int DisassemblerX87::PrintOperands(const char* mnem,
                                     OperandOrder op_order,
                                     byte* data) {
   byte modrm = *data;
   int mod, regop, rm;
   get_modrm(modrm, &mod, &regop, &rm);
   int advance = 0;
   switch (op_order) {
     case REG_OPER_OP_ORDER: {
       AppendToBuffer("%s %s,", mnem, NameOfCPURegister(regop));
       advance = PrintRightOperand(data);
       break;
     }
     case OPER_REG_OP_ORDER: {
       AppendToBuffer("%s ", mnem);
       advance = PrintRightOperand(data);
       AppendToBuffer(",%s", NameOfCPURegister(regop));
       break;
     }
     default:
       UNREACHABLE();
       break;
   }
   return advance;
 }
 
 
 // Returns number of bytes used by machine instruction, including *data byte.
 // Writes immediate instructions to 'tmp_buffer_'.
-int DisassemblerIA32::PrintImmediateOp(byte* data) {
+int DisassemblerX87::PrintImmediateOp(byte* data) {
   bool sign_extension_bit = (*data & 0x02) != 0;
   byte modrm = *(data+1);
   int mod, regop, rm;
   get_modrm(modrm, &mod, &regop, &rm);
   const char* mnem = "Imm???";
   switch (regop) {
     case 0: mnem = "add"; break;
     case 1: mnem = "or"; break;
     case 2: mnem = "adc"; break;
     case 4: mnem = "and"; break;
     case 5: mnem = "sub"; break;
     case 6: mnem = "xor"; break;
     case 7: mnem = "cmp"; break;
     default: UnimplementedInstruction();
   }
   AppendToBuffer("%s ", mnem);
   int count = PrintRightOperand(data+1);
   if (sign_extension_bit) {
     AppendToBuffer(",0x%x", *(data + 1 + count));
     return 1 + count + 1 /*int8*/;
   } else {
     AppendToBuffer(",0x%x", *reinterpret_cast<int32_t*>(data + 1 + count));
     return 1 + count + 4 /*int32_t*/;
   }
 }
 
 
 // Returns number of bytes used, including *data.
-int DisassemblerIA32::F7Instruction(byte* data) {
+int DisassemblerX87::F7Instruction(byte* data) {
   ASSERT_EQ(0xF7, *data);
   byte modrm = *(data+1);
   int mod, regop, rm;
   get_modrm(modrm, &mod, &regop, &rm);
   if (mod == 3 && regop != 0) {
     const char* mnem = NULL;
     switch (regop) {
       case 2: mnem = "not"; break;
       case 3: mnem = "neg"; break;
       case 4: mnem = "mul"; break;
@@ skipping 13 matching lines @@
     int32_t imm = *reinterpret_cast<int32_t*>(data+1+count);
     AppendToBuffer(",0x%x", imm);
     return 1+count+4 /*int32_t*/;
   } else {
     UnimplementedInstruction();
     return 2;
   }
 }
 
 
-int DisassemblerIA32::D1D3C1Instruction(byte* data) {
+int DisassemblerX87::D1D3C1Instruction(byte* data) {
   byte op = *data;
   ASSERT(op == 0xD1 || op == 0xD3 || op == 0xC1);
   byte modrm = *(data+1);
   int mod, regop, rm;
   get_modrm(modrm, &mod, &regop, &rm);
   int imm8 = -1;
   int num_bytes = 2;
   if (mod == 3) {
     const char* mnem = NULL;
     switch (regop) {
@@ skipping 22 matching lines @@
       AppendToBuffer("cl");
     }
   } else {
     UnimplementedInstruction();
   }
   return num_bytes;
 }
 
 
 // Returns number of bytes used, including *data.
-int DisassemblerIA32::JumpShort(byte* data) {
+int DisassemblerX87::JumpShort(byte* data) {
   ASSERT_EQ(0xEB, *data);
   byte b = *(data+1);
   byte* dest = data + static_cast<int8_t>(b) + 2;
   AppendToBuffer("jmp %s", NameOfAddress(dest));
   return 2;
 }
 
 
 // Returns number of bytes used, including *data.
-int DisassemblerIA32::JumpConditional(byte* data, const char* comment) {
+int DisassemblerX87::JumpConditional(byte* data, const char* comment) {
   ASSERT_EQ(0x0F, *data);
   byte cond = *(data+1) & 0x0F;
   byte* dest = data + *reinterpret_cast<int32_t*>(data+2) + 6;
   const char* mnem = jump_conditional_mnem[cond];
   AppendToBuffer("%s %s", mnem, NameOfAddress(dest));
   if (comment != NULL) {
     AppendToBuffer(", %s", comment);
   }
   return 6;  // includes 0x0F
 }
 
 
 // Returns number of bytes used, including *data.
-int DisassemblerIA32::JumpConditionalShort(byte* data, const char* comment) {
+int DisassemblerX87::JumpConditionalShort(byte* data, const char* comment) {
   byte cond = *data & 0x0F;
   byte b = *(data+1);
   byte* dest = data + static_cast<int8_t>(b) + 2;
   const char* mnem = jump_conditional_mnem[cond];
   AppendToBuffer("%s %s", mnem, NameOfAddress(dest));
   if (comment != NULL) {
     AppendToBuffer(", %s", comment);
   }
   return 2;
 }
 
 
 // Returns number of bytes used, including *data.
-int DisassemblerIA32::SetCC(byte* data) {
+int DisassemblerX87::SetCC(byte* data) {
   ASSERT_EQ(0x0F, *data);
   byte cond = *(data+1) & 0x0F;
   const char* mnem = set_conditional_mnem[cond];
   AppendToBuffer("%s ", mnem);
   PrintRightByteOperand(data+2);
   return 3;  // Includes 0x0F.
 }
 
 
 // Returns number of bytes used, including *data.
-int DisassemblerIA32::CMov(byte* data) {
+int DisassemblerX87::CMov(byte* data) {
   ASSERT_EQ(0x0F, *data);
   byte cond = *(data + 1) & 0x0F;
   const char* mnem = conditional_move_mnem[cond];
   int op_size = PrintOperands(mnem, REG_OPER_OP_ORDER, data + 2);
   return 2 + op_size;  // includes 0x0F
 }
 
 
 // Returns number of bytes used, including *data.
-int DisassemblerIA32::FPUInstruction(byte* data) {
+int DisassemblerX87::FPUInstruction(byte* data) {
   byte escape_opcode = *data;
   ASSERT_EQ(0xD8, escape_opcode & 0xF8);
   byte modrm_byte = *(data+1);
 
   if (modrm_byte >= 0xC0) {
     return RegisterFPUInstruction(escape_opcode, modrm_byte);
   } else {
     return MemoryFPUInstruction(escape_opcode, modrm_byte, data+1);
   }
 }
 
-int DisassemblerIA32::MemoryFPUInstruction(int escape_opcode,
+int DisassemblerX87::MemoryFPUInstruction(int escape_opcode,
                                            int modrm_byte,
                                            byte* modrm_start) {
   const char* mnem = "?";
   int regop = (modrm_byte >> 3) & 0x7;  // reg/op field of modrm byte.
   switch (escape_opcode) {
     case 0xD9: switch (regop) {
         case 0: mnem = "fld_s"; break;
         case 2: mnem = "fst_s"; break;
         case 3: mnem = "fstp_s"; break;
         case 7: mnem = "fstcw"; break;
@@ skipping 26 matching lines @@
       }
       break;
 
     default: UnimplementedInstruction();
   }
   AppendToBuffer("%s ", mnem);
   int count = PrintRightOperand(modrm_start);
   return count + 1;
 }
 
-int DisassemblerIA32::RegisterFPUInstruction(int escape_opcode,
+int DisassemblerX87::RegisterFPUInstruction(int escape_opcode,
                                              byte modrm_byte) {
   bool has_register = false;  // Is the FPU register encoded in modrm_byte?
   const char* mnem = "?";
 
   switch (escape_opcode) {
     case 0xD8:
       has_register = true;
       switch (modrm_byte & 0xF8) {
         case 0xC0: mnem = "fadd_i"; break;
         case 0xE0: mnem = "fsub_i"; break;
@@ skipping 130 matching lines @@
     case 0xAD: return "shrd";
     case 0xAC: return "shrd";  // 3-operand version.
     case 0xAB: return "bts";
     case 0xBD: return "bsr";
     default: return NULL;
   }
 }
 
 
 // Disassembled instruction '*instr' and writes it into 'out_buffer'.
-int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
+int DisassemblerX87::InstructionDecode(v8::internal::Vector<char> out_buffer,
                                         byte* instr) {
   tmp_buffer_pos_ = 0;  // starting to write as position 0
   byte* data = instr;
   // Check for hints.
   const char* branch_hint = NULL;
   // We use these two prefixes only with branch prediction
   if (*data == 0x3E /*ds*/) {
     branch_hint = "predicted taken";
     data++;
   } else if (*data == 0x2E /*cs*/) {
@@ skipping 815 matching lines @@
 }
 
 
 const char* NameConverter::NameOfXMMRegister(int reg) const {
   if (0 <= reg && reg < 8) return xmm_regs[reg];
   return "noxmmreg";
 }
 
 
 const char* NameConverter::NameInCode(byte* addr) const {
-  // IA32 does not embed debug strings at the moment.
+  // X87 does not embed debug strings at the moment.
   UNREACHABLE();
   return "";
 }
 
 
 //------------------------------------------------------------------------------
 
 Disassembler::Disassembler(const NameConverter& converter)
     : converter_(converter) {}
 
 
 Disassembler::~Disassembler() {}
 
 
 int Disassembler::InstructionDecode(v8::internal::Vector<char> buffer,
                                     byte* instruction) {
-  DisassemblerIA32 d(converter_, false /*do not crash if unimplemented*/);
+  DisassemblerX87 d(converter_, false /*do not crash if unimplemented*/);
   return d.InstructionDecode(buffer, instruction);
 }
 
 
 // The IA-32 assembler does not currently use constant pools.
 int Disassembler::ConstantPoolSizeAt(byte* instruction) { return -1; }
 
 
 /*static*/ void Disassembler::Disassemble(FILE* f, byte* begin, byte* end) {
   NameConverter converter;
@@ skipping 12 matching lines @@
     for (int i = 6 - (pc - prev_pc); i >= 0; i--) {
       fprintf(f, "  ");
     }
     fprintf(f, "  %s\n", buffer.start());
   }
 }
 
 
 }  // namespace disasm
 
-#endif  // V8_TARGET_ARCH_IA32
+#endif  // V8_TARGET_ARCH_X87