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Issue 293093004: PNaCl SIMD documentation: fix vector-scalar examples, currently unsupported by LLVM (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/src
Patch Set: Created 6 years, 7 months ago
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1 ============================ 1 ============================
2 PNaCl C/C++ Language Support 2 PNaCl C/C++ Language Support
3 ============================ 3 ============================
4 4
5 .. contents:: 5 .. contents::
6 :local: 6 :local:
7 :backlinks: none 7 :backlinks: none
8 :depth: 3 8 :depth: 3
9 9
10 Source language support 10 Source language support
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225 225
226 Vector types can be used through the ``vector_size`` attribute: 226 Vector types can be used through the ``vector_size`` attribute:
227 227
228 .. naclcode:: 228 .. naclcode::
229 229
230 #define VECTOR_BYTES 16 230 #define VECTOR_BYTES 16
231 typedef int v4s __attribute__((vector_size(VECTOR_BYTES))); 231 typedef int v4s __attribute__((vector_size(VECTOR_BYTES)));
232 v4s a = {1,2,3,4}; 232 v4s a = {1,2,3,4};
233 v4s b = {5,6,7,8}; 233 v4s b = {5,6,7,8};
234 v4s c, d, e; 234 v4s c, d, e;
235 c = b + 1; /* c = b + {1,1,1,1}; */ 235 c = a + b; /* c = {6,8,10,12} */
236 d = 2 * b; /* d = {2,2,2,2} * b; */ 236 d = b >> a; /* d = {2,1,0,0} */
237 e = c + d;
238 237
239 Vector comparisons are represented as a bitmask as wide as the compared 238 Vector comparisons are represented as a bitmask as wide as the compared
240 elements of all ``0`` or all ``1``: 239 elements of all ``0`` or all ``1``:
241 240
242 .. naclcode:: 241 .. naclcode::
243 242
244 typedef int v4s __attribute__((vector_size(16))); 243 typedef int v4s __attribute__((vector_size(16)));
245 v4s snip(v4s in) { 244 v4s snip(v4s in) {
246 v4s limit = {32,64,128,256}; 245 v4s limit = {32,64,128,256};
247 v4s mask = in > limit; 246 v4s mask = in > limit;
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328 327
329 The result of ``__builtin_shufflevector`` is a vector with the same 328 The result of ``__builtin_shufflevector`` is a vector with the same
330 element type as ``vec1`` / ``vec2`` but that has an element count equal 329 element type as ``vec1`` / ``vec2`` but that has an element count equal
331 to the number of indices specified. 330 to the number of indices specified.
332 331
333 .. naclcode:: 332 .. naclcode::
334 333
335 // identity operation - return 4-element vector v1. 334 // identity operation - return 4-element vector v1.
336 __builtin_shufflevector(v1, v1, 0, 1, 2, 3) 335 __builtin_shufflevector(v1, v1, 0, 1, 2, 3)
337 336
338 // "Splat" element 0 of V1 into a 4-element result. 337 // "Splat" element 0 of v1 into a 4-element result.
339 __builtin_shufflevector(V1, V1, 0, 0, 0, 0) 338 __builtin_shufflevector(v1, v1, 0, 0, 0, 0)
340 339
341 // Reverse 4-element vector V1. 340 // Reverse 4-element vector v1.
342 __builtin_shufflevector(V1, V1, 3, 2, 1, 0) 341 __builtin_shufflevector(v1, v1, 3, 2, 1, 0)
343 342
344 // Concatenate every other element of 4-element vectors V1 and V2. 343 // Concatenate every other element of 4-element vectors v1 and v2.
345 __builtin_shufflevector(V1, V2, 0, 2, 4, 6) 344 __builtin_shufflevector(v1, v2, 0, 2, 4, 6)
346 345
347 // Concatenate every other element of 8-element vectors V1 and V2. 346 // Concatenate every other element of 8-element vectors v1 and v2.
348 __builtin_shufflevector(V1, V2, 0, 2, 4, 6, 8, 10, 12, 14) 347 __builtin_shufflevector(v1, v2, 0, 2, 4, 6, 8, 10, 12, 14)
349 348
350 // Shuffle v1 with some elements being undefined 349 // Shuffle v1 with some elements being undefined
351 __builtin_shufflevector(v1, v1, 3, -1, 1, -1) 350 __builtin_shufflevector(v1, v1, 3, -1, 1, -1)
352 351
352 One common use of ``__builtin_shufflevector`` is to perform
353 vector-scalar operations:
354
355 .. naclcode::
356
357 typedef int v4s __attribute__((vector_size(16)));
358 v4s shift_right_by(v4s shift_me, int shift_amount) {
359 v4s tmp = {shift_amount};
360 return shift_me >> __builtin_shuffle_vector(tmp, tmp, 0, 0, 0, 0);
361 }
362
353 Auto-Vectorization 363 Auto-Vectorization
354 ------------------ 364 ------------------
355 365
356 Auto-vectorization is currently not enabled for Portable Native Client, 366 Auto-vectorization is currently not enabled for Portable Native Client,
357 but will be in a future release. 367 but will be in a future release.
358 368
359 Undefined Behavior 369 Undefined Behavior
360 ================== 370 ==================
361 371
362 The C and C++ languages expose some undefined behavior which is 372 The C and C++ languages expose some undefined behavior which is
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438 A similar feature is **thread suspension**: The ability to 448 A similar feature is **thread suspension**: The ability to
439 asynchronously suspend and resume a thread and inspect or modify its 449 asynchronously suspend and resume a thread and inspect or modify its
440 execution state (such as register state). 450 execution state (such as register state).
441 451
442 Neither PNaCl nor NaCl currently support asynchronous interruption 452 Neither PNaCl nor NaCl currently support asynchronous interruption
443 or suspension of threads. 453 or suspension of threads.
444 454
445 If PNaCl were to support either of these, the interaction of 455 If PNaCl were to support either of these, the interaction of
446 ``volatile`` and atomics with same-thread signal handling would need 456 ``volatile`` and atomics with same-thread signal handling would need
447 to be carefully detailed. 457 to be carefully detailed.
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