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Unified Diff: runtime/vm/stub_code_arm.cc

Issue 292433008: Allows unboxed doubles to be disabled. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 7 months ago
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Index: runtime/vm/stub_code_arm.cc
===================================================================
--- runtime/vm/stub_code_arm.cc (revision 36258)
+++ runtime/vm/stub_code_arm.cc (working copy)
@@ -7,6 +7,7 @@
#include "vm/assembler.h"
#include "vm/code_generator.h"
+#include "vm/cpu.h"
#include "vm/compiler.h"
#include "vm/dart_entry.h"
#include "vm/flow_graph_compiler.h"
@@ -484,12 +485,17 @@
// Push registers in their enumeration order: lowest register number at
// lowest address.
__ PushList(kAllCpuRegistersList);
- ASSERT(kFpuRegisterSize == 4 * kWordSize);
- if (kNumberOfDRegisters > 16) {
- __ vstmd(DB_W, SP, D16, kNumberOfDRegisters - 16);
- __ vstmd(DB_W, SP, D0, 16);
+
+ if (TargetCPUFeatures::vfp_supported()) {
+ ASSERT(kFpuRegisterSize == 4 * kWordSize);
+ if (kNumberOfDRegisters > 16) {
+ __ vstmd(DB_W, SP, D16, kNumberOfDRegisters - 16);
+ __ vstmd(DB_W, SP, D0, 16);
+ } else {
+ __ vstmd(DB_W, SP, D0, kNumberOfDRegisters);
+ }
} else {
- __ vstmd(DB_W, SP, D0, kNumberOfDRegisters);
+ __ AddImmediate(SP, SP, -kNumberOfFpuRegisters * kFpuRegisterSize);
}
__ mov(R0, ShifterOperand(SP)); // Pass address of saved registers block.
@@ -735,9 +741,14 @@
__ PushList((1 << R3) | kAbiPreservedCpuRegs);
const DRegister firstd = EvenDRegisterOf(kAbiFirstPreservedFpuReg);
- ASSERT(2 * kAbiPreservedFpuRegCount < 16);
- // Save FPU registers. 2 D registers per Q register.
- __ vstmd(DB_W, SP, firstd, 2 * kAbiPreservedFpuRegCount);
+ if (TargetCPUFeatures::vfp_supported()) {
+ ASSERT(2 * kAbiPreservedFpuRegCount < 16);
+ // Save FPU registers. 2 D registers per Q register.
+ __ vstmd(DB_W, SP, firstd, 2 * kAbiPreservedFpuRegCount);
+ } else {
+ __ sub(SP, SP,
+ ShifterOperand(kAbiPreservedFpuRegCount * kFpuRegisterSize));
+ }
// We now load the pool pointer(PP) as we are about to invoke dart code and we
// could potentially invoke some intrinsic functions which need the PP to be
@@ -836,8 +847,13 @@
__ StoreToOffset(kWord, R4, CTX, Isolate::vm_tag_offset());
// Restore C++ ABI callee-saved registers.
- // Restore FPU registers. 2 D registers per Q register.
- __ vldmd(IA_W, SP, firstd, 2 * kAbiPreservedFpuRegCount);
+ if (TargetCPUFeatures::vfp_supported()) {
+ // Restore FPU registers. 2 D registers per Q register.
+ __ vldmd(IA_W, SP, firstd, 2 * kAbiPreservedFpuRegCount);
+ } else {
+ __ add(SP, SP,
+ ShifterOperand(kAbiPreservedFpuRegCount * kFpuRegisterSize));
+ }
// Restore CPU registers.
__ PopList((1 << R3) | kAbiPreservedCpuRegs); // Ignore restored R3.
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