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Side by Side Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 2923103003: [WASM] Simplify SIMD shuffle opcodes. (Closed)
Patch Set: Mircea's review comments. Created 3 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 2517 matching lines...) Expand 10 before | Expand all | Expand 10 after
2528 #undef SIMD_VISIT_BINOP 2528 #undef SIMD_VISIT_BINOP
2529 2529
2530 void InstructionSelector::VisitS128Select(Node* node) { 2530 void InstructionSelector::VisitS128Select(Node* node) {
2531 ArmOperandGenerator g(this); 2531 ArmOperandGenerator g(this);
2532 Emit(kArmS128Select, g.DefineSameAsFirst(node), 2532 Emit(kArmS128Select, g.DefineSameAsFirst(node),
2533 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), 2533 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)),
2534 g.UseRegister(node->InputAt(2))); 2534 g.UseRegister(node->InputAt(2)));
2535 } 2535 }
2536 2536
2537 namespace { 2537 namespace {
2538 template <int LANES> 2538
2539 // Tries to match 8x16 byte shuffle to equivalent 32x4 word shuffle.
2540 bool TryMatch32x4Shuffle(const uint8_t* shuffle, uint8_t* shuffle32x4) {
2541 static const int kLanes = 4;
2542 static const int kLaneSize = 4;
2543 for (int i = 0; i < kLanes; ++i) {
2544 if (shuffle[i * kLaneSize] % kLaneSize != 0) return false;
2545 for (int j = 1; j < kLaneSize; ++j) {
2546 if (shuffle[i * kLaneSize + j] - shuffle[i * kLaneSize + j - 1] != 1)
2547 return false;
2548 }
2549 shuffle32x4[i] = shuffle[i * kLaneSize] / kLaneSize;
2550 }
2551 return true;
2552 }
2553
2554 // Tries to match byte shuffle to concatenate (vext) operation.
2555 bool TryMatchConcat(const uint8_t* shuffle, uint8_t mask, uint8_t* offset) {
2556 uint8_t start = shuffle[0];
2557 for (int i = 1; i < kSimd128Size - start; ++i) {
2558 if ((shuffle[i] & mask) != ((shuffle[i - 1] + 1) & mask)) return false;
2559 }
2560 uint8_t wrap = kSimd128Size;
2561 for (int i = kSimd128Size - start; i < kSimd128Size; ++i, ++wrap) {
2562 if ((shuffle[i] & mask) != (wrap & mask)) return false;
2563 }
2564 *offset = start;
2565 return true;
2566 }
2567
2539 struct ShuffleEntry { 2568 struct ShuffleEntry {
2540 uint8_t shuffle[LANES]; 2569 uint8_t shuffle[kSimd128Size];
2541 ArchOpcode opcode; 2570 ArchOpcode opcode;
2542 }; 2571 };
2543 2572
2544 static const ShuffleEntry<4> arch_s32x4_shuffles[] = { 2573 static const ShuffleEntry arch_shuffles[] = {
2545 {{0, 4, 1, 5}, kArmS32x4ZipLeft}, 2574 {{0, 1, 2, 3, 16, 17, 18, 19, 4, 5, 6, 7, 20, 21, 22, 23},
2546 {{2, 6, 3, 7}, kArmS32x4ZipRight}, 2575 kArmS32x4ZipLeft},
2547 {{0, 2, 4, 6}, kArmS32x4UnzipLeft}, 2576 {{8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31},
2548 {{1, 3, 5, 7}, kArmS32x4UnzipRight}, 2577 kArmS32x4ZipRight},
2549 {{0, 4, 2, 6}, kArmS32x4TransposeLeft}, 2578 {{0, 1, 2, 3, 8, 9, 10, 11, 16, 17, 18, 19, 24, 25, 26, 27},
2550 {{1, 5, 3, 7}, kArmS32x4TransposeRight}, 2579 kArmS32x4UnzipLeft},
2551 {{1, 0, 3, 2}, kArmS32x2Reverse}}; 2580 {{4, 5, 6, 7, 12, 13, 14, 15, 20, 21, 22, 23, 28, 29, 30, 31},
2581 kArmS32x4UnzipRight},
2582 {{0, 1, 2, 3, 16, 17, 18, 19, 8, 9, 10, 11, 24, 25, 26, 27},
2583 kArmS32x4TransposeLeft},
2584 {{4, 5, 6, 7, 20, 21, 22, 23, 12, 13, 14, 15, 28, 29, 30, 31},
2585 kArmS32x4TransposeRight},
2586 {{4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11}, kArmS32x2Reverse},
2552 2587
2553 static const ShuffleEntry<8> arch_s16x8_shuffles[] = { 2588 {{0, 1, 16, 17, 2, 3, 18, 19, 4, 5, 20, 21, 6, 7, 22, 23},
2554 {{0, 8, 1, 9, 2, 10, 3, 11}, kArmS16x8ZipLeft}, 2589 kArmS16x8ZipLeft},
2555 {{4, 12, 5, 13, 6, 14, 7, 15}, kArmS16x8ZipRight}, 2590 {{8, 9, 24, 25, 10, 11, 26, 27, 12, 13, 28, 29, 14, 15, 30, 31},
2556 {{0, 2, 4, 6, 8, 10, 12, 14}, kArmS16x8UnzipLeft}, 2591 kArmS16x8ZipRight},
2557 {{1, 3, 5, 7, 9, 11, 13, 15}, kArmS16x8UnzipRight}, 2592 {{0, 1, 4, 5, 8, 9, 12, 13, 16, 17, 20, 21, 24, 25, 28, 29},
2558 {{0, 8, 2, 10, 4, 12, 6, 14}, kArmS16x8TransposeLeft}, 2593 kArmS16x8UnzipLeft},
2559 {{1, 9, 3, 11, 5, 13, 7, 15}, kArmS16x8TransposeRight}, 2594 {{2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31},
2560 {{3, 2, 1, 0, 7, 6, 5, 4}, kArmS16x4Reverse}, 2595 kArmS16x8UnzipRight},
2561 {{1, 0, 3, 2, 5, 4, 7, 6}, kArmS16x2Reverse}}; 2596 {{0, 1, 16, 17, 4, 5, 20, 21, 8, 9, 24, 25, 12, 13, 28, 29},
2597 kArmS16x8TransposeLeft},
2598 {{2, 3, 18, 19, 6, 7, 22, 23, 10, 11, 26, 27, 14, 15, 30, 31},
2599 kArmS16x8TransposeRight},
2600 {{6, 7, 4, 5, 2, 3, 0, 1, 14, 15, 12, 13, 10, 11, 8, 9}, kArmS16x4Reverse},
2601 {{2, 3, 0, 1, 6, 7, 4, 5, 10, 11, 8, 9, 14, 15, 12, 13}, kArmS16x2Reverse},
2562 2602
2563 static const ShuffleEntry<16> arch_s8x16_shuffles[] = {
2564 {{0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23}, 2603 {{0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23},
2565 kArmS8x16ZipLeft}, 2604 kArmS8x16ZipLeft},
2566 {{8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31}, 2605 {{8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31},
2567 kArmS8x16ZipRight}, 2606 kArmS8x16ZipRight},
2568 {{0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30}, 2607 {{0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30},
2569 kArmS8x16UnzipLeft}, 2608 kArmS8x16UnzipLeft},
2570 {{1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31}, 2609 {{1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31},
2571 kArmS8x16UnzipRight}, 2610 kArmS8x16UnzipRight},
2572 {{0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30}, 2611 {{0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30},
2573 kArmS8x16TransposeLeft}, 2612 kArmS8x16TransposeLeft},
2574 {{1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31}, 2613 {{1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31},
2575 kArmS8x16TransposeRight}, 2614 kArmS8x16TransposeRight},
2576 {{7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8}, kArmS8x8Reverse}, 2615 {{7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8}, kArmS8x8Reverse},
2577 {{3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12}, kArmS8x4Reverse}, 2616 {{3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12}, kArmS8x4Reverse},
2578 {{1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14}, kArmS8x2Reverse}}; 2617 {{1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14}, kArmS8x2Reverse}};
2579 2618
2580 // Use a non-shuffle opcode to signal no match. 2619 bool TryMatchArchShuffle(const uint8_t* shuffle, const ShuffleEntry* table,
2581 static const ArchOpcode kNoShuffle = kArmS128Not; 2620 size_t num_entries, uint8_t mask, ArchOpcode* opcode) {
2582 2621 for (size_t i = 0; i < num_entries; ++i) {
2583 template <int LANES> 2622 const ShuffleEntry& entry = table[i];
2584 ArchOpcode TryMatchArchShuffle(const uint8_t* shuffle,
2585 const ShuffleEntry<LANES>* table,
2586 size_t num_entries, uint8_t mask) {
2587 for (size_t i = 0; i < num_entries; i++) {
2588 const ShuffleEntry<LANES>& entry = table[i];
2589 int j = 0; 2623 int j = 0;
2590 for (; j < LANES; j++) { 2624 for (; j < kSimd128Size; ++j) {
2591 if ((entry.shuffle[j] & mask) != (shuffle[j] & mask)) { 2625 if ((entry.shuffle[j] & mask) != (shuffle[j] & mask)) {
2592 break; 2626 break;
2593 } 2627 }
2594 } 2628 }
2595 if (j == LANES) return entry.opcode; 2629 if (j == kSimd128Size) {
2630 *opcode = entry.opcode;
2631 return true;
2632 }
2596 } 2633 }
2597 return kNoShuffle; 2634 return false;
2598 }
2599
2600 // Returns the bias if shuffle is a concatenation, 0 otherwise.
2601 template <int LANES>
2602 uint8_t TryMatchConcat(const uint8_t* shuffle, uint8_t mask) {
2603 uint8_t start = shuffle[0];
2604 int i = 1;
2605 for (; i < LANES - start; i++) {
2606 if ((shuffle[i] & mask) != ((shuffle[i - 1] + 1) & mask)) return 0;
2607 }
2608 uint8_t wrap = LANES;
2609 for (; i < LANES; i++, wrap++) {
2610 if ((shuffle[i] & mask) != (wrap & mask)) return 0;
2611 }
2612 return start;
2613 } 2635 }
2614 2636
2615 // Canonicalize shuffles to make pattern matching simpler. Returns a mask that 2637 // Canonicalize shuffles to make pattern matching simpler. Returns a mask that
2616 // will ignore the high bit of indices in some cases. 2638 // will ignore the high bit of indices in some cases.
2617 uint8_t CanonicalizeShuffle(InstructionSelector* selector, Node* node, 2639 uint8_t CanonicalizeShuffle(InstructionSelector* selector, Node* node) {
2618 int num_lanes) { 2640 static const int kUnaryShuffleMask = kSimd128Size - 1;
2619 const uint8_t* shuffle = OpParameter<uint8_t*>(node); 2641 const uint8_t* shuffle = OpParameter<uint8_t*>(node);
2620 uint8_t mask = 0xff; 2642 uint8_t mask = 0xff;
2621 // If shuffle is unary, set 'mask' to ignore the high bit of the indices. 2643 // If shuffle is unary, set 'mask' to ignore the high bit of the indices.
2622 // Replace any unused source with the other. 2644 // Replace any unused source with the other.
2623 if (selector->GetVirtualRegister(node->InputAt(0)) == 2645 if (selector->GetVirtualRegister(node->InputAt(0)) ==
2624 selector->GetVirtualRegister(node->InputAt(1))) { 2646 selector->GetVirtualRegister(node->InputAt(1))) {
2625 // unary, src0 == src1. 2647 // unary, src0 == src1.
2626 mask = num_lanes - 1; 2648 mask = kUnaryShuffleMask;
2627 } else { 2649 } else {
2628 bool src0_is_used = false; 2650 bool src0_is_used = false;
2629 bool src1_is_used = false; 2651 bool src1_is_used = false;
2630 for (int i = 0; i < num_lanes; i++) { 2652 for (int i = 0; i < kSimd128Size; i++) {
2631 if (shuffle[i] < num_lanes) { 2653 if (shuffle[i] < kSimd128Size) {
2632 src0_is_used = true; 2654 src0_is_used = true;
2633 } else { 2655 } else {
2634 src1_is_used = true; 2656 src1_is_used = true;
2635 } 2657 }
2636 } 2658 }
2637 if (src0_is_used && !src1_is_used) { 2659 if (src0_is_used && !src1_is_used) {
2638 node->ReplaceInput(1, node->InputAt(0)); 2660 node->ReplaceInput(1, node->InputAt(0));
2639 mask = num_lanes - 1; 2661 mask = kUnaryShuffleMask;
2640 } else if (src1_is_used && !src0_is_used) { 2662 } else if (src1_is_used && !src0_is_used) {
2641 node->ReplaceInput(0, node->InputAt(1)); 2663 node->ReplaceInput(0, node->InputAt(1));
2642 mask = num_lanes - 1; 2664 mask = kUnaryShuffleMask;
2643 } 2665 }
2644 } 2666 }
2645 return mask; 2667 return mask;
2646 } 2668 }
2647 2669
2648 int32_t Pack4Lanes(const uint8_t* shuffle, uint8_t mask) { 2670 int32_t Pack4Lanes(const uint8_t* shuffle, uint8_t mask) {
2649 int32_t result = 0; 2671 int32_t result = 0;
2650 for (int i = 3; i >= 0; i--) { 2672 for (int i = 3; i >= 0; --i) {
2651 result <<= 8; 2673 result <<= 8;
2652 result |= shuffle[i] & mask; 2674 result |= shuffle[i] & mask;
2653 } 2675 }
2654 return result; 2676 return result;
2655 } 2677 }
2656 2678
2657 void ArrangeShuffleTable(ArmOperandGenerator* g, Node* input0, Node* input1, 2679 void ArrangeShuffleTable(ArmOperandGenerator* g, Node* input0, Node* input1,
2658 InstructionOperand* src0, InstructionOperand* src1) { 2680 InstructionOperand* src0, InstructionOperand* src1) {
2659 if (input0 == input1) { 2681 if (input0 == input1) {
2660 // Unary, any q-register can be the table. 2682 // Unary, any q-register can be the table.
2661 *src0 = *src1 = g->UseRegister(input0); 2683 *src0 = *src1 = g->UseRegister(input0);
2662 } else { 2684 } else {
2663 // Binary, table registers must be consecutive. 2685 // Binary, table registers must be consecutive.
2664 *src0 = g->UseFixed(input0, q0); 2686 *src0 = g->UseFixed(input0, q0);
2665 *src1 = g->UseFixed(input1, q1); 2687 *src1 = g->UseFixed(input1, q1);
2666 } 2688 }
2667 } 2689 }
2668 2690
2669 } // namespace 2691 } // namespace
2670 2692
2671 void InstructionSelector::VisitS32x4Shuffle(Node* node) { 2693 void InstructionSelector::VisitS8x16Shuffle(Node* node) {
2672 const uint8_t* shuffle = OpParameter<uint8_t*>(node); 2694 const uint8_t* shuffle = OpParameter<uint8_t*>(node);
2673 uint8_t mask = CanonicalizeShuffle(this, node, 4); 2695 uint8_t mask = CanonicalizeShuffle(this, node);
2674 ArchOpcode opcode = TryMatchArchShuffle<4>( 2696 uint8_t shuffle32x4[4];
2675 shuffle, arch_s32x4_shuffles, arraysize(arch_s32x4_shuffles), mask); 2697 ArmOperandGenerator g(this);
2676 if (opcode != kNoShuffle) { 2698 if (TryMatch32x4Shuffle(shuffle, shuffle32x4)) {
2699 Emit(kArmS32x4Shuffle, g.DefineAsRegister(node),
2700 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)),
2701 g.UseImmediate(Pack4Lanes(shuffle32x4, mask)));
2702 return;
2703 }
2704 ArchOpcode opcode;
2705 if (TryMatchArchShuffle(shuffle, arch_shuffles, arraysize(arch_shuffles),
2706 mask, &opcode)) {
2677 VisitRRRShuffle(this, opcode, node); 2707 VisitRRRShuffle(this, opcode, node);
2678 return; 2708 return;
2679 } 2709 }
2680 ArmOperandGenerator g(this);
2681 uint8_t lanes = TryMatchConcat<4>(shuffle, mask);
2682 if (lanes != 0) {
2683 Emit(kArmS8x16Concat, g.DefineAsRegister(node),
2684 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)),
2685 g.UseImmediate(lanes * 4));
2686 return;
2687 }
2688 Emit(kArmS32x4Shuffle, g.DefineAsRegister(node),
2689 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)),
2690 g.UseImmediate(Pack4Lanes(shuffle, mask)));
2691 }
2692
2693 void InstructionSelector::VisitS16x8Shuffle(Node* node) {
2694 const uint8_t* shuffle = OpParameter<uint8_t*>(node);
2695 uint8_t mask = CanonicalizeShuffle(this, node, 8);
2696 ArchOpcode opcode = TryMatchArchShuffle<8>(
2697 shuffle, arch_s16x8_shuffles, arraysize(arch_s16x8_shuffles), mask);
2698 if (opcode != kNoShuffle) {
2699 VisitRRRShuffle(this, opcode, node);
2700 return;
2701 }
2702 ArmOperandGenerator g(this);
2703 Node* input0 = node->InputAt(0); 2710 Node* input0 = node->InputAt(0);
2704 Node* input1 = node->InputAt(1); 2711 Node* input1 = node->InputAt(1);
2705 uint8_t lanes = TryMatchConcat<8>(shuffle, mask); 2712 uint8_t offset;
2706 if (lanes != 0) { 2713 if (TryMatchConcat(shuffle, mask, &offset)) {
2707 Emit(kArmS8x16Concat, g.DefineAsRegister(node), g.UseRegister(input0), 2714 Emit(kArmS8x16Concat, g.DefineAsRegister(node), g.UseRegister(input0),
2708 g.UseRegister(input1), g.UseImmediate(lanes * 2)); 2715 g.UseRegister(input1), g.UseImmediate(offset));
2709 return; 2716 return;
2710 } 2717 }
2711 // Code generator uses vtbl, arrange sources to form a valid lookup table. 2718 // Code generator uses vtbl, arrange sources to form a valid lookup table.
2712 InstructionOperand src0, src1;
2713 ArrangeShuffleTable(&g, input0, input1, &src0, &src1);
2714 Emit(kArmS16x8Shuffle, g.DefineAsRegister(node), src0, src1,
2715 g.UseImmediate(Pack4Lanes(shuffle, mask)),
2716 g.UseImmediate(Pack4Lanes(shuffle + 4, mask)));
2717 }
2718
2719 void InstructionSelector::VisitS8x16Shuffle(Node* node) {
2720 const uint8_t* shuffle = OpParameter<uint8_t*>(node);
2721 uint8_t mask = CanonicalizeShuffle(this, node, 16);
2722 ArchOpcode opcode = TryMatchArchShuffle<16>(
2723 shuffle, arch_s8x16_shuffles, arraysize(arch_s8x16_shuffles), mask);
2724 if (opcode != kNoShuffle) {
2725 VisitRRRShuffle(this, opcode, node);
2726 return;
2727 }
2728 ArmOperandGenerator g(this);
2729 Node* input0 = node->InputAt(0);
2730 Node* input1 = node->InputAt(1);
2731 uint8_t lanes = TryMatchConcat<16>(shuffle, mask);
2732 if (lanes != 0) {
2733 Emit(kArmS8x16Concat, g.DefineAsRegister(node), g.UseRegister(input0),
2734 g.UseRegister(input1), g.UseImmediate(lanes));
2735 return;
2736 }
2737 // Code generator uses vtbl, arrange sources to form a valid lookup table.
2738 InstructionOperand src0, src1; 2719 InstructionOperand src0, src1;
2739 ArrangeShuffleTable(&g, input0, input1, &src0, &src1); 2720 ArrangeShuffleTable(&g, input0, input1, &src0, &src1);
2740 Emit(kArmS8x16Shuffle, g.DefineAsRegister(node), src0, src1, 2721 Emit(kArmS8x16Shuffle, g.DefineAsRegister(node), src0, src1,
2741 g.UseImmediate(Pack4Lanes(shuffle, mask)), 2722 g.UseImmediate(Pack4Lanes(shuffle, mask)),
2742 g.UseImmediate(Pack4Lanes(shuffle + 4, mask)), 2723 g.UseImmediate(Pack4Lanes(shuffle + 4, mask)),
2743 g.UseImmediate(Pack4Lanes(shuffle + 8, mask)), 2724 g.UseImmediate(Pack4Lanes(shuffle + 8, mask)),
2744 g.UseImmediate(Pack4Lanes(shuffle + 12, mask))); 2725 g.UseImmediate(Pack4Lanes(shuffle + 12, mask)));
2745 } 2726 }
2746 2727
2747 void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) { 2728 void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) {
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
2785 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); 2766 Vector<MachineType> req_aligned = Vector<MachineType>::New(2);
2786 req_aligned[0] = MachineType::Float32(); 2767 req_aligned[0] = MachineType::Float32();
2787 req_aligned[1] = MachineType::Float64(); 2768 req_aligned[1] = MachineType::Float64();
2788 return MachineOperatorBuilder::AlignmentRequirements:: 2769 return MachineOperatorBuilder::AlignmentRequirements::
2789 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); 2770 SomeUnalignedAccessUnsupported(req_aligned, req_aligned);
2790 } 2771 }
2791 2772
2792 } // namespace compiler 2773 } // namespace compiler
2793 } // namespace internal 2774 } // namespace internal
2794 } // namespace v8 2775 } // namespace v8
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