PPC/S390: [compiler] Delay allocation of code-embedded heap numbers.

src/s390/macro-assembler-s390.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <assert.h>  // For assert
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #if V8_TARGET_ARCH_S390
 
 #include "src/base/bits.h"
@@ skipping 3091 matching lines @@
     Register candidate = Register::from_code(code);
     if (regs & candidate.bit()) continue;
     return candidate;
   }
   UNREACHABLE();
 }
 
 void MacroAssembler::mov(Register dst, const Operand& src) {
   if (src.rmode_ != kRelocInfo_NONEPTR) {
     // some form of relocation needed
-    RecordRelocInfo(src.rmode_, src.imm_);
+    RecordRelocInfo(src.rmode_, src.immediate());
   }
 
 #if V8_TARGET_ARCH_S390X
   int64_t value = src.immediate();
   int32_t hi_32 = static_cast<int64_t>(value) >> 32;
   int32_t lo_32 = static_cast<int32_t>(value);
 
   iihf(dst, Operand(hi_32));
   iilf(dst, Operand(lo_32));
 #else
@@ skipping 633 matching lines @@
   } else {
     // dst == src2
     DCHECK(dst.is(src2));
     lr(r0, dst);
     SubLogical32(dst, src1, r0);
   }
 }
 
 // Subtract 32-bit (Register dst = Register dst - Immediate opnd)
 void MacroAssembler::Sub32(Register dst, const Operand& imm) {
-  Add32(dst, Operand(-(imm.imm_)));
+  Add32(dst, Operand(-(imm.immediate())));
 }
 
 // Subtract Pointer Size (Register dst = Register dst - Immediate opnd)
 void MacroAssembler::SubP(Register dst, const Operand& imm) {
-  AddP(dst, Operand(-(imm.imm_)));
+  AddP(dst, Operand(-(imm.immediate())));
 }
 
 // Subtract 32-bit (Register dst = Register src - Immediate opnd)
 void MacroAssembler::Sub32(Register dst, Register src, const Operand& imm) {
-  Add32(dst, src, Operand(-(imm.imm_)));
+  Add32(dst, src, Operand(-(imm.immediate())));
 }
 
 // Subtract Pointer Sized (Register dst = Register src - Immediate opnd)
 void MacroAssembler::SubP(Register dst, Register src, const Operand& imm) {
-  AddP(dst, src, Operand(-(imm.imm_)));
+  AddP(dst, src, Operand(-(imm.immediate())));
 }
 
 // Subtract 32-bit (Register dst = Register dst - Register src)
 void MacroAssembler::Sub32(Register dst, Register src) { sr(dst, src); }
 
 // Subtract Pointer Size (Register dst = Register dst - Register src)
 void MacroAssembler::SubP(Register dst, Register src) { SubRR(dst, src); }
 
 // Subtract Pointer Size with src extension
 //     (Register dst(ptr) = Register dst (ptr) - Register src (32 | 32->64))
@@ skipping 205 matching lines @@
   And(dst, opnd);
 #endif
 }
 
 // AND 32-bit - dst = dst & imm
 void MacroAssembler::And(Register dst, const Operand& opnd) { nilf(dst, opnd); }
 
 // AND Pointer Size - dst = dst & imm
 void MacroAssembler::AndP(Register dst, const Operand& opnd) {
 #if V8_TARGET_ARCH_S390X
-  intptr_t value = opnd.imm_;
+  intptr_t value = opnd.immediate();
   if (value >> 32 != -1) {
     // this may not work b/c condition code won't be set correctly
     nihf(dst, Operand(value >> 32));
   }
   nilf(dst, Operand(value & 0xFFFFFFFF));
 #else
   And(dst, opnd);
 #endif
 }
 
 // AND 32-bit - dst = src & imm
 void MacroAssembler::And(Register dst, Register src, const Operand& opnd) {
   if (!dst.is(src)) lr(dst, src);
   nilf(dst, opnd);
 }
 
 // AND Pointer Size - dst = src & imm
 void MacroAssembler::AndP(Register dst, Register src, const Operand& opnd) {
   // Try to exploit RISBG first
-  intptr_t value = opnd.imm_;
+  intptr_t value = opnd.immediate();
   if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
     intptr_t shifted_value = value;
     int trailing_zeros = 0;
 
     // We start checking how many trailing zeros are left at the end.
     while ((0 != shifted_value) && (0 == (shifted_value & 1))) {
       trailing_zeros++;
       shifted_value >>= 1;
     }
 
@@ skipping 81 matching lines @@
   Or(dst, opnd);
 #endif
 }
 
 // OR 32-bit - dst = dst & imm
 void MacroAssembler::Or(Register dst, const Operand& opnd) { oilf(dst, opnd); }
 
 // OR Pointer Size - dst = dst & imm
 void MacroAssembler::OrP(Register dst, const Operand& opnd) {
 #if V8_TARGET_ARCH_S390X
-  intptr_t value = opnd.imm_;
+  intptr_t value = opnd.immediate();
   if (value >> 32 != 0) {
     // this may not work b/c condition code won't be set correctly
     oihf(dst, Operand(value >> 32));
   }
   oilf(dst, Operand(value & 0xFFFFFFFF));
 #else
   Or(dst, opnd);
 #endif
 }
 
@@ skipping 67 matching lines @@
   Xor(dst, opnd);
 #endif
 }
 
 // XOR 32-bit - dst = dst & imm
 void MacroAssembler::Xor(Register dst, const Operand& opnd) { xilf(dst, opnd); }
 
 // XOR Pointer Size - dst = dst & imm
 void MacroAssembler::XorP(Register dst, const Operand& opnd) {
 #if V8_TARGET_ARCH_S390X
-  intptr_t value = opnd.imm_;
+  intptr_t value = opnd.immediate();
   xihf(dst, Operand(value >> 32));
   xilf(dst, Operand(value & 0xFFFFFFFF));
 #else
   Xor(dst, opnd);
 #endif
 }
 
 // XOR 32-bit - dst = src & imm
 void MacroAssembler::Xor(Register dst, Register src, const Operand& opnd) {
   if (!dst.is(src)) lr(dst, src);
@@ skipping 101 matching lines @@
 // This helper will set up proper relocation entries if required.
 void MacroAssembler::Cmp32(Register dst, const Operand& opnd) {
   if (opnd.rmode_ == kRelocInfo_NONEPTR) {
     intptr_t value = opnd.immediate();
     if (is_int16(value))
       chi(dst, opnd);
     else
       cfi(dst, opnd);
   } else {
     // Need to generate relocation record here
-    RecordRelocInfo(opnd.rmode_, opnd.imm_);
+    RecordRelocInfo(opnd.rmode_, opnd.immediate());
     cfi(dst, opnd);
   }
 }
 
 // Compare Pointer Sized  Register vs Immediate
 // This helper will set up proper relocation entries if required.
 void MacroAssembler::CmpP(Register dst, const Operand& opnd) {
 #if V8_TARGET_ARCH_S390X
   if (opnd.rmode_ == kRelocInfo_NONEPTR) {
     cgfi(dst, opnd);
@@ skipping 277 matching lines @@
 }
 
 // Store a "pointer" sized constant to the memory location
 void MacroAssembler::StoreP(const MemOperand& mem, const Operand& opnd,
                             Register scratch) {
   // Relocations not supported
   DCHECK(opnd.rmode_ == kRelocInfo_NONEPTR);
 
   // Try to use MVGHI/MVHI
   if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT) && is_uint12(mem.offset()) &&
-      mem.getIndexRegister().is(r0) && is_int16(opnd.imm_)) {
+      mem.getIndexRegister().is(r0) && is_int16(opnd.immediate())) {
 #if V8_TARGET_ARCH_S390X
     mvghi(mem, opnd);
 #else
     mvhi(mem, opnd);
 #endif
   } else {
     LoadImmP(scratch, opnd);
     StoreP(scratch, mem);
   }
 }
@@ skipping 589 matching lines @@
   } else {
     DCHECK(!dst.is(val));  // The lr/sra path clobbers val.
     lr(dst, src);
     sra(dst, val);
   }
 }
 
 // Clear right most # of bits
 void MacroAssembler::ClearRightImm(Register dst, Register src,
                                    const Operand& val) {
-  int numBitsToClear = val.imm_ % (kPointerSize * 8);
+  int numBitsToClear = val.immediate() % (kPointerSize * 8);
 
   // Try to use RISBG if possible
   if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
     int endBit = 63 - numBitsToClear;
     risbg(dst, src, Operand::Zero(), Operand(endBit), Operand::Zero(), true);
     return;
   }
 
   uint64_t hexMask = ~((1L << numBitsToClear) - 1);
 
@@ skipping 119 matching lines @@
   }
   if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift));
   ExtractBit(r0, dividend, 31);
   AddP(result, r0);
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_S390