PPC/S390: [compiler] Delay allocation of code-embedded heap numbers.

src/ppc/macro-assembler-ppc.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <assert.h>  // For assert
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #if V8_TARGET_ARCH_PPC
 
 #include "src/base/bits.h"
@@ skipping 109 matching lines @@
 
 #ifdef DEBUG
   // Check the expected size before generating code to ensure we assume the same
   // constant pool availability (e.g., whether constant pool is full or not).
   int expected_size = CallSize(target, rmode, cond);
   Label start;
   bind(&start);
 #endif
   // This can likely be optimized to make use of bc() with 24bit relative
   //
-  // RecordRelocInfo(x.rmode_, x.imm_);
+  // RecordRelocInfo(x.rmode_, x.immediate);
   // bc( BA, .... offset, LKset);
   //
 
   mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode));
   mtctr(ip);
   bctrl();
 
   DCHECK_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
 }
 
@@ skipping 3469 matching lines @@
     cmplw(src1, scratch, cr);
   }
 }
 
 
 void MacroAssembler::And(Register ra, Register rs, const Operand& rb,
                          RCBit rc) {
   if (rb.is_reg()) {
     and_(ra, rs, rb.rm(), rc);
   } else {
-    if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == SetRC) {
+    if (is_uint16(rb.immediate()) && RelocInfo::IsNone(rb.rmode_) &&
+        rc == SetRC) {
       andi(ra, rs, rb);
     } else {
       // mov handles the relocation.
       DCHECK(!rs.is(r0));
       mov(r0, rb);
       and_(ra, rs, r0, rc);
     }
   }
 }
 
 
 void MacroAssembler::Or(Register ra, Register rs, const Operand& rb, RCBit rc) {
   if (rb.is_reg()) {
     orx(ra, rs, rb.rm(), rc);
   } else {
-    if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == LeaveRC) {
+    if (is_uint16(rb.immediate()) && RelocInfo::IsNone(rb.rmode_) &&
+        rc == LeaveRC) {
       ori(ra, rs, rb);
     } else {
       // mov handles the relocation.
       DCHECK(!rs.is(r0));
       mov(r0, rb);
       orx(ra, rs, r0, rc);
     }
   }
 }
 
 
 void MacroAssembler::Xor(Register ra, Register rs, const Operand& rb,
                          RCBit rc) {
   if (rb.is_reg()) {
     xor_(ra, rs, rb.rm(), rc);
   } else {
-    if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == LeaveRC) {
+    if (is_uint16(rb.immediate()) && RelocInfo::IsNone(rb.rmode_) &&
+        rc == LeaveRC) {
       xori(ra, rs, rb);
     } else {
       // mov handles the relocation.
       DCHECK(!rs.is(r0));
       mov(r0, rb);
       xor_(ra, rs, r0, rc);
     }
   }
 }
 
@@ skipping 594 matching lines @@
   }
   if (mag.shift > 0) srawi(result, result, mag.shift);
   ExtractBit(r0, dividend, 31);
   add(result, result, r0);
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_PPC