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Issue 2919203002: [WASM] Eliminate SIMD boolean vector types. (Closed)
Patch Set: Restore DCHECKs in AssembleMove/Swap now that we're back to 1 SIMD representation. Created 3 years, 6 months ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/wasm-compiler.h" 5 #include "src/compiler/wasm-compiler.h"
6 6
7 #include <memory> 7 #include <memory>
8 8
9 #include "src/assembler-inl.h" 9 #include "src/assembler-inl.h"
10 #include "src/base/platform/elapsed-timer.h" 10 #include "src/base/platform/elapsed-timer.h"
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3174 DCHECK_NE(position, wasm::kNoCodePosition); 3174 DCHECK_NE(position, wasm::kNoCodePosition);
3175 if (source_position_table_) 3175 if (source_position_table_)
3176 source_position_table_->SetSourcePosition(node, SourcePosition(position)); 3176 source_position_table_->SetSourcePosition(node, SourcePosition(position));
3177 } 3177 }
3178 3178
3179 Node* WasmGraphBuilder::S128Zero() { 3179 Node* WasmGraphBuilder::S128Zero() {
3180 has_simd_ = true; 3180 has_simd_ = true;
3181 return graph()->NewNode(jsgraph()->machine()->S128Zero()); 3181 return graph()->NewNode(jsgraph()->machine()->S128Zero());
3182 } 3182 }
3183 3183
3184 Node* WasmGraphBuilder::S1x4Zero() {
3185 has_simd_ = true;
3186 return graph()->NewNode(jsgraph()->machine()->S1x4Zero());
3187 }
3188
3189 Node* WasmGraphBuilder::S1x8Zero() {
3190 has_simd_ = true;
3191 return graph()->NewNode(jsgraph()->machine()->S1x8Zero());
3192 }
3193
3194 Node* WasmGraphBuilder::S1x16Zero() {
3195 has_simd_ = true;
3196 return graph()->NewNode(jsgraph()->machine()->S1x16Zero());
3197 }
3198
3199 Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode, 3184 Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode,
3200 const NodeVector& inputs) { 3185 const NodeVector& inputs) {
3201 has_simd_ = true; 3186 has_simd_ = true;
3202 switch (opcode) { 3187 switch (opcode) {
3203 case wasm::kExprF32x4Splat: 3188 case wasm::kExprF32x4Splat:
3204 return graph()->NewNode(jsgraph()->machine()->F32x4Splat(), inputs[0]); 3189 return graph()->NewNode(jsgraph()->machine()->F32x4Splat(), inputs[0]);
3205 case wasm::kExprF32x4SConvertI32x4: 3190 case wasm::kExprF32x4SConvertI32x4:
3206 return graph()->NewNode(jsgraph()->machine()->F32x4SConvertI32x4(), 3191 return graph()->NewNode(jsgraph()->machine()->F32x4SConvertI32x4(),
3207 inputs[0]); 3192 inputs[0]);
3208 case wasm::kExprF32x4UConvertI32x4: 3193 case wasm::kExprF32x4UConvertI32x4:
(...skipping 286 matching lines...) Expand 10 before | Expand all | Expand 10 after
3495 return graph()->NewNode(jsgraph()->machine()->S128And(), inputs[0], 3480 return graph()->NewNode(jsgraph()->machine()->S128And(), inputs[0],
3496 inputs[1]); 3481 inputs[1]);
3497 case wasm::kExprS128Or: 3482 case wasm::kExprS128Or:
3498 return graph()->NewNode(jsgraph()->machine()->S128Or(), inputs[0], 3483 return graph()->NewNode(jsgraph()->machine()->S128Or(), inputs[0],
3499 inputs[1]); 3484 inputs[1]);
3500 case wasm::kExprS128Xor: 3485 case wasm::kExprS128Xor:
3501 return graph()->NewNode(jsgraph()->machine()->S128Xor(), inputs[0], 3486 return graph()->NewNode(jsgraph()->machine()->S128Xor(), inputs[0],
3502 inputs[1]); 3487 inputs[1]);
3503 case wasm::kExprS128Not: 3488 case wasm::kExprS128Not:
3504 return graph()->NewNode(jsgraph()->machine()->S128Not(), inputs[0]); 3489 return graph()->NewNode(jsgraph()->machine()->S128Not(), inputs[0]);
3505 case wasm::kExprS32x4Select: 3490 case wasm::kExprS128Select:
3506 return graph()->NewNode(jsgraph()->machine()->S32x4Select(), inputs[0], 3491 return graph()->NewNode(jsgraph()->machine()->S128Select(), inputs[0],
3507 inputs[1], inputs[2]); 3492 inputs[1], inputs[2]);
3508 case wasm::kExprS16x8Select:
3509 return graph()->NewNode(jsgraph()->machine()->S16x8Select(), inputs[0],
3510 inputs[1], inputs[2]);
3511 case wasm::kExprS8x16Select:
3512 return graph()->NewNode(jsgraph()->machine()->S8x16Select(), inputs[0],
3513 inputs[1], inputs[2]);
3514 case wasm::kExprS1x4And:
3515 return graph()->NewNode(jsgraph()->machine()->S1x4And(), inputs[0],
3516 inputs[1]);
3517 case wasm::kExprS1x4Or:
3518 return graph()->NewNode(jsgraph()->machine()->S1x4Or(), inputs[0],
3519 inputs[1]);
3520 case wasm::kExprS1x4Xor:
3521 return graph()->NewNode(jsgraph()->machine()->S1x4Xor(), inputs[0],
3522 inputs[1]);
3523 case wasm::kExprS1x4Not:
3524 return graph()->NewNode(jsgraph()->machine()->S1x4Not(), inputs[0]);
3525 case wasm::kExprS1x4AnyTrue: 3493 case wasm::kExprS1x4AnyTrue:
3526 return graph()->NewNode(jsgraph()->machine()->S1x4AnyTrue(), inputs[0]); 3494 return graph()->NewNode(jsgraph()->machine()->S1x4AnyTrue(), inputs[0]);
3527 case wasm::kExprS1x4AllTrue: 3495 case wasm::kExprS1x4AllTrue:
3528 return graph()->NewNode(jsgraph()->machine()->S1x4AllTrue(), inputs[0]); 3496 return graph()->NewNode(jsgraph()->machine()->S1x4AllTrue(), inputs[0]);
3529 case wasm::kExprS1x8And:
3530 return graph()->NewNode(jsgraph()->machine()->S1x8And(), inputs[0],
3531 inputs[1]);
3532 case wasm::kExprS1x8Or:
3533 return graph()->NewNode(jsgraph()->machine()->S1x8Or(), inputs[0],
3534 inputs[1]);
3535 case wasm::kExprS1x8Xor:
3536 return graph()->NewNode(jsgraph()->machine()->S1x8Xor(), inputs[0],
3537 inputs[1]);
3538 case wasm::kExprS1x8Not:
3539 return graph()->NewNode(jsgraph()->machine()->S1x8Not(), inputs[0]);
3540 case wasm::kExprS1x8AnyTrue: 3497 case wasm::kExprS1x8AnyTrue:
3541 return graph()->NewNode(jsgraph()->machine()->S1x8AnyTrue(), inputs[0]); 3498 return graph()->NewNode(jsgraph()->machine()->S1x8AnyTrue(), inputs[0]);
3542 case wasm::kExprS1x8AllTrue: 3499 case wasm::kExprS1x8AllTrue:
3543 return graph()->NewNode(jsgraph()->machine()->S1x8AllTrue(), inputs[0]); 3500 return graph()->NewNode(jsgraph()->machine()->S1x8AllTrue(), inputs[0]);
3544 case wasm::kExprS1x16And:
3545 return graph()->NewNode(jsgraph()->machine()->S1x16And(), inputs[0],
3546 inputs[1]);
3547 case wasm::kExprS1x16Or:
3548 return graph()->NewNode(jsgraph()->machine()->S1x16Or(), inputs[0],
3549 inputs[1]);
3550 case wasm::kExprS1x16Xor:
3551 return graph()->NewNode(jsgraph()->machine()->S1x16Xor(), inputs[0],
3552 inputs[1]);
3553 case wasm::kExprS1x16Not:
3554 return graph()->NewNode(jsgraph()->machine()->S1x16Not(), inputs[0]);
3555 case wasm::kExprS1x16AnyTrue: 3501 case wasm::kExprS1x16AnyTrue:
3556 return graph()->NewNode(jsgraph()->machine()->S1x16AnyTrue(), inputs[0]); 3502 return graph()->NewNode(jsgraph()->machine()->S1x16AnyTrue(), inputs[0]);
3557 case wasm::kExprS1x16AllTrue: 3503 case wasm::kExprS1x16AllTrue:
3558 return graph()->NewNode(jsgraph()->machine()->S1x16AllTrue(), inputs[0]); 3504 return graph()->NewNode(jsgraph()->machine()->S1x16AllTrue(), inputs[0]);
3559 default: 3505 default:
3560 return graph()->NewNode(UnsupportedOpcode(opcode), nullptr); 3506 return graph()->NewNode(UnsupportedOpcode(opcode), nullptr);
3561 } 3507 }
3562 } 3508 }
3563 3509
3564 Node* WasmGraphBuilder::SimdLaneOp(wasm::WasmOpcode opcode, uint8_t lane, 3510 Node* WasmGraphBuilder::SimdLaneOp(wasm::WasmOpcode opcode, uint8_t lane,
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4129 wasm::ModuleBytesEnv* module_env, const wasm::WasmFunction* function) { 4075 wasm::ModuleBytesEnv* module_env, const wasm::WasmFunction* function) {
4130 WasmCompilationUnit unit(isolate, module_env, function); 4076 WasmCompilationUnit unit(isolate, module_env, function);
4131 unit.InitializeHandles(); 4077 unit.InitializeHandles();
4132 unit.ExecuteCompilation(); 4078 unit.ExecuteCompilation();
4133 return unit.FinishCompilation(thrower); 4079 return unit.FinishCompilation(thrower);
4134 } 4080 }
4135 4081
4136 } // namespace compiler 4082 } // namespace compiler
4137 } // namespace internal 4083 } // namespace internal
4138 } // namespace v8 4084 } // namespace v8
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