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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 #include "src/compilation-info.h" | 6 #include "src/compilation-info.h" |
7 #include "src/compiler/code-generator-impl.h" | 7 #include "src/compiler/code-generator-impl.h" |
8 #include "src/compiler/gap-resolver.h" | 8 #include "src/compiler/gap-resolver.h" |
9 #include "src/compiler/node-matchers.h" | 9 #include "src/compiler/node-matchers.h" |
10 #include "src/compiler/osr.h" | 10 #include "src/compiler/osr.h" |
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2093 __ max_u_w(i.OutputSimd128Register(), i.InputSimd128Register(0), | 2093 __ max_u_w(i.OutputSimd128Register(), i.InputSimd128Register(0), |
2094 i.InputSimd128Register(1)); | 2094 i.InputSimd128Register(1)); |
2095 break; | 2095 break; |
2096 } | 2096 } |
2097 case kMips64I32x4MinU: { | 2097 case kMips64I32x4MinU: { |
2098 CpuFeatureScope msa_scope(masm(), MIPS_SIMD); | 2098 CpuFeatureScope msa_scope(masm(), MIPS_SIMD); |
2099 __ min_u_w(i.OutputSimd128Register(), i.InputSimd128Register(0), | 2099 __ min_u_w(i.OutputSimd128Register(), i.InputSimd128Register(0), |
2100 i.InputSimd128Register(1)); | 2100 i.InputSimd128Register(1)); |
2101 break; | 2101 break; |
2102 } | 2102 } |
2103 case kMips64S32x4Select: | 2103 case kMips64S128Select: { |
2104 case kMips64S16x8Select: | |
2105 case kMips64S8x16Select: { | |
2106 CpuFeatureScope msa_scope(masm(), MIPS_SIMD); | 2104 CpuFeatureScope msa_scope(masm(), MIPS_SIMD); |
2107 DCHECK(i.OutputSimd128Register().is(i.InputSimd128Register(0))); | 2105 DCHECK(i.OutputSimd128Register().is(i.InputSimd128Register(0))); |
2108 __ bsel_v(i.OutputSimd128Register(), i.InputSimd128Register(2), | 2106 __ bsel_v(i.OutputSimd128Register(), i.InputSimd128Register(2), |
2109 i.InputSimd128Register(1)); | 2107 i.InputSimd128Register(1)); |
2110 break; | 2108 break; |
2111 } | 2109 } |
2112 case kMips64F32x4Abs: { | 2110 case kMips64F32x4Abs: { |
2113 CpuFeatureScope msa_scope(masm(), MIPS_SIMD); | 2111 CpuFeatureScope msa_scope(masm(), MIPS_SIMD); |
2114 __ bclri_w(i.OutputSimd128Register(), i.InputSimd128Register(0), 31); | 2112 __ bclri_w(i.OutputSimd128Register(), i.InputSimd128Register(0), 31); |
2115 break; | 2113 break; |
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3361 padding_size -= v8::internal::Assembler::kInstrSize; | 3359 padding_size -= v8::internal::Assembler::kInstrSize; |
3362 } | 3360 } |
3363 } | 3361 } |
3364 } | 3362 } |
3365 | 3363 |
3366 #undef __ | 3364 #undef __ |
3367 | 3365 |
3368 } // namespace compiler | 3366 } // namespace compiler |
3369 } // namespace internal | 3367 } // namespace internal |
3370 } // namespace v8 | 3368 } // namespace v8 |
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