[WASM] Eliminate SIMD boolean vector types.

src/compiler/mips/instruction-selector-mips.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/base/bits.h"
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
@@ skipping 280 matching lines @@
     case MachineRepresentation::kTaggedSigned:   // Fall through.
     case MachineRepresentation::kTaggedPointer:  // Fall through.
     case MachineRepresentation::kTagged:  // Fall through.
     case MachineRepresentation::kWord32:
       opcode = kMipsLw;
       break;
     case MachineRepresentation::kSimd128:
       opcode = kMipsMsaLd;
       break;
     case MachineRepresentation::kWord64:   // Fall through.
-    case MachineRepresentation::kSimd1x4:  // Fall through.
-    case MachineRepresentation::kSimd1x8:  // Fall through.
-    case MachineRepresentation::kSimd1x16:  // Fall through.
     case MachineRepresentation::kNone:
       UNREACHABLE();
       return;
   }
 
   if (g.CanBeImmediate(index, opcode)) {
     Emit(opcode | AddressingModeField::encode(kMode_MRI),
          g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(index));
   } else {
     InstructionOperand addr_reg = g.TempRegister();
@@ skipping 67 matching lines @@
       case MachineRepresentation::kTaggedSigned:   // Fall through.
       case MachineRepresentation::kTaggedPointer:  // Fall through.
       case MachineRepresentation::kTagged:  // Fall through.
       case MachineRepresentation::kWord32:
         opcode = kMipsSw;
         break;
       case MachineRepresentation::kSimd128:
         opcode = kMipsMsaSt;
         break;
       case MachineRepresentation::kWord64:   // Fall through.
-      case MachineRepresentation::kSimd1x4:  // Fall through.
-      case MachineRepresentation::kSimd1x8:  // Fall through.
-      case MachineRepresentation::kSimd1x16:  // Fall through.
       case MachineRepresentation::kNone:
         UNREACHABLE();
         return;
     }
 
     if (g.CanBeImmediate(index, opcode)) {
       Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
            g.UseRegister(base), g.UseImmediate(index),
            g.UseRegisterOrImmediateZero(value));
     } else {
@@ skipping 831 matching lines @@
     case MachineRepresentation::kFloat32:
       opcode = kMipsUlwc1;
       break;
     case MachineRepresentation::kFloat64:
       opcode = kMipsUldc1;
       break;
     case MachineRepresentation::kSimd128:
       opcode = kMipsMsaLd;
       break;
     case MachineRepresentation::kWord64:   // Fall through.
-    case MachineRepresentation::kSimd1x4:  // Fall through.
-    case MachineRepresentation::kSimd1x8:  // Fall through.
-    case MachineRepresentation::kSimd1x16:  // Fall through.
     case MachineRepresentation::kNone:
       UNREACHABLE();
       return;
   }
 
   if (g.CanBeImmediate(index, opcode)) {
     Emit(opcode | AddressingModeField::encode(kMode_MRI),
          g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(index));
   } else {
     InstructionOperand addr_reg = g.TempRegister();
@@ skipping 32 matching lines @@
     case MachineRepresentation::kTaggedSigned:   // Fall through.
     case MachineRepresentation::kTaggedPointer:  // Fall through.
     case MachineRepresentation::kTagged:  // Fall through.
     case MachineRepresentation::kWord32:
       opcode = kMipsUsw;
       break;
     case MachineRepresentation::kSimd128:
       opcode = kMipsMsaSt;
       break;
     case MachineRepresentation::kWord64:   // Fall through.
-    case MachineRepresentation::kSimd1x4:  // Fall through.
-    case MachineRepresentation::kSimd1x8:  // Fall through.
-    case MachineRepresentation::kSimd1x16:  // Fall through.
     case MachineRepresentation::kNone:
       UNREACHABLE();
       return;
   }
 
   if (g.CanBeImmediate(index, opcode)) {
     Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
          g.UseRegister(base), g.UseImmediate(index),
          g.UseRegisterOrImmediateZero(value));
   } else {
@@ skipping 28 matching lines @@
       break;
     case MachineRepresentation::kFloat64:
       opcode = kCheckedLoadFloat64;
       break;
     case MachineRepresentation::kBit:      // Fall through.
     case MachineRepresentation::kTaggedSigned:   // Fall through.
     case MachineRepresentation::kTaggedPointer:  // Fall through.
     case MachineRepresentation::kTagged:   // Fall through.
     case MachineRepresentation::kWord64:   // Fall through.
     case MachineRepresentation::kSimd128:  // Fall through.
-    case MachineRepresentation::kSimd1x4:  // Fall through.
-    case MachineRepresentation::kSimd1x8:  // Fall through.
-    case MachineRepresentation::kSimd1x16:  // Fall through.
     case MachineRepresentation::kNone:
       UNREACHABLE();
       return;
   }
   InstructionOperand offset_operand = g.CanBeImmediate(offset, opcode)
                                           ? g.UseImmediate(offset)
                                           : g.UseRegister(offset);
 
   InstructionOperand length_operand = (!g.CanBeImmediate(offset, opcode))
                                           ? g.CanBeImmediate(length, opcode)
@@ skipping 589 matching lines @@
   V(F32x4)                \
   V(I32x4)                \
   V(I16x8)                \
   V(I8x16)
 
 #define SIMD_FORMAT_LIST(V) \
   V(32x4)                   \
   V(16x8)                   \
   V(8x16)
 
-#define SIMD_ZERO_OP_LIST(V) \
-  V(S128Zero)                \
-  V(S1x4Zero)                \
-  V(S1x8Zero)                \
-  V(S1x16Zero)
-
 #define SIMD_UNOP_LIST(V)                            \
   V(F32x4SConvertI32x4, kMipsF32x4SConvertI32x4)     \
   V(F32x4UConvertI32x4, kMipsF32x4UConvertI32x4)     \
   V(F32x4Abs, kMipsF32x4Abs)                         \
   V(F32x4Neg, kMipsF32x4Neg)                         \
   V(F32x4RecipApprox, kMipsF32x4RecipApprox)         \
   V(F32x4RecipSqrtApprox, kMipsF32x4RecipSqrtApprox) \
   V(I32x4SConvertF32x4, kMipsI32x4SConvertF32x4)     \
   V(I32x4UConvertF32x4, kMipsI32x4UConvertF32x4)     \
   V(I32x4Neg, kMipsI32x4Neg)                         \
   V(I16x8Neg, kMipsI16x8Neg)                         \
   V(I8x16Neg, kMipsI8x16Neg)                         \
   V(S128Not, kMipsS128Not)                           \
-  V(S1x4Not, kMipsS128Not)                           \
   V(S1x4AnyTrue, kMipsS1x4AnyTrue)                   \
   V(S1x4AllTrue, kMipsS1x4AllTrue)                   \
-  V(S1x8Not, kMipsS128Not)                           \
   V(S1x8AnyTrue, kMipsS1x8AnyTrue)                   \
   V(S1x8AllTrue, kMipsS1x8AllTrue)                   \
-  V(S1x16Not, kMipsS128Not)                          \
   V(S1x16AnyTrue, kMipsS1x16AnyTrue)                 \
   V(S1x16AllTrue, kMipsS1x16AllTrue)
 
 #define SIMD_SHIFT_OP_LIST(V) \
   V(I32x4Shl)                 \
   V(I32x4ShrS)                \
   V(I32x4ShrU)                \
   V(I16x8Shl)                 \
   V(I16x8ShrS)                \
   V(I16x8ShrU)                \
@@ skipping 53 matching lines @@
   V(I8x16MaxU, kMipsI8x16MaxU)                 \
   V(I8x16MinU, kMipsI8x16MinU)                 \
   V(I8x16Eq, kMipsI8x16Eq)                     \
   V(I8x16Ne, kMipsI8x16Ne)                     \
   V(I8x16GtS, kMipsI8x16GtS)                   \
   V(I8x16GeS, kMipsI8x16GeS)                   \
   V(I8x16GtU, kMipsI8x16GtU)                   \
   V(I8x16GeU, kMipsI8x16GeU)                   \
   V(S128And, kMipsS128And)                     \
   V(S128Or, kMipsS128Or)                       \
-  V(S128Xor, kMipsS128Xor)                     \
-  V(S1x4And, kMipsS128And)                     \
-  V(S1x4Or, kMipsS128Or)                       \
-  V(S1x4Xor, kMipsS128Xor)                     \
-  V(S1x8And, kMipsS128And)                     \
-  V(S1x8Or, kMipsS128Or)                       \
-  V(S1x8Xor, kMipsS128Xor)                     \
-  V(S1x16And, kMipsS128And)                    \
-  V(S1x16Or, kMipsS128Or)                      \
-  V(S1x16Xor, kMipsS128Xor)
+  V(S128Xor, kMipsS128Xor)
 
-#define SIMD_VISIT_ZERO_OP(Name)                      \
-  void InstructionSelector::Visit##Name(Node* node) { \
-    MipsOperandGenerator g(this);                     \
-    Emit(kMipsS128Zero, g.DefineSameAsFirst(node));   \
-  }
-SIMD_ZERO_OP_LIST(SIMD_VISIT_ZERO_OP)
-#undef SIMD_VISIT_ZERO_OP
+void InstructionSelector::VisitS128Zero(Node* node) {
+  MipsOperandGenerator g(this);
+  Emit(kMipsS128Zero, g.DefineSameAsFirst(node));
+}
 
 #define SIMD_VISIT_SPLAT(Type)                               \
   void InstructionSelector::Visit##Type##Splat(Node* node) { \
     VisitRR(this, kMips##Type##Splat, node);                 \
   }
 SIMD_TYPE_LIST(SIMD_VISIT_SPLAT)
 #undef SIMD_VISIT_SPLAT
 
 #define SIMD_VISIT_EXTRACT_LANE(Type)                              \
   void InstructionSelector::Visit##Type##ExtractLane(Node* node) { \
@@ skipping 23 matching lines @@
 SIMD_SHIFT_OP_LIST(SIMD_VISIT_SHIFT_OP)
 #undef SIMD_VISIT_SHIFT_OP
 
 #define SIMD_VISIT_BINOP(Name, instruction)           \
   void InstructionSelector::Visit##Name(Node* node) { \
     VisitRRR(this, instruction, node);                \
   }
 SIMD_BINOP_LIST(SIMD_VISIT_BINOP)
 #undef SIMD_VISIT_BINOP
 
-#define SIMD_VISIT_SELECT_OP(format)                             \
-  void InstructionSelector::VisitS##format##Select(Node* node) { \
-    VisitRRRR(this, kMipsS##format##Select, node);               \
-  }
-SIMD_FORMAT_LIST(SIMD_VISIT_SELECT_OP)
-#undef SIMD_VISIT_SELECT_OP
+void InstructionSelector::VisitS128Select(Node* node) {
+  VisitRRRR(this, kMipsS128Select, node);
+}
 
 // static
 MachineOperatorBuilder::Flags
 InstructionSelector::SupportedMachineOperatorFlags() {
   MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags;
   if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) &&
       IsFp64Mode()) {
     flags |= MachineOperatorBuilder::kFloat64RoundDown |
              MachineOperatorBuilder::kFloat64RoundUp |
              MachineOperatorBuilder::kFloat64RoundTruncate |
@@ skipping 23 matching lines @@
     DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) ||
            IsMipsArchVariant(kMips32r2));
     return MachineOperatorBuilder::AlignmentRequirements::
         NoUnalignedAccessSupport();
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8