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Issue 2919203002: [WASM] Eliminate SIMD boolean vector types. (Closed)
Patch Set: Restore DCHECKs in AssembleMove/Swap now that we're back to 1 SIMD representation. Created 3 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 136 matching lines...) Expand 10 before | Expand all | Expand 10 after
147 V(MipsI32x4Mul) \ 147 V(MipsI32x4Mul) \
148 V(MipsI32x4MaxS) \ 148 V(MipsI32x4MaxS) \
149 V(MipsI32x4MinS) \ 149 V(MipsI32x4MinS) \
150 V(MipsI32x4Eq) \ 150 V(MipsI32x4Eq) \
151 V(MipsI32x4Ne) \ 151 V(MipsI32x4Ne) \
152 V(MipsI32x4Shl) \ 152 V(MipsI32x4Shl) \
153 V(MipsI32x4ShrS) \ 153 V(MipsI32x4ShrS) \
154 V(MipsI32x4ShrU) \ 154 V(MipsI32x4ShrU) \
155 V(MipsI32x4MaxU) \ 155 V(MipsI32x4MaxU) \
156 V(MipsI32x4MinU) \ 156 V(MipsI32x4MinU) \
157 V(MipsS32x4Select) \
158 V(MipsF32x4Abs) \ 157 V(MipsF32x4Abs) \
159 V(MipsF32x4Neg) \ 158 V(MipsF32x4Neg) \
160 V(MipsF32x4RecipApprox) \ 159 V(MipsF32x4RecipApprox) \
161 V(MipsF32x4RecipSqrtApprox) \ 160 V(MipsF32x4RecipSqrtApprox) \
162 V(MipsF32x4Add) \ 161 V(MipsF32x4Add) \
163 V(MipsF32x4Sub) \ 162 V(MipsF32x4Sub) \
164 V(MipsF32x4Mul) \ 163 V(MipsF32x4Mul) \
165 V(MipsF32x4Max) \ 164 V(MipsF32x4Max) \
166 V(MipsF32x4Min) \ 165 V(MipsF32x4Min) \
167 V(MipsF32x4Eq) \ 166 V(MipsF32x4Eq) \
(...skipping 30 matching lines...) Expand all
198 V(MipsI16x8MaxU) \ 197 V(MipsI16x8MaxU) \
199 V(MipsI16x8MinU) \ 198 V(MipsI16x8MinU) \
200 V(MipsI16x8GtU) \ 199 V(MipsI16x8GtU) \
201 V(MipsI16x8GeU) \ 200 V(MipsI16x8GeU) \
202 V(MipsI8x16Splat) \ 201 V(MipsI8x16Splat) \
203 V(MipsI8x16ExtractLane) \ 202 V(MipsI8x16ExtractLane) \
204 V(MipsI8x16ReplaceLane) \ 203 V(MipsI8x16ReplaceLane) \
205 V(MipsI8x16Neg) \ 204 V(MipsI8x16Neg) \
206 V(MipsI8x16Shl) \ 205 V(MipsI8x16Shl) \
207 V(MipsI8x16ShrS) \ 206 V(MipsI8x16ShrS) \
208 V(MipsS16x8Select) \
209 V(MipsS8x16Select) \
210 V(MipsI8x16Add) \ 207 V(MipsI8x16Add) \
211 V(MipsI8x16AddSaturateS) \ 208 V(MipsI8x16AddSaturateS) \
212 V(MipsI8x16Sub) \ 209 V(MipsI8x16Sub) \
213 V(MipsI8x16SubSaturateS) \ 210 V(MipsI8x16SubSaturateS) \
214 V(MipsI8x16Mul) \ 211 V(MipsI8x16Mul) \
215 V(MipsI8x16MaxS) \ 212 V(MipsI8x16MaxS) \
216 V(MipsI8x16MinS) \ 213 V(MipsI8x16MinS) \
217 V(MipsI8x16Eq) \ 214 V(MipsI8x16Eq) \
218 V(MipsI8x16Ne) \ 215 V(MipsI8x16Ne) \
219 V(MipsI8x16GtS) \ 216 V(MipsI8x16GtS) \
220 V(MipsI8x16GeS) \ 217 V(MipsI8x16GeS) \
221 V(MipsI8x16ShrU) \ 218 V(MipsI8x16ShrU) \
222 V(MipsI8x16AddSaturateU) \ 219 V(MipsI8x16AddSaturateU) \
223 V(MipsI8x16SubSaturateU) \ 220 V(MipsI8x16SubSaturateU) \
224 V(MipsI8x16MaxU) \ 221 V(MipsI8x16MaxU) \
225 V(MipsI8x16MinU) \ 222 V(MipsI8x16MinU) \
226 V(MipsI8x16GtU) \ 223 V(MipsI8x16GtU) \
227 V(MipsI8x16GeU) \ 224 V(MipsI8x16GeU) \
228 V(MipsS128And) \ 225 V(MipsS128And) \
229 V(MipsS128Or) \ 226 V(MipsS128Or) \
230 V(MipsS128Xor) \ 227 V(MipsS128Xor) \
231 V(MipsS128Not) \ 228 V(MipsS128Not) \
229 V(MipsS128Select) \
232 V(MipsS1x4AnyTrue) \ 230 V(MipsS1x4AnyTrue) \
233 V(MipsS1x4AllTrue) \ 231 V(MipsS1x4AllTrue) \
234 V(MipsS1x8AnyTrue) \ 232 V(MipsS1x8AnyTrue) \
235 V(MipsS1x8AllTrue) \ 233 V(MipsS1x8AllTrue) \
236 V(MipsS1x16AnyTrue) \ 234 V(MipsS1x16AnyTrue) \
237 V(MipsS1x16AllTrue) \ 235 V(MipsS1x16AllTrue) \
238 V(MipsMsaLd) \ 236 V(MipsMsaLd) \
239 V(MipsMsaSt) 237 V(MipsMsaSt)
240 238
241 // Addressing modes represent the "shape" of inputs to an instruction. 239 // Addressing modes represent the "shape" of inputs to an instruction.
(...skipping 13 matching lines...) Expand all
255 #define TARGET_ADDRESSING_MODE_LIST(V) \ 253 #define TARGET_ADDRESSING_MODE_LIST(V) \
256 V(MRI) /* [%r0 + K] */ \ 254 V(MRI) /* [%r0 + K] */ \
257 V(MRR) /* [%r0 + %r1] */ 255 V(MRR) /* [%r0 + %r1] */
258 256
259 257
260 } // namespace compiler 258 } // namespace compiler
261 } // namespace internal 259 } // namespace internal
262 } // namespace v8 260 } // namespace v8
263 261
264 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 262 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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