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Issue 2919203002: [WASM] Eliminate SIMD boolean vector types. (Closed)
Patch Set: Restore DCHECKs in AssembleMove/Swap now that we're back to 1 SIMD representation. Created 3 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/assembler-inl.h" 8 #include "src/assembler-inl.h"
9 #include "src/compilation-info.h" 9 #include "src/compilation-info.h"
10 #include "src/compiler/code-generator-impl.h" 10 #include "src/compiler/code-generator-impl.h"
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2141 case kArmS128Xor: { 2141 case kArmS128Xor: {
2142 __ veor(i.OutputSimd128Register(), i.InputSimd128Register(0), 2142 __ veor(i.OutputSimd128Register(), i.InputSimd128Register(0),
2143 i.InputSimd128Register(1)); 2143 i.InputSimd128Register(1));
2144 break; 2144 break;
2145 } 2145 }
2146 case kArmS128Not: { 2146 case kArmS128Not: {
2147 __ vmvn(i.OutputSimd128Register(), i.InputSimd128Register(0)); 2147 __ vmvn(i.OutputSimd128Register(), i.InputSimd128Register(0));
2148 break; 2148 break;
2149 } 2149 }
2150 case kArmS128Select: { 2150 case kArmS128Select: {
2151 // vbsl clobbers the mask input so make sure it was DefineSameAsFirst. 2151 Simd128Register dst = i.OutputSimd128Register();
2152 DCHECK(i.OutputSimd128Register().is(i.InputSimd128Register(0))); 2152 DCHECK(dst.is(i.InputSimd128Register(0)));
2153 __ vbsl(i.OutputSimd128Register(), i.InputSimd128Register(1), 2153 __ vbsl(dst, i.InputSimd128Register(1), i.InputSimd128Register(2));
2154 i.InputSimd128Register(2));
2155 break; 2154 break;
2156 } 2155 }
2157 case kArmS32x4ZipLeft: { 2156 case kArmS32x4ZipLeft: {
2158 Simd128Register dst = i.OutputSimd128Register(), 2157 Simd128Register dst = i.OutputSimd128Register(),
2159 src1 = i.InputSimd128Register(1); 2158 src1 = i.InputSimd128Register(1);
2160 DCHECK(dst.is(i.InputSimd128Register(0))); 2159 DCHECK(dst.is(i.InputSimd128Register(0)));
2161 // src0 = [0, 1, 2, 3], src1 = [4, 5, 6, 7] 2160 // src0 = [0, 1, 2, 3], src1 = [4, 5, 6, 7]
2162 __ vmov(dst.high(), src1.low()); // dst = [0, 1, 4, 5] 2161 __ vmov(dst.high(), src1.low()); // dst = [0, 1, 4, 5]
2163 __ vtrn(Neon32, dst.low(), dst.high()); // dst = [0, 4, 1, 5] 2162 __ vtrn(Neon32, dst.low(), dst.high()); // dst = [0, 4, 1, 5]
2164 break; 2163 break;
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3247 padding_size -= v8::internal::Assembler::kInstrSize; 3246 padding_size -= v8::internal::Assembler::kInstrSize;
3248 } 3247 }
3249 } 3248 }
3250 } 3249 }
3251 3250
3252 #undef __ 3251 #undef __
3253 3252
3254 } // namespace compiler 3253 } // namespace compiler
3255 } // namespace internal 3254 } // namespace internal
3256 } // namespace v8 3255 } // namespace v8
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