[arm64] Add monitor notifiers to NEON loads and stores.

src/arm64/simulator-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdlib.h>
 #include <cmath>
 #include <cstdarg>
 
 #if V8_TARGET_ARCH_ARM64
 
@@ skipping 1900 matching lines @@
 
 
 void Simulator::LoadStoreHelper(Instruction* instr,
                                 int64_t offset,
                                 AddrMode addrmode) {
   unsigned srcdst = instr->Rt();
   unsigned addr_reg = instr->Rn();
   uintptr_t address = LoadStoreAddress(addr_reg, offset, addrmode);
   uintptr_t stack = 0;
 
-  base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
-  if (instr->IsLoad()) {
-    local_monitor_.NotifyLoad(address);
-  } else {
-    local_monitor_.NotifyStore(address);
-    global_monitor_.Pointer()->NotifyStore_Locked(address,
-                                                  &global_monitor_processor_);
+  {
+    base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
+    if (instr->IsLoad()) {
+      local_monitor_.NotifyLoad();
+    } else {
+      local_monitor_.NotifyStore();
+      global_monitor_.Pointer()->NotifyStore_Locked(&global_monitor_processor_);
+    }
   }
 
   // Handle the writeback for stores before the store. On a CPU the writeback
   // and the store are atomic, but when running on the simulator it is possible
   // to be interrupted in between. The simulator is not thread safe and V8 does
   // not require it to be to run JavaScript therefore the profiler may sample
   // the "simulated" CPU in the middle of load/store with writeback. The code
   // below ensures that push operations are safe even when interrupted: the
   // stack pointer will be decremented before adding an element to the stack.
   if (instr->IsStore()) {
@@ skipping 106 matching lines @@
                                     AddrMode addrmode) {
   unsigned rt = instr->Rt();
   unsigned rt2 = instr->Rt2();
   unsigned addr_reg = instr->Rn();
   size_t access_size = 1 << instr->SizeLSPair();
   int64_t offset = instr->ImmLSPair() * access_size;
   uintptr_t address = LoadStoreAddress(addr_reg, offset, addrmode);
   uintptr_t address2 = address + access_size;
   uintptr_t stack = 0;
 
-  base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
-  if (instr->IsLoad()) {
-    local_monitor_.NotifyLoad(address);
-    local_monitor_.NotifyLoad(address2);
-  } else {
-    local_monitor_.NotifyStore(address);
-    local_monitor_.NotifyStore(address2);
-    global_monitor_.Pointer()->NotifyStore_Locked(address,
-                                                  &global_monitor_processor_);
-    global_monitor_.Pointer()->NotifyStore_Locked(address2,
-                                                  &global_monitor_processor_);
+  {
+    base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
+    if (instr->IsLoad()) {
+      local_monitor_.NotifyLoad();
+    } else {
+      local_monitor_.NotifyStore();
+      global_monitor_.Pointer()->NotifyStore_Locked(&global_monitor_processor_);
+    }
   }
 
   // Handle the writeback for stores before the store. On a CPU the writeback
   // and the store are atomic, but when running on the simulator it is possible
   // to be interrupted in between. The simulator is not thread safe and V8 does
   // not require it to be to run JavaScript therefore the profiler may sample
   // the "simulated" CPU in the middle of load/store with writeback. The code
   // below ensures that push operations are safe even when interrupted: the
   // stack pointer will be decremented before adding an element to the stack.
   if (instr->IsStore()) {
@@ skipping 123 matching lines @@
   // Accesses below the stack pointer (but above the platform stack limit) are
   // not allowed in the ABI.
   CheckMemoryAccess(address, stack);
 }
 
 
 void Simulator::VisitLoadLiteral(Instruction* instr) {
   uintptr_t address = instr->LiteralAddress();
   unsigned rt = instr->Rt();
 
-  base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
-  local_monitor_.NotifyLoad(address);
+  {
+    base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
+    local_monitor_.NotifyLoad();
+  }
 
   switch (instr->Mask(LoadLiteralMask)) {
     // Use _no_log variants to suppress the register trace (LOG_REGS,
     // LOG_VREGS), then print a more detailed log.
     case LDR_w_lit:
       set_wreg_no_log(rt, MemoryRead<uint32_t>(address));
       LogRead(address, rt, kPrintWReg);
       break;
     case LDR_x_lit:
       set_xreg_no_log(rt, MemoryRead<uint64_t>(address));
@@ skipping 73 matching lines @@
   unsigned access_size = 1 << instr->LoadStoreXSizeLog2();
   uintptr_t address = LoadStoreAddress(rn, 0, AddrMode::Offset);
   DCHECK_EQ(address % access_size, 0);
   base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
   if (is_load != 0) {
     if (is_exclusive) {
       local_monitor_.NotifyLoadExcl(address, get_transaction_size(access_size));
       global_monitor_.Pointer()->NotifyLoadExcl_Locked(
           address, &global_monitor_processor_);
     } else {
-      local_monitor_.NotifyLoad(address);
+      local_monitor_.NotifyLoad();
     }
     switch (op) {
       case LDAR_b:
       case LDAXR_b:
         set_wreg_no_log(rt, MemoryRead<uint8_t>(address));
         break;
       case LDAR_h:
       case LDAXR_h:
         set_wreg_no_log(rt, MemoryRead<uint16_t>(address));
         break;
@@ skipping 24 matching lines @@
             break;
           default:
             UNIMPLEMENTED();
         }
         LogWrite(address, rt, GetPrintRegisterFormatForSize(access_size));
         set_wreg(rs, 0);
       } else {
         set_wreg(rs, 1);
       }
     } else {
-      local_monitor_.NotifyStore(address);
-      global_monitor_.Pointer()->NotifyStore_Locked(address,
-                                                    &global_monitor_processor_);
+      local_monitor_.NotifyStore();
+      global_monitor_.Pointer()->NotifyStore_Locked(&global_monitor_processor_);
       switch (op) {
         case STLR_b:
           MemoryWrite<uint8_t>(address, wreg(rt));
           break;
         case STLR_h:
           MemoryWrite<uint16_t>(address, wreg(rt));
           break;
         case STLR_w:
           MemoryWrite<uint32_t>(address, wreg(rt));
           break;
@@ skipping 2281 matching lines @@
     case NEON_ST4:
     case NEON_ST4_post:
       st4(vf, vreg(reg[0]), vreg(reg[1]), vreg(reg[2]), vreg(reg[3]), addr[0]);
       count = 4;
       log_read = false;
       break;
     default:
       UNIMPLEMENTED();
   }
 
+  {
+    base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
+    if (log_read) {
+      local_monitor_.NotifyLoad();
+    } else {
+      local_monitor_.NotifyStore();
+      global_monitor_.Pointer()->NotifyStore_Locked(&global_monitor_processor_);
+    }
+  }
+
   // Explicitly log the register update whilst we have type information.
   for (int i = 0; i < count; i++) {
     // For de-interleaving loads, only print the base address.
     int lane_size = LaneSizeInBytesFromFormat(vf);
     PrintRegisterFormat format = GetPrintRegisterFormatTryFP(
         GetPrintRegisterFormatForSize(reg_size, lane_size));
     if (log_read) {
       LogVRead(addr_base, reg[i], format);
     } else {
       LogVWrite(addr_base, reg[i], format);
@@ skipping 213 matching lines @@
         LogVWrite(addr, rt, print_format, lane);
         LogVWrite(addr + esize, rt2, print_format, lane);
         LogVWrite(addr + (2 * esize), rt3, print_format, lane);
         LogVWrite(addr + (3 * esize), rt4, print_format, lane);
       }
       break;
     default:
       UNIMPLEMENTED();
   }
 
+  {
+    base::LockGuard<base::Mutex> lock_guard(&global_monitor_.Pointer()->mutex);
+    if (do_load) {
+      local_monitor_.NotifyLoad();
+    } else {
+      local_monitor_.NotifyStore();
+      global_monitor_.Pointer()->NotifyStore_Locked(&global_monitor_processor_);
+    }
+  }
+
   if (addr_mode == PostIndex) {
     int rm = instr->Rm();
     int lane_size = LaneSizeInBytesFromFormat(vf);
     set_xreg(instr->Rn(), addr + ((rm == 31) ? (scale * lane_size) : xreg(rm)));
   }
 }
 
 void Simulator::VisitNEONLoadStoreSingleStruct(Instruction* instr) {
   NEONLoadStoreSingleStructHelper(instr, Offset);
 }
@@ skipping 953 matching lines @@
     : access_state_(MonitorAccess::Open),
       tagged_addr_(0),
       size_(TransactionSize::None) {}
 
 void Simulator::LocalMonitor::Clear() {
   access_state_ = MonitorAccess::Open;
   tagged_addr_ = 0;
   size_ = TransactionSize::None;
 }
 
-void Simulator::LocalMonitor::NotifyLoad(uintptr_t addr) {
+void Simulator::LocalMonitor::NotifyLoad() {
   if (access_state_ == MonitorAccess::Exclusive) {
     // A non exclusive load could clear the local monitor. As a result, it's
     // most strict to unconditionally clear the local monitor on load.
     Clear();
   }
 }
 
 void Simulator::LocalMonitor::NotifyLoadExcl(uintptr_t addr,
                                              TransactionSize size) {
   access_state_ = MonitorAccess::Exclusive;
   tagged_addr_ = addr;
   size_ = size;
 }
 
-void Simulator::LocalMonitor::NotifyStore(uintptr_t addr) {
+void Simulator::LocalMonitor::NotifyStore() {
   if (access_state_ == MonitorAccess::Exclusive) {
     // A non exclusive store could clear the local monitor. As a result, it's
     // most strict to unconditionally clear the local monitor on store.
     Clear();
   }
 }
 
 bool Simulator::LocalMonitor::NotifyStoreExcl(uintptr_t addr,
                                               TransactionSize size) {
   if (access_state_ == MonitorAccess::Exclusive) {
@@ skipping 27 matching lines @@
   tagged_addr_ = 0;
 }
 
 void Simulator::GlobalMonitor::Processor::NotifyLoadExcl_Locked(
     uintptr_t addr) {
   access_state_ = MonitorAccess::Exclusive;
   tagged_addr_ = addr;
 }
 
 void Simulator::GlobalMonitor::Processor::NotifyStore_Locked(
-    uintptr_t addr, bool is_requesting_processor) {
+    bool is_requesting_processor) {
   if (access_state_ == MonitorAccess::Exclusive) {
     // A non exclusive store could clear the global monitor. As a result, it's
     // most strict to unconditionally clear global monitors on store.
     Clear_Locked();
   }
 }
 
 bool Simulator::GlobalMonitor::Processor::NotifyStoreExcl_Locked(
     uintptr_t addr, bool is_requesting_processor) {
   if (access_state_ == MonitorAccess::Exclusive) {
@@ skipping 25 matching lines @@
 }
 
 Simulator::GlobalMonitor::GlobalMonitor() : head_(nullptr) {}
 
 void Simulator::GlobalMonitor::NotifyLoadExcl_Locked(uintptr_t addr,
                                                      Processor* processor) {
   processor->NotifyLoadExcl_Locked(addr);
   PrependProcessor_Locked(processor);
 }
 
-void Simulator::GlobalMonitor::NotifyStore_Locked(uintptr_t addr,
-                                                  Processor* processor) {
+void Simulator::GlobalMonitor::NotifyStore_Locked(Processor* processor) {
   // Notify each processor of the store operation.
   for (Processor* iter = head_; iter; iter = iter->next_) {
     bool is_requesting_processor = iter == processor;
-    iter->NotifyStore_Locked(addr, is_requesting_processor);
+    iter->NotifyStore_Locked(is_requesting_processor);
   }
 }
 
 bool Simulator::GlobalMonitor::NotifyStoreExcl_Locked(uintptr_t addr,
                                                       Processor* processor) {
   DCHECK(IsProcessorInLinkedList_Locked(processor));
   if (processor->NotifyStoreExcl_Locked(addr, true)) {
     // Notify the other processors that this StoreExcl succeeded.
     for (Processor* iter = head_; iter; iter = iter->next_) {
       if (iter != processor) {
@@ skipping 41 matching lines @@
   processor->prev_ = nullptr;
   processor->next_ = nullptr;
 }
 
 #endif  // USE_SIMULATOR
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_ARM64