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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 2910533003: MIPS[64]: SIMD Visitors macro-ization (Closed)
Patch Set: Rebase Created 3 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 1931 matching lines...) Expand 10 before | Expand all | Expand 10 after
1942 void InstructionSelector::VisitAtomicXor(Node* node) { UNIMPLEMENTED(); } 1942 void InstructionSelector::VisitAtomicXor(Node* node) { UNIMPLEMENTED(); }
1943 1943
1944 void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) { 1944 void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) {
1945 UNREACHABLE(); 1945 UNREACHABLE();
1946 } 1946 }
1947 1947
1948 void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) { 1948 void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
1949 UNREACHABLE(); 1949 UNREACHABLE();
1950 } 1950 }
1951 1951
1952 void InstructionSelector::VisitI32x4Splat(Node* node) { 1952 #define SIMD_TYPE_LIST(V) \
1953 VisitRR(this, kMipsI32x4Splat, node); 1953 V(F32x4) \
1954 } 1954 V(I32x4) \
1955 V(I16x8) \
1956 V(I8x16)
1955 1957
1956 void InstructionSelector::VisitI32x4ExtractLane(Node* node) { 1958 #define SIMD_FORMAT_LIST(V) \
1957 VisitRRI(this, kMipsI32x4ExtractLane, node); 1959 V(32x4) \
1958 } 1960 V(16x8) \
1961 V(8x16)
1959 1962
1960 void InstructionSelector::VisitI32x4ReplaceLane(Node* node) { 1963 #define SIMD_ZERO_OP_LIST(V) \
1961 VisitRRIR(this, kMipsI32x4ReplaceLane, node); 1964 V(S128Zero) \
1962 } 1965 V(S1x4Zero) \
1966 V(S1x8Zero) \
1967 V(S1x16Zero)
1963 1968
1964 void InstructionSelector::VisitI32x4Add(Node* node) { 1969 #define SIMD_UNOP_LIST(V) \
1965 VisitRRR(this, kMipsI32x4Add, node); 1970 V(F32x4SConvertI32x4, kMipsF32x4SConvertI32x4) \
1966 } 1971 V(F32x4UConvertI32x4, kMipsF32x4UConvertI32x4) \
1972 V(F32x4Abs, kMipsF32x4Abs) \
1973 V(F32x4Neg, kMipsF32x4Neg) \
1974 V(F32x4RecipApprox, kMipsF32x4RecipApprox) \
1975 V(F32x4RecipSqrtApprox, kMipsF32x4RecipSqrtApprox) \
1976 V(I32x4SConvertF32x4, kMipsI32x4SConvertF32x4) \
1977 V(I32x4UConvertF32x4, kMipsI32x4UConvertF32x4) \
1978 V(I32x4Neg, kMipsI32x4Neg) \
1979 V(I16x8Neg, kMipsI16x8Neg) \
1980 V(I8x16Neg, kMipsI8x16Neg) \
1981 V(S128Not, kMipsS128Not) \
1982 V(S1x4Not, kMipsS128Not) \
1983 V(S1x4AnyTrue, kMipsS1x4AnyTrue) \
1984 V(S1x4AllTrue, kMipsS1x4AllTrue) \
1985 V(S1x8Not, kMipsS128Not) \
1986 V(S1x8AnyTrue, kMipsS1x8AnyTrue) \
1987 V(S1x8AllTrue, kMipsS1x8AllTrue) \
1988 V(S1x16Not, kMipsS128Not) \
1989 V(S1x16AnyTrue, kMipsS1x16AnyTrue) \
1990 V(S1x16AllTrue, kMipsS1x16AllTrue)
1967 1991
1968 void InstructionSelector::VisitI32x4Sub(Node* node) { 1992 #define SIMD_SHIFT_OP_LIST(V) \
1969 VisitRRR(this, kMipsI32x4Sub, node); 1993 V(I32x4Shl) \
1970 } 1994 V(I32x4ShrS) \
1995 V(I32x4ShrU) \
1996 V(I16x8Shl) \
1997 V(I16x8ShrS) \
1998 V(I16x8ShrU) \
1999 V(I8x16Shl) \
2000 V(I8x16ShrS) \
2001 V(I8x16ShrU)
1971 2002
1972 void InstructionSelector::VisitS128Zero(Node* node) { 2003 #define SIMD_BINOP_LIST(V) \
1973 MipsOperandGenerator g(this); 2004 V(F32x4Add, kMipsF32x4Add) \
1974 Emit(kMipsS128Zero, g.DefineSameAsFirst(node)); 2005 V(F32x4Sub, kMipsF32x4Sub) \
1975 } 2006 V(F32x4Mul, kMipsF32x4Mul) \
2007 V(F32x4Max, kMipsF32x4Max) \
2008 V(F32x4Min, kMipsF32x4Min) \
2009 V(F32x4Eq, kMipsF32x4Eq) \
2010 V(F32x4Ne, kMipsF32x4Ne) \
2011 V(F32x4Lt, kMipsF32x4Lt) \
2012 V(F32x4Le, kMipsF32x4Le) \
2013 V(I32x4Add, kMipsI32x4Add) \
2014 V(I32x4Sub, kMipsI32x4Sub) \
2015 V(I32x4Mul, kMipsI32x4Mul) \
2016 V(I32x4MaxS, kMipsI32x4MaxS) \
2017 V(I32x4MinS, kMipsI32x4MinS) \
2018 V(I32x4MaxU, kMipsI32x4MaxU) \
2019 V(I32x4MinU, kMipsI32x4MinU) \
2020 V(I32x4Eq, kMipsI32x4Eq) \
2021 V(I32x4Ne, kMipsI32x4Ne) \
2022 V(I32x4GtS, kMipsI32x4GtS) \
2023 V(I32x4GeS, kMipsI32x4GeS) \
2024 V(I32x4GtU, kMipsI32x4GtU) \
2025 V(I32x4GeU, kMipsI32x4GeU) \
2026 V(I16x8Add, kMipsI16x8Add) \
2027 V(I16x8AddSaturateS, kMipsI16x8AddSaturateS) \
2028 V(I16x8AddSaturateU, kMipsI16x8AddSaturateU) \
2029 V(I16x8Sub, kMipsI16x8Sub) \
2030 V(I16x8SubSaturateS, kMipsI16x8SubSaturateS) \
2031 V(I16x8SubSaturateU, kMipsI16x8SubSaturateU) \
2032 V(I16x8Mul, kMipsI16x8Mul) \
2033 V(I16x8MaxS, kMipsI16x8MaxS) \
2034 V(I16x8MinS, kMipsI16x8MinS) \
2035 V(I16x8MaxU, kMipsI16x8MaxU) \
2036 V(I16x8MinU, kMipsI16x8MinU) \
2037 V(I16x8Eq, kMipsI16x8Eq) \
2038 V(I16x8Ne, kMipsI16x8Ne) \
2039 V(I16x8GtS, kMipsI16x8GtS) \
2040 V(I16x8GeS, kMipsI16x8GeS) \
2041 V(I16x8GtU, kMipsI16x8GtU) \
2042 V(I16x8GeU, kMipsI16x8GeU) \
2043 V(I8x16Add, kMipsI8x16Add) \
2044 V(I8x16AddSaturateS, kMipsI8x16AddSaturateS) \
2045 V(I8x16AddSaturateU, kMipsI8x16AddSaturateU) \
2046 V(I8x16Sub, kMipsI8x16Sub) \
2047 V(I8x16SubSaturateS, kMipsI8x16SubSaturateS) \
2048 V(I8x16SubSaturateU, kMipsI8x16SubSaturateU) \
2049 V(I8x16Mul, kMipsI8x16Mul) \
2050 V(I8x16MaxS, kMipsI8x16MaxS) \
2051 V(I8x16MinS, kMipsI8x16MinS) \
2052 V(I8x16MaxU, kMipsI8x16MaxU) \
2053 V(I8x16MinU, kMipsI8x16MinU) \
2054 V(I8x16Eq, kMipsI8x16Eq) \
2055 V(I8x16Ne, kMipsI8x16Ne) \
2056 V(I8x16GtS, kMipsI8x16GtS) \
2057 V(I8x16GeS, kMipsI8x16GeS) \
2058 V(I8x16GtU, kMipsI8x16GtU) \
2059 V(I8x16GeU, kMipsI8x16GeU) \
2060 V(S128And, kMipsS128And) \
2061 V(S128Or, kMipsS128Or) \
2062 V(S128Xor, kMipsS128Xor) \
2063 V(S1x4And, kMipsS128And) \
2064 V(S1x4Or, kMipsS128Or) \
2065 V(S1x4Xor, kMipsS128Xor) \
2066 V(S1x8And, kMipsS128And) \
2067 V(S1x8Or, kMipsS128Or) \
2068 V(S1x8Xor, kMipsS128Xor) \
2069 V(S1x16And, kMipsS128And) \
2070 V(S1x16Or, kMipsS128Or) \
2071 V(S1x16Xor, kMipsS128Xor)
1976 2072
1977 void InstructionSelector::VisitS1x4Zero(Node* node) { 2073 #define SIMD_VISIT_ZERO_OP(Name) \
1978 MipsOperandGenerator g(this); 2074 void InstructionSelector::Visit##Name(Node* node) { \
1979 Emit(kMipsS128Zero, g.DefineSameAsFirst(node)); 2075 MipsOperandGenerator g(this); \
1980 } 2076 Emit(kMipsS128Zero, g.DefineSameAsFirst(node)); \
2077 }
2078 SIMD_ZERO_OP_LIST(SIMD_VISIT_ZERO_OP)
2079 #undef SIMD_VISIT_ZERO_OP
1981 2080
1982 void InstructionSelector::VisitS1x8Zero(Node* node) { 2081 #define SIMD_VISIT_SPLAT(Type) \
1983 MipsOperandGenerator g(this); 2082 void InstructionSelector::Visit##Type##Splat(Node* node) { \
1984 Emit(kMipsS128Zero, g.DefineSameAsFirst(node)); 2083 VisitRR(this, kMips##Type##Splat, node); \
1985 } 2084 }
2085 SIMD_TYPE_LIST(SIMD_VISIT_SPLAT)
2086 #undef SIMD_VISIT_SPLAT
1986 2087
1987 void InstructionSelector::VisitS1x16Zero(Node* node) { 2088 #define SIMD_VISIT_EXTRACT_LANE(Type) \
1988 MipsOperandGenerator g(this); 2089 void InstructionSelector::Visit##Type##ExtractLane(Node* node) { \
1989 Emit(kMipsS128Zero, g.DefineSameAsFirst(node)); 2090 VisitRRI(this, kMips##Type##ExtractLane, node); \
1990 } 2091 }
2092 SIMD_TYPE_LIST(SIMD_VISIT_EXTRACT_LANE)
2093 #undef SIMD_VISIT_EXTRACT_LANE
1991 2094
1992 void InstructionSelector::VisitF32x4Splat(Node* node) { 2095 #define SIMD_VISIT_REPLACE_LANE(Type) \
1993 VisitRR(this, kMipsF32x4Splat, node); 2096 void InstructionSelector::Visit##Type##ReplaceLane(Node* node) { \
1994 } 2097 VisitRRIR(this, kMips##Type##ReplaceLane, node); \
2098 }
2099 SIMD_TYPE_LIST(SIMD_VISIT_REPLACE_LANE)
2100 #undef SIMD_VISIT_REPLACE_LANE
1995 2101
1996 void InstructionSelector::VisitF32x4ExtractLane(Node* node) { 2102 #define SIMD_VISIT_UNOP(Name, instruction) \
1997 VisitRRI(this, kMipsF32x4ExtractLane, node); 2103 void InstructionSelector::Visit##Name(Node* node) { \
1998 } 2104 VisitRR(this, instruction, node); \
2105 }
2106 SIMD_UNOP_LIST(SIMD_VISIT_UNOP)
2107 #undef SIMD_VISIT_UNOP
1999 2108
2000 void InstructionSelector::VisitF32x4ReplaceLane(Node* node) { 2109 #define SIMD_VISIT_SHIFT_OP(Name) \
2001 VisitRRIR(this, kMipsF32x4ReplaceLane, node); 2110 void InstructionSelector::Visit##Name(Node* node) { \
2002 } 2111 VisitRRI(this, kMips##Name, node); \
2112 }
2113 SIMD_SHIFT_OP_LIST(SIMD_VISIT_SHIFT_OP)
2114 #undef SIMD_VISIT_SHIFT_OP
2003 2115
2004 void InstructionSelector::VisitF32x4SConvertI32x4(Node* node) { 2116 #define SIMD_VISIT_BINOP(Name, instruction) \
2005 VisitRR(this, kMipsF32x4SConvertI32x4, node); 2117 void InstructionSelector::Visit##Name(Node* node) { \
2006 } 2118 VisitRRR(this, instruction, node); \
2119 }
2120 SIMD_BINOP_LIST(SIMD_VISIT_BINOP)
2121 #undef SIMD_VISIT_BINOP
2007 2122
2008 void InstructionSelector::VisitF32x4UConvertI32x4(Node* node) { 2123 #define SIMD_VISIT_SELECT_OP(format) \
2009 VisitRR(this, kMipsF32x4UConvertI32x4, node); 2124 void InstructionSelector::VisitS##format##Select(Node* node) { \
2010 } 2125 VisitRRRR(this, kMipsS##format##Select, node); \
2011 2126 }
2012 void InstructionSelector::VisitI32x4Mul(Node* node) { 2127 SIMD_FORMAT_LIST(SIMD_VISIT_SELECT_OP)
2013 VisitRRR(this, kMipsI32x4Mul, node); 2128 #undef SIMD_VISIT_SELECT_OP
2014 }
2015
2016 void InstructionSelector::VisitI32x4MaxS(Node* node) {
2017 VisitRRR(this, kMipsI32x4MaxS, node);
2018 }
2019
2020 void InstructionSelector::VisitI32x4MinS(Node* node) {
2021 VisitRRR(this, kMipsI32x4MinS, node);
2022 }
2023
2024 void InstructionSelector::VisitI32x4Eq(Node* node) {
2025 VisitRRR(this, kMipsI32x4Eq, node);
2026 }
2027
2028 void InstructionSelector::VisitI32x4Ne(Node* node) {
2029 VisitRRR(this, kMipsI32x4Ne, node);
2030 }
2031
2032 void InstructionSelector::VisitI32x4Shl(Node* node) {
2033 VisitRRI(this, kMipsI32x4Shl, node);
2034 }
2035
2036 void InstructionSelector::VisitI32x4ShrS(Node* node) {
2037 VisitRRI(this, kMipsI32x4ShrS, node);
2038 }
2039
2040 void InstructionSelector::VisitI32x4ShrU(Node* node) {
2041 VisitRRI(this, kMipsI32x4ShrU, node);
2042 }
2043
2044 void InstructionSelector::VisitI32x4MaxU(Node* node) {
2045 VisitRRR(this, kMipsI32x4MaxU, node);
2046 }
2047
2048 void InstructionSelector::VisitI32x4MinU(Node* node) {
2049 VisitRRR(this, kMipsI32x4MinU, node);
2050 }
2051
2052 void InstructionSelector::VisitS32x4Select(Node* node) {
2053 VisitRRRR(this, kMipsS32x4Select, node);
2054 }
2055
2056 void InstructionSelector::VisitF32x4Abs(Node* node) {
2057 VisitRR(this, kMipsF32x4Abs, node);
2058 }
2059
2060 void InstructionSelector::VisitF32x4Neg(Node* node) {
2061 VisitRR(this, kMipsF32x4Neg, node);
2062 }
2063
2064 void InstructionSelector::VisitF32x4RecipApprox(Node* node) {
2065 VisitRR(this, kMipsF32x4RecipApprox, node);
2066 }
2067
2068 void InstructionSelector::VisitF32x4RecipSqrtApprox(Node* node) {
2069 VisitRR(this, kMipsF32x4RecipSqrtApprox, node);
2070 }
2071
2072 void InstructionSelector::VisitF32x4Add(Node* node) {
2073 VisitRRR(this, kMipsF32x4Add, node);
2074 }
2075
2076 void InstructionSelector::VisitF32x4Sub(Node* node) {
2077 VisitRRR(this, kMipsF32x4Sub, node);
2078 }
2079
2080 void InstructionSelector::VisitF32x4Mul(Node* node) {
2081 VisitRRR(this, kMipsF32x4Mul, node);
2082 }
2083
2084 void InstructionSelector::VisitF32x4Max(Node* node) {
2085 VisitRRR(this, kMipsF32x4Max, node);
2086 }
2087
2088 void InstructionSelector::VisitF32x4Min(Node* node) {
2089 VisitRRR(this, kMipsF32x4Min, node);
2090 }
2091
2092 void InstructionSelector::VisitF32x4Eq(Node* node) {
2093 VisitRRR(this, kMipsF32x4Eq, node);
2094 }
2095
2096 void InstructionSelector::VisitF32x4Ne(Node* node) {
2097 VisitRRR(this, kMipsF32x4Ne, node);
2098 }
2099
2100 void InstructionSelector::VisitF32x4Lt(Node* node) {
2101 VisitRRR(this, kMipsF32x4Lt, node);
2102 }
2103
2104 void InstructionSelector::VisitF32x4Le(Node* node) {
2105 VisitRRR(this, kMipsF32x4Le, node);
2106 }
2107
2108 void InstructionSelector::VisitI32x4SConvertF32x4(Node* node) {
2109 VisitRR(this, kMipsI32x4SConvertF32x4, node);
2110 }
2111
2112 void InstructionSelector::VisitI32x4UConvertF32x4(Node* node) {
2113 VisitRR(this, kMipsI32x4UConvertF32x4, node);
2114 }
2115
2116 void InstructionSelector::VisitI32x4Neg(Node* node) {
2117 VisitRR(this, kMipsI32x4Neg, node);
2118 }
2119
2120 void InstructionSelector::VisitI32x4GtS(Node* node) {
2121 VisitRRR(this, kMipsI32x4GtS, node);
2122 }
2123
2124 void InstructionSelector::VisitI32x4GeS(Node* node) {
2125 VisitRRR(this, kMipsI32x4GeS, node);
2126 }
2127
2128 void InstructionSelector::VisitI32x4GtU(Node* node) {
2129 VisitRRR(this, kMipsI32x4GtU, node);
2130 }
2131
2132 void InstructionSelector::VisitI32x4GeU(Node* node) {
2133 VisitRRR(this, kMipsI32x4GeU, node);
2134 }
2135
2136 void InstructionSelector::VisitI16x8Splat(Node* node) {
2137 VisitRR(this, kMipsI16x8Splat, node);
2138 }
2139
2140 void InstructionSelector::VisitI16x8ExtractLane(Node* node) {
2141 VisitRRI(this, kMipsI16x8ExtractLane, node);
2142 }
2143
2144 void InstructionSelector::VisitI16x8ReplaceLane(Node* node) {
2145 VisitRRIR(this, kMipsI16x8ReplaceLane, node);
2146 }
2147
2148 void InstructionSelector::VisitI16x8Neg(Node* node) {
2149 VisitRR(this, kMipsI16x8Neg, node);
2150 }
2151
2152 void InstructionSelector::VisitI16x8Shl(Node* node) {
2153 VisitRRI(this, kMipsI16x8Shl, node);
2154 }
2155
2156 void InstructionSelector::VisitI16x8ShrS(Node* node) {
2157 VisitRRI(this, kMipsI16x8ShrS, node);
2158 }
2159
2160 void InstructionSelector::VisitI16x8ShrU(Node* node) {
2161 VisitRRI(this, kMipsI16x8ShrU, node);
2162 }
2163
2164 void InstructionSelector::VisitI16x8Add(Node* node) {
2165 VisitRRR(this, kMipsI16x8Add, node);
2166 }
2167
2168 void InstructionSelector::VisitI16x8AddSaturateS(Node* node) {
2169 VisitRRR(this, kMipsI16x8AddSaturateS, node);
2170 }
2171
2172 void InstructionSelector::VisitI16x8Sub(Node* node) {
2173 VisitRRR(this, kMipsI16x8Sub, node);
2174 }
2175
2176 void InstructionSelector::VisitI16x8SubSaturateS(Node* node) {
2177 VisitRRR(this, kMipsI16x8SubSaturateS, node);
2178 }
2179
2180 void InstructionSelector::VisitI16x8Mul(Node* node) {
2181 VisitRRR(this, kMipsI16x8Mul, node);
2182 }
2183
2184 void InstructionSelector::VisitI16x8MaxS(Node* node) {
2185 VisitRRR(this, kMipsI16x8MaxS, node);
2186 }
2187
2188 void InstructionSelector::VisitI16x8MinS(Node* node) {
2189 VisitRRR(this, kMipsI16x8MinS, node);
2190 }
2191
2192 void InstructionSelector::VisitI16x8Eq(Node* node) {
2193 VisitRRR(this, kMipsI16x8Eq, node);
2194 }
2195
2196 void InstructionSelector::VisitI16x8Ne(Node* node) {
2197 VisitRRR(this, kMipsI16x8Ne, node);
2198 }
2199
2200 void InstructionSelector::VisitI16x8GtS(Node* node) {
2201 VisitRRR(this, kMipsI16x8GtS, node);
2202 }
2203
2204 void InstructionSelector::VisitI16x8GeS(Node* node) {
2205 VisitRRR(this, kMipsI16x8GeS, node);
2206 }
2207
2208 void InstructionSelector::VisitI16x8AddSaturateU(Node* node) {
2209 VisitRRR(this, kMipsI16x8AddSaturateU, node);
2210 }
2211
2212 void InstructionSelector::VisitI16x8SubSaturateU(Node* node) {
2213 VisitRRR(this, kMipsI16x8SubSaturateU, node);
2214 }
2215
2216 void InstructionSelector::VisitI16x8MaxU(Node* node) {
2217 VisitRRR(this, kMipsI16x8MaxU, node);
2218 }
2219
2220 void InstructionSelector::VisitI16x8MinU(Node* node) {
2221 VisitRRR(this, kMipsI16x8MinU, node);
2222 }
2223
2224 void InstructionSelector::VisitI16x8GtU(Node* node) {
2225 VisitRRR(this, kMipsI16x8GtU, node);
2226 }
2227
2228 void InstructionSelector::VisitI16x8GeU(Node* node) {
2229 VisitRRR(this, kMipsI16x8GeU, node);
2230 }
2231
2232 void InstructionSelector::VisitI8x16Splat(Node* node) {
2233 VisitRR(this, kMipsI8x16Splat, node);
2234 }
2235
2236 void InstructionSelector::VisitI8x16ExtractLane(Node* node) {
2237 VisitRRI(this, kMipsI8x16ExtractLane, node);
2238 }
2239
2240 void InstructionSelector::VisitI8x16ReplaceLane(Node* node) {
2241 VisitRRIR(this, kMipsI8x16ReplaceLane, node);
2242 }
2243
2244 void InstructionSelector::VisitI8x16Neg(Node* node) {
2245 VisitRR(this, kMipsI8x16Neg, node);
2246 }
2247
2248 void InstructionSelector::VisitI8x16Shl(Node* node) {
2249 VisitRRI(this, kMipsI8x16Shl, node);
2250 }
2251
2252 void InstructionSelector::VisitI8x16ShrS(Node* node) {
2253 VisitRRI(this, kMipsI8x16ShrS, node);
2254 }
2255
2256 void InstructionSelector::VisitS16x8Select(Node* node) {
2257 VisitRRRR(this, kMipsS16x8Select, node);
2258 }
2259
2260 void InstructionSelector::VisitS8x16Select(Node* node) {
2261 VisitRRRR(this, kMipsS8x16Select, node);
2262 }
2263
2264 void InstructionSelector::VisitI8x16Add(Node* node) {
2265 VisitRRR(this, kMipsI8x16Add, node);
2266 }
2267
2268 void InstructionSelector::VisitI8x16AddSaturateS(Node* node) {
2269 VisitRRR(this, kMipsI8x16AddSaturateS, node);
2270 }
2271
2272 void InstructionSelector::VisitI8x16Sub(Node* node) {
2273 VisitRRR(this, kMipsI8x16Sub, node);
2274 }
2275
2276 void InstructionSelector::VisitI8x16SubSaturateS(Node* node) {
2277 VisitRRR(this, kMipsI8x16SubSaturateS, node);
2278 }
2279
2280 void InstructionSelector::VisitI8x16Mul(Node* node) {
2281 VisitRRR(this, kMipsI8x16Mul, node);
2282 }
2283
2284 void InstructionSelector::VisitI8x16MaxS(Node* node) {
2285 VisitRRR(this, kMipsI8x16MaxS, node);
2286 }
2287
2288 void InstructionSelector::VisitI8x16MinS(Node* node) {
2289 VisitRRR(this, kMipsI8x16MinS, node);
2290 }
2291
2292 void InstructionSelector::VisitI8x16Eq(Node* node) {
2293 VisitRRR(this, kMipsI8x16Eq, node);
2294 }
2295
2296 void InstructionSelector::VisitI8x16Ne(Node* node) {
2297 VisitRRR(this, kMipsI8x16Ne, node);
2298 }
2299
2300 void InstructionSelector::VisitI8x16GtS(Node* node) {
2301 VisitRRR(this, kMipsI8x16GtS, node);
2302 }
2303
2304 void InstructionSelector::VisitI8x16GeS(Node* node) {
2305 VisitRRR(this, kMipsI8x16GeS, node);
2306 }
2307
2308 void InstructionSelector::VisitI8x16ShrU(Node* node) {
2309 VisitRRI(this, kMipsI8x16ShrU, node);
2310 }
2311
2312 void InstructionSelector::VisitI8x16AddSaturateU(Node* node) {
2313 VisitRRR(this, kMipsI8x16AddSaturateU, node);
2314 }
2315
2316 void InstructionSelector::VisitI8x16SubSaturateU(Node* node) {
2317 VisitRRR(this, kMipsI8x16SubSaturateU, node);
2318 }
2319
2320 void InstructionSelector::VisitI8x16MaxU(Node* node) {
2321 VisitRRR(this, kMipsI8x16MaxU, node);
2322 }
2323
2324 void InstructionSelector::VisitI8x16MinU(Node* node) {
2325 VisitRRR(this, kMipsI8x16MinU, node);
2326 }
2327
2328 void InstructionSelector::VisitI8x16GtU(Node* node) {
2329 VisitRRR(this, kMipsI8x16GtU, node);
2330 }
2331
2332 void InstructionSelector::VisitI8x16GeU(Node* node) {
2333 VisitRRR(this, kMipsI8x16GeU, node);
2334 }
2335
2336 void InstructionSelector::VisitS128And(Node* node) {
2337 VisitRRR(this, kMipsS128And, node);
2338 }
2339
2340 void InstructionSelector::VisitS128Or(Node* node) {
2341 VisitRRR(this, kMipsS128Or, node);
2342 }
2343
2344 void InstructionSelector::VisitS128Xor(Node* node) {
2345 VisitRRR(this, kMipsS128Xor, node);
2346 }
2347
2348 void InstructionSelector::VisitS128Not(Node* node) {
2349 VisitRR(this, kMipsS128Not, node);
2350 }
2351
2352 void InstructionSelector::VisitS1x4And(Node* node) {
2353 VisitRRR(this, kMipsS128And, node);
2354 }
2355
2356 void InstructionSelector::VisitS1x4Or(Node* node) {
2357 VisitRRR(this, kMipsS128Or, node);
2358 }
2359
2360 void InstructionSelector::VisitS1x4Xor(Node* node) {
2361 VisitRRR(this, kMipsS128Xor, node);
2362 }
2363
2364 void InstructionSelector::VisitS1x4Not(Node* node) {
2365 VisitRR(this, kMipsS128Not, node);
2366 }
2367
2368 void InstructionSelector::VisitS1x4AnyTrue(Node* node) {
2369 VisitRR(this, kMipsS1x4AnyTrue, node);
2370 }
2371
2372 void InstructionSelector::VisitS1x4AllTrue(Node* node) {
2373 VisitRR(this, kMipsS1x4AllTrue, node);
2374 }
2375
2376 void InstructionSelector::VisitS1x8And(Node* node) {
2377 VisitRRR(this, kMipsS128And, node);
2378 }
2379
2380 void InstructionSelector::VisitS1x8Or(Node* node) {
2381 VisitRRR(this, kMipsS128Or, node);
2382 }
2383
2384 void InstructionSelector::VisitS1x8Xor(Node* node) {
2385 VisitRRR(this, kMipsS128Xor, node);
2386 }
2387
2388 void InstructionSelector::VisitS1x8Not(Node* node) {
2389 VisitRR(this, kMipsS128Not, node);
2390 }
2391
2392 void InstructionSelector::VisitS1x8AnyTrue(Node* node) {
2393 VisitRR(this, kMipsS1x8AnyTrue, node);
2394 }
2395
2396 void InstructionSelector::VisitS1x8AllTrue(Node* node) {
2397 VisitRR(this, kMipsS1x8AllTrue, node);
2398 }
2399
2400 void InstructionSelector::VisitS1x16And(Node* node) {
2401 VisitRRR(this, kMipsS128And, node);
2402 }
2403
2404 void InstructionSelector::VisitS1x16Or(Node* node) {
2405 VisitRRR(this, kMipsS128Or, node);
2406 }
2407
2408 void InstructionSelector::VisitS1x16Xor(Node* node) {
2409 VisitRRR(this, kMipsS128Xor, node);
2410 }
2411
2412 void InstructionSelector::VisitS1x16Not(Node* node) {
2413 VisitRR(this, kMipsS128Not, node);
2414 }
2415
2416 void InstructionSelector::VisitS1x16AnyTrue(Node* node) {
2417 VisitRR(this, kMipsS1x16AnyTrue, node);
2418 }
2419
2420 void InstructionSelector::VisitS1x16AllTrue(Node* node) {
2421 VisitRR(this, kMipsS1x16AllTrue, node);
2422 }
2423 2129
2424 // static 2130 // static
2425 MachineOperatorBuilder::Flags 2131 MachineOperatorBuilder::Flags
2426 InstructionSelector::SupportedMachineOperatorFlags() { 2132 InstructionSelector::SupportedMachineOperatorFlags() {
2427 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags; 2133 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags;
2428 if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) && 2134 if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) &&
2429 IsFp64Mode()) { 2135 IsFp64Mode()) {
2430 flags |= MachineOperatorBuilder::kFloat64RoundDown | 2136 flags |= MachineOperatorBuilder::kFloat64RoundDown |
2431 MachineOperatorBuilder::kFloat64RoundUp | 2137 MachineOperatorBuilder::kFloat64RoundUp |
2432 MachineOperatorBuilder::kFloat64RoundTruncate | 2138 MachineOperatorBuilder::kFloat64RoundTruncate |
(...skipping 23 matching lines...) Expand all
2456 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) || 2162 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) ||
2457 IsMipsArchVariant(kMips32r2)); 2163 IsMipsArchVariant(kMips32r2));
2458 return MachineOperatorBuilder::AlignmentRequirements:: 2164 return MachineOperatorBuilder::AlignmentRequirements::
2459 NoUnalignedAccessSupport(); 2165 NoUnalignedAccessSupport();
2460 } 2166 }
2461 } 2167 }
2462 2168
2463 } // namespace compiler 2169 } // namespace compiler
2464 } // namespace internal 2170 } // namespace internal
2465 } // namespace v8 2171 } // namespace v8
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