| Index: src/mips/constants-mips.h
|
| diff --git a/src/mips/constants-mips.h b/src/mips/constants-mips.h
|
| index b74280f23576565a35438f32626fd0d27cc23383..6a62787ef47ffd1269fa8c3a8c50a1503bffe1ad 100644
|
| --- a/src/mips/constants-mips.h
|
| +++ b/src/mips/constants-mips.h
|
| @@ -161,6 +161,11 @@ const int kInvalidMSARegister = -1;
|
| const int kInvalidMSAControlRegister = -1;
|
| const int kMSAIRRegister = 0;
|
| const int kMSACSRRegister = 1;
|
| +const int kMSARegSize = 128;
|
| +const int kMSALanesByte = kMSARegSize / 8;
|
| +const int kMSALanesHalf = kMSARegSize / 16;
|
| +const int kMSALanesWord = kMSARegSize / 32;
|
| +const int kMSALanesDword = kMSARegSize / 64;
|
|
|
| // FPU (coprocessor 1) control registers. Currently only FCSR is implemented.
|
| const int kFCSRRegister = 31;
|
|
|