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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
8 // on regular desktop machines. | 8 // on regular desktop machines. |
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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347 WORD, | 347 WORD, |
348 DWORD, | 348 DWORD, |
349 FLOAT, | 349 FLOAT, |
350 DOUBLE, | 350 DOUBLE, |
351 FLOAT_DOUBLE, | 351 FLOAT_DOUBLE, |
352 WORD_DWORD | 352 WORD_DWORD |
353 }; | 353 }; |
354 | 354 |
355 // MSA Data Format | 355 // MSA Data Format |
356 enum MSADataFormat { MSA_VECT = 0, MSA_BYTE, MSA_HALF, MSA_WORD, MSA_DWORD }; | 356 enum MSADataFormat { MSA_VECT = 0, MSA_BYTE, MSA_HALF, MSA_WORD, MSA_DWORD }; |
| 357 typedef union { |
| 358 int8_t b[kMSALanesByte]; |
| 359 int16_t h[kMSALanesHalf]; |
| 360 int32_t w[kMSALanesWord]; |
| 361 int64_t d[kMSALanesDword]; |
| 362 } msa_reg_t; |
357 | 363 |
358 // Read and write memory. | 364 // Read and write memory. |
359 inline uint32_t ReadBU(int64_t addr); | 365 inline uint32_t ReadBU(int64_t addr); |
360 inline int32_t ReadB(int64_t addr); | 366 inline int32_t ReadB(int64_t addr); |
361 inline void WriteB(int64_t addr, uint8_t value); | 367 inline void WriteB(int64_t addr, uint8_t value); |
362 inline void WriteB(int64_t addr, int8_t value); | 368 inline void WriteB(int64_t addr, int8_t value); |
363 | 369 |
364 inline uint16_t ReadHU(int64_t addr, Instruction* instr); | 370 inline uint16_t ReadHU(int64_t addr, Instruction* instr); |
365 inline int16_t ReadH(int64_t addr, Instruction* instr); | 371 inline int16_t ReadH(int64_t addr, Instruction* instr); |
366 // Note: Overloaded on the sign of the value. | 372 // Note: Overloaded on the sign of the value. |
367 inline void WriteH(int64_t addr, uint16_t value, Instruction* instr); | 373 inline void WriteH(int64_t addr, uint16_t value, Instruction* instr); |
368 inline void WriteH(int64_t addr, int16_t value, Instruction* instr); | 374 inline void WriteH(int64_t addr, int16_t value, Instruction* instr); |
369 | 375 |
370 inline uint32_t ReadWU(int64_t addr, Instruction* instr); | 376 inline uint32_t ReadWU(int64_t addr, Instruction* instr); |
371 inline int32_t ReadW(int64_t addr, Instruction* instr, TraceType t = WORD); | 377 inline int32_t ReadW(int64_t addr, Instruction* instr, TraceType t = WORD); |
372 inline void WriteW(int64_t addr, int32_t value, Instruction* instr); | 378 inline void WriteW(int64_t addr, int32_t value, Instruction* instr); |
373 inline int64_t Read2W(int64_t addr, Instruction* instr); | 379 inline int64_t Read2W(int64_t addr, Instruction* instr); |
374 inline void Write2W(int64_t addr, int64_t value, Instruction* instr); | 380 inline void Write2W(int64_t addr, int64_t value, Instruction* instr); |
375 | 381 |
376 inline double ReadD(int64_t addr, Instruction* instr); | 382 inline double ReadD(int64_t addr, Instruction* instr); |
377 inline void WriteD(int64_t addr, double value, Instruction* instr); | 383 inline void WriteD(int64_t addr, double value, Instruction* instr); |
378 | 384 |
379 // Helper for debugging memory access. | 385 // Helper for debugging memory access. |
380 inline void DieOrDebug(); | 386 inline void DieOrDebug(); |
381 | 387 |
382 void TraceRegWr(int64_t value, TraceType t = DWORD); | 388 void TraceRegWr(int64_t value, TraceType t = DWORD); |
383 template <typename T> | 389 template <typename T> |
384 void TraceMSARegWr(T* value, TraceType t); | 390 void TraceMSARegWr(T* value, TraceType t); |
| 391 template <typename T> |
| 392 void TraceMSARegWr(T* value); |
385 void TraceMemWr(int64_t addr, int64_t value, TraceType t); | 393 void TraceMemWr(int64_t addr, int64_t value, TraceType t); |
386 void TraceMemRd(int64_t addr, int64_t value, TraceType t = DWORD); | 394 void TraceMemRd(int64_t addr, int64_t value, TraceType t = DWORD); |
387 | 395 |
388 // Operations depending on endianness. | 396 // Operations depending on endianness. |
389 // Get Double Higher / Lower word. | 397 // Get Double Higher / Lower word. |
390 inline int32_t GetDoubleHIW(double* addr); | 398 inline int32_t GetDoubleHIW(double* addr); |
391 inline int32_t GetDoubleLOW(double* addr); | 399 inline int32_t GetDoubleLOW(double* addr); |
392 // Set Double Higher / Lower word. | 400 // Set Double Higher / Lower word. |
393 inline int32_t SetDoubleHIW(double* addr); | 401 inline int32_t SetDoubleHIW(double* addr); |
394 inline int32_t SetDoubleLOW(double* addr); | 402 inline int32_t SetDoubleLOW(double* addr); |
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646 static inline void UnregisterCTryCatch(Isolate* isolate) { | 654 static inline void UnregisterCTryCatch(Isolate* isolate) { |
647 Simulator::current(isolate)->PopAddress(); | 655 Simulator::current(isolate)->PopAddress(); |
648 } | 656 } |
649 }; | 657 }; |
650 | 658 |
651 } // namespace internal | 659 } // namespace internal |
652 } // namespace v8 | 660 } // namespace v8 |
653 | 661 |
654 #endif // !defined(USE_SIMULATOR) | 662 #endif // !defined(USE_SIMULATOR) |
655 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 663 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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