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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ | 5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ |
6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ | 6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ |
7 | 7 |
8 #include <vector> | 8 #include <vector> |
9 | 9 |
10 #include "src/arm64/assembler-arm64.h" | 10 #include "src/arm64/assembler-arm64.h" |
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478 inline void Fsub(const FPRegister& fd, | 478 inline void Fsub(const FPRegister& fd, |
479 const FPRegister& fn, | 479 const FPRegister& fn, |
480 const FPRegister& fm); | 480 const FPRegister& fm); |
481 inline void Hint(SystemHint code); | 481 inline void Hint(SystemHint code); |
482 inline void Hlt(int code); | 482 inline void Hlt(int code); |
483 inline void Isb(); | 483 inline void Isb(); |
484 inline void Ldnp(const CPURegister& rt, | 484 inline void Ldnp(const CPURegister& rt, |
485 const CPURegister& rt2, | 485 const CPURegister& rt2, |
486 const MemOperand& src); | 486 const MemOperand& src); |
487 // Load a literal from the inline constant pool. | 487 // Load a literal from the inline constant pool. |
488 inline void Ldr(const CPURegister& rt, const Immediate& imm); | 488 inline void Ldr(const CPURegister& rt, const Operand& imm); |
489 // Helper function for double immediate. | 489 // Helper function for double immediate. |
490 inline void Ldr(const CPURegister& rt, double imm); | 490 inline void Ldr(const CPURegister& rt, double imm); |
491 inline void Lsl(const Register& rd, const Register& rn, unsigned shift); | 491 inline void Lsl(const Register& rd, const Register& rn, unsigned shift); |
492 inline void Lsl(const Register& rd, const Register& rn, const Register& rm); | 492 inline void Lsl(const Register& rd, const Register& rn, const Register& rm); |
493 inline void Lsr(const Register& rd, const Register& rn, unsigned shift); | 493 inline void Lsr(const Register& rd, const Register& rn, unsigned shift); |
494 inline void Lsr(const Register& rd, const Register& rn, const Register& rm); | 494 inline void Lsr(const Register& rd, const Register& rn, const Register& rm); |
495 inline void Madd(const Register& rd, | 495 inline void Madd(const Register& rd, |
496 const Register& rn, | 496 const Register& rn, |
497 const Register& rm, | 497 const Register& rm, |
498 const Register& ra); | 498 const Register& ra); |
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2127 class RegisterBits : public BitField<unsigned, 0, 5> {}; | 2127 class RegisterBits : public BitField<unsigned, 0, 5> {}; |
2128 class DeltaBits : public BitField<uint32_t, 5, 32-5> {}; | 2128 class DeltaBits : public BitField<uint32_t, 5, 32-5> {}; |
2129 }; | 2129 }; |
2130 | 2130 |
2131 } // namespace internal | 2131 } // namespace internal |
2132 } // namespace v8 | 2132 } // namespace v8 |
2133 | 2133 |
2134 #define ACCESS_MASM(masm) masm-> | 2134 #define ACCESS_MASM(masm) masm-> |
2135 | 2135 |
2136 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ | 2136 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ |
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