[compiler] Delay allocation of code-embedded heap numbers.

src/arm64/assembler-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
@@ skipping 21 matching lines @@
 
 #include "src/arm64/assembler-arm64-inl.h"
 #include "src/arm64/frames-arm64.h"
 #include "src/base/bits.h"
 #include "src/base/cpu.h"
 #include "src/register-configuration.h"
 
 namespace v8 {
 namespace internal {
 
-
 // -----------------------------------------------------------------------------
 // CpuFeatures implementation.
 
 void CpuFeatures::ProbeImpl(bool cross_compile) {
   // AArch64 has no configuration options, no further probing is required.
   supported_ = 0;
 
   // Only use statically determined features for cross compile (snapshot).
   if (cross_compile) return;
 
@@ skipping 528 matching lines @@
   pc_ = buffer_;
   reloc_info_writer.Reposition(reinterpret_cast<byte*>(buffer_ + buffer_size_),
                                reinterpret_cast<byte*>(pc_));
   constpool_.Clear();
   next_constant_pool_check_ = 0;
   next_veneer_pool_check_ = kMaxInt;
   no_const_pool_before_ = 0;
   ClearRecordedAstId();
 }
 
+void Assembler::set_heap_number(Handle<HeapObject> number, Address pc) {
+  Memory::Address_at(target_pointer_address_at(pc)) =
+      reinterpret_cast<Address>(number.location());
+}
 
-void Assembler::GetCode(CodeDesc* desc) {
+void Assembler::GetCode(Isolate* isolate, CodeDesc* desc) {
   // Emit constant pool if necessary.
   CheckConstPool(true, false);
   DCHECK(constpool_.IsEmpty());
 
+  AllocateRequestedHeapNumbers(isolate);
+
   // Set up code descriptor.
   if (desc) {
     desc->buffer = reinterpret_cast<byte*>(buffer_);
     desc->buffer_size = buffer_size_;
     desc->instr_size = pc_offset();
     desc->reloc_size =
         static_cast<int>((reinterpret_cast<byte*>(buffer_) + buffer_size_) -
                          reloc_info_writer.pos());
     desc->origin = this;
     desc->constant_pool_size = 0;
@@ skipping 1068 matching lines @@
 }
 
 
 void Assembler::ldr_pcrel(const CPURegister& rt, int imm19) {
   // The pattern 'ldr xzr, #offset' is used to indicate the beginning of a
   // constant pool. It should not be emitted.
   DCHECK(!rt.IsZero());
   Emit(LoadLiteralOpFor(rt) | ImmLLiteral(imm19) | Rt(rt));
 }
 
+Operand Operand::EmbeddedNumber(double value) {
+  int32_t smi;
+  if (DoubleToSmiInteger(value, &smi)) {
+    return Operand(Immediate(Smi::FromInt(smi)));
+  }
+  Operand result(bit_cast<int64_t>(value), RelocInfo::EMBEDDED_OBJECT);
+  result.is_heap_number_ = true;
+  return result;
+}
+
+void Assembler::ldr(const CPURegister& rt, const Operand& operand) {
+  if (operand.is_heap_number()) {
+    RequestHeapNumber(operand.heap_number());
+    ldr(rt, Immediate(0, RelocInfo::EMBEDDED_OBJECT));
+  } else {
+    ldr(rt, operand.immediate());
+  }
+}
 
 void Assembler::ldr(const CPURegister& rt, const Immediate& imm) {
   // Currently we only support 64-bit literals.
   DCHECK(rt.Is64Bits());
 
   RecordRelocInfo(imm.rmode(), imm.value());
   BlockConstPoolFor(1);
   // The load will be patched when the constpool is emitted, patching code
   // expect a load literal with offset 0.
   ldr_pcrel(rt, 0);
@@ skipping 1529 matching lines @@
   movk(scratch, (target_offset >> 32) & 0xFFFF, 32);
   DCHECK((target_offset >> 48) == 0);
   add(rd, rd, scratch);
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_ARM64