[compiler] Delay allocation of code-embedded heap numbers.

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 506 matching lines @@
     return Operand(key, LSL, kPointerSizeLog2 - kSmiTagSize);
   }
   INLINE(static Operand DoubleOffsetFromSmiKey(Register key)) {
     STATIC_ASSERT(kSmiTag == 0 && kSmiTagSize < kDoubleSizeLog2);
     return Operand(key, LSL, kDoubleSizeLog2 - kSmiTagSize);
   }
 
   // rm <shift_op> rs
   explicit Operand(Register rm, ShiftOp shift_op, Register rs);
 
+  static Operand EmbeddedNumber(double value);  // Smi or HeapNumber
+
   // Return true if this is a register operand.
   INLINE(bool is_reg() const) {
     return rm_.is_valid() &&
         rs_.is(no_reg) &&
         shift_op_ == LSL &&
         shift_imm_ == 0;
   }
 
   // Return the number of actual instructions required to implement the given
   // instruction for this particular operand. This can be a single instruction,
   // if no load into the ip register is necessary, or anything between 2 and 4
   // instructions when we need to load from the constant pool (depending upon
   // whether the constant pool entry is in the small or extended section). If
   // the instruction this operand is used for is a MOV or MVN instruction the
   // actual instruction to use is required for this calculation. For other
   // instructions instr is ignored.
   //
   // The value returned is only valid as long as no entries are added to the
   // constant pool between this call and the actual instruction being emitted.
   int instructions_required(const Assembler* assembler, Instr instr = 0) const;
   bool must_output_reloc_info(const Assembler* assembler) const;
 
   inline int32_t immediate() const {
     DCHECK(!rm_.is_valid());
-    return imm32_;
+    DCHECK(!is_heap_number());
+    return value_.immediate;
+  }
+
+  double heap_number() const {
+    DCHECK(is_heap_number());
+    return value_.heap_number;
   }
 
   Register rm() const { return rm_; }
   Register rs() const { return rs_; }
   ShiftOp shift_op() const { return shift_op_; }
+  bool is_heap_number() const {
+    DCHECK_IMPLIES(is_heap_number_, !rm_.is_valid());
+    DCHECK_IMPLIES(is_heap_number_, rmode_ == RelocInfo::EMBEDDED_OBJECT);
+    return is_heap_number_;
+  }
+
 
  private:
   Register rm_;
   Register rs_;
   ShiftOp shift_op_;
-  int shift_imm_;  // valid if rm_ != no_reg && rs_ == no_reg
-  int32_t imm32_;  // valid if rm_ == no_reg
+  int shift_imm_;                // valid if rm_ != no_reg && rs_ == no_reg
+  union {
+    double heap_number;          // if is_heap_number_
+    int32_t immediate;           // otherwise
+  } value_;                      // valid if rm_ == no_reg
+  bool is_heap_number_ = false;
   RelocInfo::Mode rmode_;
 
   friend class Assembler;
 };
 
 
 // Class MemOperand represents a memory operand in load and store instructions
 class MemOperand BASE_EMBEDDED {
  public:
   // [rn +/- offset]      Offset/NegOffset
@@ skipping 122 matching lines @@
   // is too small, a fatal error occurs. No deallocation of the buffer is done
   // upon destruction of the assembler.
   Assembler(Isolate* isolate, void* buffer, int buffer_size)
       : Assembler(IsolateData(isolate), buffer, buffer_size) {}
   Assembler(IsolateData isolate_data, void* buffer, int buffer_size);
   virtual ~Assembler();
 
   // GetCode emits any pending (non-emitted) code and fills the descriptor
   // desc. GetCode() is idempotent; it returns the same result if no other
   // Assembler functions are invoked in between GetCode() calls.
-  void GetCode(CodeDesc* desc);
+  void GetCode(Isolate* isolate, CodeDesc* desc);
 
   // Label operations & relative jumps (PPUM Appendix D)
   //
   // Takes a branch opcode (cc) and a label (L) and generates
   // either a backward branch or a forward branch and links it
   // to the label fixup chain. Usage:
   //
   // Label L;    // unbound label
   // j(cc, &L);  // forward branch to unbound label
   // bind(&L);   // bind label to the current pc
@@ skipping 814 matching lines @@
   // constant pools and cause the version of the code with debugger support to
   // have constant pools generated in different places.
   // Recording the position and size of emitted constant pools allows to
   // correctly compute the offset mappings between the different versions of a
   // function in all situations.
   //
   // The parameter indicates the size of the constant pool (in bytes), including
   // the marker and branch over the data.
   void RecordConstPool(int size);
 
+  // Patch the dummy heap number that we emitted during code assembly in the
+  // constant pool entry referenced by {pc}. Replace it with the actual heap
+  // object (handle).
+  static void set_heap_number(Handle<HeapObject> number, Address pc) {
+    Memory::Address_at(constant_pool_entry_address(pc, 0 /* unused */)) =
+        reinterpret_cast<Address>(number.location());
+  }
+
   // Writes a single byte or word of data in the code stream.  Used
   // for inline tables, e.g., jump-tables. CheckConstantPool() should be
   // called before any use of db/dd/dq/dp to ensure that constant pools
   // are not emitted as part of the tables generated.
   void db(uint8_t data);
   void dd(uint32_t data);
   void dq(uint64_t data);
   void dp(uintptr_t data) { dd(data); }
 
   // Emits the address of the code stub's first instruction.
@@ skipping 260 matching lines @@
 
   void Emit(Address addr);
   void FlushICache(Isolate* isolate);
 };
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_