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Side by Side Diff: src/arm/disasm-arm.cc

Issue 2900663002: arm: Fix to pass typed pointer with a cast to %p (Closed)
Patch Set: Created 3 years, 7 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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679 } 679 }
680 case ib_x: { 680 case ib_x: {
681 addr = pc + offset; 681 addr = pc + offset;
682 break; 682 break;
683 } 683 }
684 default: { 684 default: {
685 UNREACHABLE(); 685 UNREACHABLE();
686 return -1; 686 return -1;
687 } 687 }
688 } 688 }
689 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%p", addr); 689 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%p",
690 static_cast<void*>(addr));
690 return 1; 691 return 1;
691 } 692 }
692 case 'S': 693 case 'S':
693 case 'D': { 694 case 'D': {
694 return FormatVFPRegister(instr, format); 695 return FormatVFPRegister(instr, format);
695 } 696 }
696 case 'w': { // 'w: W field of load and store instructions 697 case 'w': { // 'w: W field of load and store instructions
697 if (instr->HasW()) { 698 if (instr->HasW()) {
698 Print("!"); 699 Print("!");
699 } 700 }
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2724 pc += d.InstructionDecode(buffer, pc); 2725 pc += d.InstructionDecode(buffer, pc);
2725 v8::internal::PrintF(f, "%p %08x %s\n", static_cast<void*>(prev_pc), 2726 v8::internal::PrintF(f, "%p %08x %s\n", static_cast<void*>(prev_pc),
2726 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 2727 *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
2727 } 2728 }
2728 } 2729 }
2729 2730
2730 2731
2731 } // namespace disasm 2732 } // namespace disasm
2732 2733
2733 #endif // V8_TARGET_ARCH_ARM 2734 #endif // V8_TARGET_ARCH_ARM
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