Use same range info when emitting code and computing if instruction can deopt.

runtime/vm/intermediate_language_ia32.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_IA32.
 #if defined(TARGET_ARCH_IA32)
 
 #include "vm/intermediate_language.h"
 
 #include "vm/compiler.h"
@@ skipping 2716 matching lines @@
       __ cmpl(left, temp);
       __ j(NOT_EQUAL, deopt);  // Overflow.
     }
     // Shift for result now we know there is no overflow.
     __ shll(left, Immediate(value));
     return;
   }
 
   // Right (locs.in(1)) is not constant.
   Register right = locs.in(1).reg();
-  Range* right_range = shift_left->right()->definition()->range();
+  Range* right_range = shift_left->right_range();
   if (shift_left->left()->BindsToConstant() && shift_left->can_overflow()) {
     // TODO(srdjan): Implement code below for can_overflow().
     // If left is constant, we know the maximal allowed size for right.
     const Object& obj = shift_left->left()->BoundConstant();
     if (obj.IsSmi()) {
       const intptr_t left_int = Smi::Cast(obj).Value();
       if (left_int == 0) {
         __ cmpl(right, Immediate(0));
         __ j(NEGATIVE, deopt);
         return;
@@ skipping 10 matching lines @@
       __ shll(left, right);
     }
     return;
   }
 
   const bool right_needs_check =
       !RangeUtils::IsWithin(right_range, 0, (Smi::kBits - 1));
   ASSERT(right == ECX);  // Count must be in ECX
   if (!shift_left->can_overflow()) {
     if (right_needs_check) {
-      const bool right_may_be_negative =
-          (right_range == NULL) || !right_range->IsPositive();
-      if (right_may_be_negative) {
+      if (!RangeUtils::IsPositive(right_range)) {
         ASSERT(shift_left->CanDeoptimize());
         __ cmpl(right, Immediate(0));
         __ j(NEGATIVE, deopt);
       }
       Label done, is_not_zero;
       __ cmpl(right,
               Immediate(reinterpret_cast<int32_t>(Smi::New(Smi::kBits))));
       __ j(BELOW, &is_not_zero, Assembler::kNearJump);
       __ xorl(left, left);
       __ jmp(&done, Assembler::kNearJump);
@@ skipping 255 matching lines @@
     const Address& right = locs()->in(1).ToStackSlotAddress();
     if (op_kind() == Token::kMUL) {
       __ SmiUntag(left);
     }
     EmitIntegerArithmetic(compiler, op_kind(), left, right, deopt);
     return;
   }
 
   // if locs()->in(1).IsRegister.
   Register right = locs()->in(1).reg();
-  Range* right_range = this->right()->definition()->range();
   switch (op_kind()) {
     case Token::kADD:
     case Token::kSUB:
     case Token::kBIT_AND:
     case Token::kBIT_OR:
     case Token::kBIT_XOR:
     case Token::kMUL:
       if (op_kind() == Token::kMUL) {
         __ SmiUntag(left);
       }
       EmitIntegerArithmetic(compiler, op_kind(), left, right, deopt);
       break;
 
 
     case Token::kTRUNCDIV: {
-      if ((right_range == NULL) || right_range->Overlaps(0, 0)) {
+      if (RangeUtils::CanBeZero(right_range())) {
         // Handle divide by zero in runtime.
         __ testl(right, right);
         __ j(ZERO, deopt);
       }
       ASSERT(left == EAX);
       ASSERT((right != EDX) && (right != EAX));
       ASSERT(locs()->temp(0).reg() == EDX);
       ASSERT(result == EAX);
       __ SmiUntag(left);
       __ SmiUntag(right);
       __ cdq();         // Sign extend EAX -> EDX:EAX.
       __ idivl(right);  //  EAX: quotient, EDX: remainder.
       // Check the corner case of dividing the 'MIN_SMI' with -1, in which
       // case we cannot tag the result.
       __ cmpl(result, Immediate(0x40000000));
       __ j(EQUAL, deopt);
       __ SmiTag(result);
       break;
     }
     case Token::kMOD: {
-      if ((right_range == NULL) || right_range->Overlaps(0, 0)) {
+      if (RangeUtils::CanBeZero(right_range())) {
         // Handle divide by zero in runtime.
         __ testl(right, right);
         __ j(ZERO, deopt);
       }
       ASSERT(left == EDX);
       ASSERT((right != EDX) && (right != EAX));
       ASSERT(locs()->temp(0).reg() == EAX);
       ASSERT(result == EDX);
       __ SmiUntag(left);
       __ SmiUntag(right);
       __ movl(EAX, EDX);
       __ cdq();         // Sign extend EAX -> EDX:EAX.
       __ idivl(right);  //  EAX: quotient, EDX: remainder.
       //  res = left % right;
       //  if (res < 0) {
       //    if (right < 0) {
       //      res = res - right;
       //    } else {
       //      res = res + right;
       //    }
       //  }
       Label done;
       __ cmpl(result, Immediate(0));
       __ j(GREATER_EQUAL, &done, Assembler::kNearJump);
       // Result is negative, adjust it.
-      if ((right_range == NULL) || right_range->Overlaps(-1, 1)) {
+      if (RangeUtils::Overlaps(right_range(), -1, 1)) {
         // Right can be positive and negative.
         Label subtract;
         __ cmpl(right, Immediate(0));
         __ j(LESS, &subtract, Assembler::kNearJump);
         __ addl(result, right);
         __ jmp(&done, Assembler::kNearJump);
         __ Bind(&subtract);
         __ subl(result, right);
-      } else if (right_range->IsPositive()) {
+      } else if (right_range()->IsPositive()) {
         // Right is positive.
         __ addl(result, right);
       } else {
         // Right is negative.
         __ subl(result, right);
       }
       __ Bind(&done);
       __ SmiTag(result);
       break;
     }
     case Token::kSHR: {
       if (CanDeoptimize()) {
         __ cmpl(right, Immediate(0));
         __ j(LESS, deopt);
       }
       __ SmiUntag(right);
       // sarl operation masks the count to 5 bits.
       const intptr_t kCountLimit = 0x1F;
-      if ((right_range == NULL) ||
-          !right_range->OnlyLessThanOrEqualTo(kCountLimit)) {
+      if (!RangeUtils::OnlyLessThanOrEqualTo(right_range(), kCountLimit)) {
         __ cmpl(right, Immediate(kCountLimit));
         Label count_ok;
         __ j(LESS, &count_ok, Assembler::kNearJump);
         __ movl(right, Immediate(kCountLimit));
         __ Bind(&count_ok);
       }
       ASSERT(right == ECX);  // Count must be in ECX
       __ SmiUntag(left);
       __ sarl(left, right);
       __ SmiTag(left);
@@ skipping 2552 matching lines @@
     __ movaps(out, in);
   } else {
     ASSERT(representation() == kTagged);
     Register out = locs()->out(0).reg();
     Register in = in_loc.reg();
     __ movl(out, in);
   }
 }
 
 
-LocationSummary* MergedMathInstr::MakeLocationSummary(Zone* zone,
-                                                      bool opt) const {
-  if (kind() == MergedMathInstr::kTruncDivMod) {
-    const intptr_t kNumInputs = 2;
-    const intptr_t kNumTemps = 0;
-    LocationSummary* summary = new (zone)
-        LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
-    // Both inputs must be writable because they will be untagged.
-    summary->set_in(0, Location::RegisterLocation(EAX));
-    summary->set_in(1, Location::WritableRegister());
-    // Output is a pair of registers.
-    summary->set_out(0, Location::Pair(Location::RegisterLocation(EAX),
-                                       Location::RegisterLocation(EDX)));
-    return summary;
-  }
-  UNIMPLEMENTED();
-  return NULL;
+LocationSummary* TruncDivModInstr::MakeLocationSummary(Zone* zone,
+                                                       bool opt) const {
+  const intptr_t kNumInputs = 2;
+  const intptr_t kNumTemps = 0;
+  LocationSummary* summary = new (zone)
+      LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
+  // Both inputs must be writable because they will be untagged.
+  summary->set_in(0, Location::RegisterLocation(EAX));
+  summary->set_in(1, Location::WritableRegister());
+  // Output is a pair of registers.
+  summary->set_out(0, Location::Pair(Location::RegisterLocation(EAX),
+                                     Location::RegisterLocation(EDX)));
+  return summary;
 }
 
 
-void MergedMathInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
-  Label* deopt = NULL;
-  if (CanDeoptimize()) {
-    deopt = compiler->AddDeoptStub(deopt_id(), ICData::kDeoptBinarySmiOp);
+void TruncDivModInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  ASSERT(CanDeoptimize());
+  Label* deopt = compiler->AddDeoptStub(deopt_id(), ICData::kDeoptBinarySmiOp);
+  Register left = locs()->in(0).reg();
+  Register right = locs()->in(1).reg();
+  ASSERT(locs()->out(0).IsPairLocation());
+  PairLocation* pair = locs()->out(0).AsPairLocation();
+  Register result1 = pair->At(0).reg();
+  Register result2 = pair->At(1).reg();
+  if (RangeUtils::CanBeZero(divisor_range())) {
+    // Handle divide by zero in runtime.
+    __ testl(right, right);
+    __ j(ZERO, deopt);
   }
+  ASSERT(left == EAX);
+  ASSERT((right != EDX) && (right != EAX));
+  ASSERT(result1 == EAX);
+  ASSERT(result2 == EDX);
+  __ SmiUntag(left);
+  __ SmiUntag(right);
+  __ cdq();         // Sign extend EAX -> EDX:EAX.
+  __ idivl(right);  //  EAX: quotient, EDX: remainder.
+  // Check the corner case of dividing the 'MIN_SMI' with -1, in which
+  // case we cannot tag the result.
+  // TODO(srdjan): We could store instead untagged intermediate results in a
+  // typed array, but then the load indexed instructions would need to be
+  // able to deoptimize.
+  __ cmpl(EAX, Immediate(0x40000000));
+  __ j(EQUAL, deopt);
+  // Modulo result (EDX) correction:
+  //  res = left % right;
+  //  if (res < 0) {
+  //    if (right < 0) {
+  //      res = res - right;
+  //    } else {
+  //      res = res + right;
+  //    }
+  //  }
+  Label done;
+  __ cmpl(EDX, Immediate(0));
+  __ j(GREATER_EQUAL, &done, Assembler::kNearJump);
+  // Result is negative, adjust it.
+  if (RangeUtils::Overlaps(divisor_range(), -1, 1)) {
+    Label subtract;
+    __ cmpl(right, Immediate(0));
+    __ j(LESS, &subtract, Assembler::kNearJump);
+    __ addl(EDX, right);
+    __ jmp(&done, Assembler::kNearJump);
+    __ Bind(&subtract);
+    __ subl(EDX, right);
+  } else if (divisor_range()->IsPositive()) {
+    // Right is positive.
+    __ addl(EDX, right);
+  } else {
+    // Right is negative.
+    __ subl(EDX, right);
+  }
+  __ Bind(&done);
 
-  if (kind() == MergedMathInstr::kTruncDivMod) {
-    Register left = locs()->in(0).reg();
-    Register right = locs()->in(1).reg();
-    ASSERT(locs()->out(0).IsPairLocation());
-    PairLocation* pair = locs()->out(0).AsPairLocation();
-    Register result1 = pair->At(0).reg();
-    Register result2 = pair->At(1).reg();
-    Range* right_range = InputAt(1)->definition()->range();
-    if ((right_range == NULL) || right_range->Overlaps(0, 0)) {
-      // Handle divide by zero in runtime.
-      __ testl(right, right);
-      __ j(ZERO, deopt);
-    }
-    ASSERT(left == EAX);
-    ASSERT((right != EDX) && (right != EAX));
-    ASSERT(result1 == EAX);
-    ASSERT(result2 == EDX);
-    __ SmiUntag(left);
-    __ SmiUntag(right);
-    __ cdq();         // Sign extend EAX -> EDX:EAX.
-    __ idivl(right);  //  EAX: quotient, EDX: remainder.
-    // Check the corner case of dividing the 'MIN_SMI' with -1, in which
-    // case we cannot tag the result.
-    // TODO(srdjan): We could store instead untagged intermediate results in a
-    // typed array, but then the load indexed instructions would need to be
-    // able to deoptimize.
-    __ cmpl(EAX, Immediate(0x40000000));
-    __ j(EQUAL, deopt);
-    // Modulo result (EDX) correction:
-    //  res = left % right;
-    //  if (res < 0) {
-    //    if (right < 0) {
-    //      res = res - right;
-    //    } else {
-    //      res = res + right;
-    //    }
-    //  }
-    Label done;
-    __ cmpl(EDX, Immediate(0));
-    __ j(GREATER_EQUAL, &done, Assembler::kNearJump);
-    // Result is negative, adjust it.
-    if ((right_range == NULL) || right_range->Overlaps(-1, 1)) {
-      Label subtract;
-      __ cmpl(right, Immediate(0));
-      __ j(LESS, &subtract, Assembler::kNearJump);
-      __ addl(EDX, right);
-      __ jmp(&done, Assembler::kNearJump);
-      __ Bind(&subtract);
-      __ subl(EDX, right);
-    } else if (right_range->IsPositive()) {
-      // Right is positive.
-      __ addl(EDX, right);
-    } else {
-      // Right is negative.
-      __ subl(EDX, right);
-    }
-    __ Bind(&done);
-
-    __ SmiTag(EAX);
-    __ SmiTag(EDX);
-    return;
-  }
-  UNIMPLEMENTED();
+  __ SmiTag(EAX);
+  __ SmiTag(EDX);
 }
 
 
 LocationSummary* PolymorphicInstanceCallInstr::MakeLocationSummary(
     Zone* zone,
     bool opt) const {
   return MakeCallSummary(zone);
 }
 
 
@@ skipping 340 matching lines @@
   summary->set_in(1, Location::FixedRegisterOrSmiConstant(right(), ECX));
   if ((op_kind() == Token::kSHL) && CanDeoptimize()) {
     summary->set_temp(0, Location::RequiresRegister());
     summary->set_temp(1, Location::RequiresRegister());
   }
   summary->set_out(0, Location::SameAsFirstInput());
   return summary;
 }
 
 
-static const intptr_t kMintShiftCountLimit = 63;
-
-bool ShiftMintOpInstr::has_shift_count_check() const {
-  return !RangeUtils::IsWithin(right()->definition()->range(), 0,
-                               kMintShiftCountLimit);
-}
-
-
 void ShiftMintOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   PairLocation* left_pair = locs()->in(0).AsPairLocation();
   Register left_lo = left_pair->At(0).reg();
   Register left_hi = left_pair->At(1).reg();
   PairLocation* out_pair = locs()->out(0).AsPairLocation();
   Register out_lo = out_pair->At(0).reg();
   Register out_hi = out_pair->At(1).reg();
   ASSERT(out_lo == left_lo);
   ASSERT(out_hi == left_hi);
 
@@ skipping 754 matching lines @@
   __ Drop(1);
   __ popl(result);
 }
 
 
 }  // namespace dart
 
 #undef __
 
 #endif  // defined TARGET_ARCH_IA32