Revert "More compact string representation on 64 bit."

runtime/vm/assembler_x64.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/heap.h"
@@ skipping 3606 matching lines @@
     EmitRegisterREX(operand, REX_W);
   } else {
     EmitRegisterREX(operand, REX_NONE);
   }
   EmitUint8(0xD3);
   EmitOperand(rm, Operand(operand));
 }
 
 
 void Assembler::LoadClassId(Register result, Register object) {
-  ASSERT(RawObject::kClassIdTagPos == 16);
-  ASSERT(RawObject::kClassIdTagSize == 16);
-  ASSERT(sizeof(classid_t) == sizeof(uint16_t));
+  ASSERT(RawObject::kClassIdTagPos == kBitsPerInt32);
+  ASSERT(RawObject::kClassIdTagSize == kBitsPerInt32);
+  ASSERT(sizeof(classid_t) == sizeof(uint32_t));
   const intptr_t class_id_offset =
       Object::tags_offset() + RawObject::kClassIdTagPos / kBitsPerByte;
-  movzxw(result, FieldAddress(object, class_id_offset));
+  movl(result, FieldAddress(object, class_id_offset));
 }
 
 
 void Assembler::LoadClassById(Register result, Register class_id) {
   ASSERT(result != class_id);
   LoadIsolate(result);
   const intptr_t offset =
       Isolate::class_table_offset() + ClassTable::table_offset();
   movq(result, Address(result, offset));
   movq(result, Address(result, class_id, TIMES_8, 0));
 }
 
 
 void Assembler::LoadClass(Register result, Register object) {
   LoadClassId(TMP, object);
   LoadClassById(result, TMP);
 }
 
 
 void Assembler::CompareClassId(Register object, intptr_t class_id) {
   LoadClassId(TMP, object);
   cmpl(TMP, Immediate(class_id));
 }
 
 
 void Assembler::SmiUntagOrCheckClass(Register object,
                                      intptr_t class_id,
                                      Label* is_smi) {
   ASSERT(kSmiTagShift == 1);
-  ASSERT(RawObject::kClassIdTagPos == 16);
-  ASSERT(RawObject::kClassIdTagSize == 16);
-  ASSERT(sizeof(classid_t) == sizeof(uint16_t));
+  ASSERT(RawObject::kClassIdTagPos == kBitsPerInt32);
+  ASSERT(RawObject::kClassIdTagSize == kBitsPerInt32);
+  ASSERT(sizeof(classid_t) == sizeof(uint32_t));
   const intptr_t class_id_offset =
       Object::tags_offset() + RawObject::kClassIdTagPos / kBitsPerByte;
 
   // Untag optimistically. Tag bit is shifted into the CARRY.
   SmiUntag(object);
   j(NOT_CARRY, is_smi, kNearJump);
   // Load cid: can't use LoadClassId, object is untagged. Use TIMES_2 scale
   // factor in the addressing mode to compensate for this.
-  movzxw(TMP, Address(object, TIMES_2, class_id_offset));
+  movl(TMP, Address(object, TIMES_2, class_id_offset));
   cmpl(TMP, Immediate(class_id));
 }
 
 
 void Assembler::LoadClassIdMayBeSmi(Register result, Register object) {
   Label smi;
 
   if (result == object) {
     Label join;
 
@@ skipping 115 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_X64