| Index: runtime/vm/assembler_arm64.cc
|
| diff --git a/runtime/vm/assembler_arm64.cc b/runtime/vm/assembler_arm64.cc
|
| index af6c89159241cc89f54417ad7da380a1607ddfaa..973e704a27938b0e652bcc8660dcec5bc9b6986e 100644
|
| --- a/runtime/vm/assembler_arm64.cc
|
| +++ b/runtime/vm/assembler_arm64.cc
|
| @@ -1035,7 +1035,7 @@ void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
|
| // Reserve space for arguments and align frame before entering
|
| // the C++ world.
|
| if (frame_space != 0) {
|
| - AddImmediate(SP, SP, -frame_space);
|
| + AddImmediate(SP, -frame_space);
|
| }
|
| if (OS::ActivationFrameAlignment() > 1) {
|
| andi(SP, SP, Immediate(~(OS::ActivationFrameAlignment() - 1)));
|
| @@ -1133,7 +1133,7 @@ void Assembler::EnterDartFrame(intptr_t frame_size, Register new_pp) {
|
|
|
| // Reserve space.
|
| if (frame_size > 0) {
|
| - AddImmediate(SP, SP, -frame_size);
|
| + AddImmediate(SP, -frame_size);
|
| }
|
| }
|
|
|
| @@ -1150,7 +1150,7 @@ void Assembler::EnterOsrFrame(intptr_t extra_size, Register new_pp) {
|
| LoadPoolPointer();
|
|
|
| if (extra_size > 0) {
|
| - AddImmediate(SP, SP, -extra_size);
|
| + AddImmediate(SP, -extra_size);
|
| }
|
| }
|
|
|
| @@ -1282,7 +1282,7 @@ void Assembler::MaybeTraceAllocation(intptr_t cid,
|
| intptr_t table_offset =
|
| Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid);
|
| ldr(temp_reg, Address(temp_reg, table_offset));
|
| - AddImmediate(temp_reg, temp_reg, state_offset);
|
| + AddImmediate(temp_reg, state_offset);
|
| ldr(temp_reg, Address(temp_reg, 0));
|
| tsti(temp_reg, Immediate(ClassHeapStats::TraceAllocationMask()));
|
| b(trace, NE);
|
| @@ -1299,7 +1299,7 @@ void Assembler::UpdateAllocationStats(intptr_t cid, Heap::Space space) {
|
| ldr(TMP, Address(TMP2, table_offset));
|
| AddImmediate(TMP2, TMP, counter_offset);
|
| ldr(TMP, Address(TMP2, 0));
|
| - AddImmediate(TMP, TMP, 1);
|
| + AddImmediate(TMP, 1);
|
| str(TMP, Address(TMP2, 0));
|
| }
|
|
|
| @@ -1323,7 +1323,7 @@ void Assembler::UpdateAllocationStatsWithSize(intptr_t cid,
|
| ldr(TMP, Address(TMP2, table_offset));
|
| AddImmediate(TMP2, TMP, class_offset);
|
| ldr(TMP, Address(TMP2, count_field_offset));
|
| - AddImmediate(TMP, TMP, 1);
|
| + AddImmediate(TMP, 1);
|
| str(TMP, Address(TMP2, count_field_offset));
|
| ldr(TMP, Address(TMP2, size_field_offset));
|
| add(TMP, TMP, Operand(size_reg));
|
| @@ -1360,7 +1360,7 @@ void Assembler::TryAllocate(const Class& cls,
|
| str(instance_reg, Address(temp_reg, Heap::TopOffset(space)));
|
|
|
| ASSERT(instance_size >= kHeapObjectTag);
|
| - AddImmediate(instance_reg, instance_reg, -instance_size + kHeapObjectTag);
|
| + AddImmediate(instance_reg, -instance_size + kHeapObjectTag);
|
| NOT_IN_PRODUCT(UpdateAllocationStats(cls.id(), space));
|
|
|
| uword tags = 0;
|
| @@ -1496,7 +1496,7 @@ void Assembler::LoadElementAddressForRegIndex(Register address,
|
| add(address, array, Operand(index, LSL, shift));
|
| }
|
| if (offset != 0) {
|
| - AddImmediate(address, address, offset);
|
| + AddImmediate(address, offset);
|
| }
|
| }
|
|
|
|
|