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Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 2874403002: [wasm] Swap the implementation of SIMD compare ops using Gt/Ge insteas of Lt/Le (Closed)
Patch Set: Add Todo with bug reference Created 3 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 153 matching lines...) Expand 10 before | Expand all | Expand 10 after
164 V(MipsF32x4Mul) \ 164 V(MipsF32x4Mul) \
165 V(MipsF32x4Max) \ 165 V(MipsF32x4Max) \
166 V(MipsF32x4Min) \ 166 V(MipsF32x4Min) \
167 V(MipsF32x4Eq) \ 167 V(MipsF32x4Eq) \
168 V(MipsF32x4Ne) \ 168 V(MipsF32x4Ne) \
169 V(MipsF32x4Lt) \ 169 V(MipsF32x4Lt) \
170 V(MipsF32x4Le) \ 170 V(MipsF32x4Le) \
171 V(MipsI32x4SConvertF32x4) \ 171 V(MipsI32x4SConvertF32x4) \
172 V(MipsI32x4UConvertF32x4) \ 172 V(MipsI32x4UConvertF32x4) \
173 V(MipsI32x4Neg) \ 173 V(MipsI32x4Neg) \
174 V(MipsI32x4LtS) \ 174 V(MipsI32x4GtS) \
175 V(MipsI32x4LeS) \ 175 V(MipsI32x4GeS) \
176 V(MipsI32x4LtU) \ 176 V(MipsI32x4GtU) \
177 V(MipsI32x4LeU) \ 177 V(MipsI32x4GeU) \
178 V(MipsI16x8Splat) \ 178 V(MipsI16x8Splat) \
179 V(MipsI16x8ExtractLane) \ 179 V(MipsI16x8ExtractLane) \
180 V(MipsI16x8ReplaceLane) \ 180 V(MipsI16x8ReplaceLane) \
181 V(MipsI16x8Neg) \ 181 V(MipsI16x8Neg) \
182 V(MipsI16x8Shl) \ 182 V(MipsI16x8Shl) \
183 V(MipsI16x8ShrS) \ 183 V(MipsI16x8ShrS) \
184 V(MipsI16x8ShrU) \ 184 V(MipsI16x8ShrU) \
185 V(MipsI16x8Add) \ 185 V(MipsI16x8Add) \
186 V(MipsI16x8AddSaturateS) \ 186 V(MipsI16x8AddSaturateS) \
187 V(MipsI16x8Sub) \ 187 V(MipsI16x8Sub) \
188 V(MipsI16x8SubSaturateS) \ 188 V(MipsI16x8SubSaturateS) \
189 V(MipsI16x8Mul) \ 189 V(MipsI16x8Mul) \
190 V(MipsI16x8MaxS) \ 190 V(MipsI16x8MaxS) \
191 V(MipsI16x8MinS) \ 191 V(MipsI16x8MinS) \
192 V(MipsI16x8Eq) \ 192 V(MipsI16x8Eq) \
193 V(MipsI16x8Ne) \ 193 V(MipsI16x8Ne) \
194 V(MipsI16x8LtS) \ 194 V(MipsI16x8GtS) \
195 V(MipsI16x8LeS) \ 195 V(MipsI16x8GeS) \
196 V(MipsI16x8AddSaturateU) \ 196 V(MipsI16x8AddSaturateU) \
197 V(MipsI16x8SubSaturateU) \ 197 V(MipsI16x8SubSaturateU) \
198 V(MipsI16x8MaxU) \ 198 V(MipsI16x8MaxU) \
199 V(MipsI16x8MinU) \ 199 V(MipsI16x8MinU) \
200 V(MipsI16x8LtU) \ 200 V(MipsI16x8GtU) \
201 V(MipsI16x8LeU) \ 201 V(MipsI16x8GeU) \
202 V(MipsI8x16Splat) \ 202 V(MipsI8x16Splat) \
203 V(MipsI8x16ExtractLane) \ 203 V(MipsI8x16ExtractLane) \
204 V(MipsI8x16ReplaceLane) \ 204 V(MipsI8x16ReplaceLane) \
205 V(MipsI8x16Neg) \ 205 V(MipsI8x16Neg) \
206 V(MipsI8x16Shl) \ 206 V(MipsI8x16Shl) \
207 V(MipsI8x16ShrS) \ 207 V(MipsI8x16ShrS) \
208 V(MipsS16x8Select) \ 208 V(MipsS16x8Select) \
209 V(MipsS8x16Select) 209 V(MipsS8x16Select)
210 210
211 // Addressing modes represent the "shape" of inputs to an instruction. 211 // Addressing modes represent the "shape" of inputs to an instruction.
(...skipping 13 matching lines...) Expand all
225 #define TARGET_ADDRESSING_MODE_LIST(V) \ 225 #define TARGET_ADDRESSING_MODE_LIST(V) \
226 V(MRI) /* [%r0 + K] */ \ 226 V(MRI) /* [%r0 + K] */ \
227 V(MRR) /* [%r0 + %r1] */ 227 V(MRR) /* [%r0 + %r1] */
228 228
229 229
230 } // namespace compiler 230 } // namespace compiler
231 } // namespace internal 231 } // namespace internal
232 } // namespace v8 232 } // namespace v8
233 233
234 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 234 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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