[wasm] Swap the implementation of SIMD compare ops using Gt/Ge insteas of Lt/Le

src/compiler/arm/instruction-scheduler-arm.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-scheduler.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
@@ skipping 126 matching lines @@
     case kArmI32x4Shl:
     case kArmI32x4ShrS:
     case kArmI32x4Add:
     case kArmI32x4AddHoriz:
     case kArmI32x4Sub:
     case kArmI32x4Mul:
     case kArmI32x4MinS:
     case kArmI32x4MaxS:
     case kArmI32x4Eq:
     case kArmI32x4Ne:
-    case kArmI32x4LtS:
-    case kArmI32x4LeS:
+    case kArmI32x4GtS:
+    case kArmI32x4GeS:
     case kArmI32x4UConvertF32x4:
     case kArmI32x4UConvertI16x8Low:
     case kArmI32x4UConvertI16x8High:
     case kArmI32x4ShrU:
     case kArmI32x4MinU:
     case kArmI32x4MaxU:
-    case kArmI32x4LtU:
-    case kArmI32x4LeU:
+    case kArmI32x4GtU:
+    case kArmI32x4GeU:
     case kArmI16x8Splat:
     case kArmI16x8ExtractLane:
     case kArmI16x8ReplaceLane:
     case kArmI16x8SConvertI8x16Low:
     case kArmI16x8SConvertI8x16High:
     case kArmI16x8Neg:
     case kArmI16x8Shl:
     case kArmI16x8ShrS:
     case kArmI16x8SConvertI32x4:
     case kArmI16x8Add:
     case kArmI16x8AddSaturateS:
     case kArmI16x8AddHoriz:
     case kArmI16x8Sub:
     case kArmI16x8SubSaturateS:
     case kArmI16x8Mul:
     case kArmI16x8MinS:
     case kArmI16x8MaxS:
     case kArmI16x8Eq:
     case kArmI16x8Ne:
-    case kArmI16x8LtS:
-    case kArmI16x8LeS:
+    case kArmI16x8GtS:
+    case kArmI16x8GeS:
     case kArmI16x8UConvertI8x16Low:
     case kArmI16x8UConvertI8x16High:
     case kArmI16x8ShrU:
     case kArmI16x8UConvertI32x4:
     case kArmI16x8AddSaturateU:
     case kArmI16x8SubSaturateU:
     case kArmI16x8MinU:
     case kArmI16x8MaxU:
-    case kArmI16x8LtU:
-    case kArmI16x8LeU:
+    case kArmI16x8GtU:
+    case kArmI16x8GeU:
     case kArmI8x16Splat:
     case kArmI8x16ExtractLane:
     case kArmI8x16ReplaceLane:
     case kArmI8x16Neg:
     case kArmI8x16Shl:
     case kArmI8x16ShrS:
     case kArmI8x16SConvertI16x8:
     case kArmI8x16Add:
     case kArmI8x16AddSaturateS:
     case kArmI8x16Sub:
     case kArmI8x16SubSaturateS:
     case kArmI8x16Mul:
     case kArmI8x16MinS:
     case kArmI8x16MaxS:
     case kArmI8x16Eq:
     case kArmI8x16Ne:
-    case kArmI8x16LtS:
-    case kArmI8x16LeS:
+    case kArmI8x16GtS:
+    case kArmI8x16GeS:
     case kArmI8x16UConvertI16x8:
     case kArmI8x16AddSaturateU:
     case kArmI8x16SubSaturateU:
     case kArmI8x16ShrU:
     case kArmI8x16MinU:
     case kArmI8x16MaxU:
-    case kArmI8x16LtU:
-    case kArmI8x16LeU:
+    case kArmI8x16GtU:
+    case kArmI8x16GeU:
     case kArmS128Zero:
     case kArmS128And:
     case kArmS128Or:
     case kArmS128Xor:
     case kArmS128Not:
     case kArmS128Select:
     case kArmS32x4ZipLeft:
     case kArmS32x4ZipRight:
     case kArmS32x4UnzipLeft:
     case kArmS32x4UnzipRight:
@@ skipping 64 matching lines @@
 
 
 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) {
   // TODO(all): Add instruction cost modeling.
   return 1;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8