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Side by Side Diff: src/compiler/arm/instruction-codes-arm.h

Issue 2874403002: [wasm] Swap the implementation of SIMD compare ops using Gt/Ge insteas of Lt/Le (Closed)
Patch Set: Add Todo with bug reference Created 3 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 142 matching lines...) Expand 10 before | Expand all | Expand 10 after
153 V(ArmI32x4Shl) \ 153 V(ArmI32x4Shl) \
154 V(ArmI32x4ShrS) \ 154 V(ArmI32x4ShrS) \
155 V(ArmI32x4Add) \ 155 V(ArmI32x4Add) \
156 V(ArmI32x4AddHoriz) \ 156 V(ArmI32x4AddHoriz) \
157 V(ArmI32x4Sub) \ 157 V(ArmI32x4Sub) \
158 V(ArmI32x4Mul) \ 158 V(ArmI32x4Mul) \
159 V(ArmI32x4MinS) \ 159 V(ArmI32x4MinS) \
160 V(ArmI32x4MaxS) \ 160 V(ArmI32x4MaxS) \
161 V(ArmI32x4Eq) \ 161 V(ArmI32x4Eq) \
162 V(ArmI32x4Ne) \ 162 V(ArmI32x4Ne) \
163 V(ArmI32x4LtS) \ 163 V(ArmI32x4GtS) \
164 V(ArmI32x4LeS) \ 164 V(ArmI32x4GeS) \
165 V(ArmI32x4UConvertF32x4) \ 165 V(ArmI32x4UConvertF32x4) \
166 V(ArmI32x4UConvertI16x8Low) \ 166 V(ArmI32x4UConvertI16x8Low) \
167 V(ArmI32x4UConvertI16x8High) \ 167 V(ArmI32x4UConvertI16x8High) \
168 V(ArmI32x4ShrU) \ 168 V(ArmI32x4ShrU) \
169 V(ArmI32x4MinU) \ 169 V(ArmI32x4MinU) \
170 V(ArmI32x4MaxU) \ 170 V(ArmI32x4MaxU) \
171 V(ArmI32x4LtU) \ 171 V(ArmI32x4GtU) \
172 V(ArmI32x4LeU) \ 172 V(ArmI32x4GeU) \
173 V(ArmI16x8Splat) \ 173 V(ArmI16x8Splat) \
174 V(ArmI16x8ExtractLane) \ 174 V(ArmI16x8ExtractLane) \
175 V(ArmI16x8ReplaceLane) \ 175 V(ArmI16x8ReplaceLane) \
176 V(ArmI16x8SConvertI8x16Low) \ 176 V(ArmI16x8SConvertI8x16Low) \
177 V(ArmI16x8SConvertI8x16High) \ 177 V(ArmI16x8SConvertI8x16High) \
178 V(ArmI16x8Neg) \ 178 V(ArmI16x8Neg) \
179 V(ArmI16x8Shl) \ 179 V(ArmI16x8Shl) \
180 V(ArmI16x8ShrS) \ 180 V(ArmI16x8ShrS) \
181 V(ArmI16x8SConvertI32x4) \ 181 V(ArmI16x8SConvertI32x4) \
182 V(ArmI16x8Add) \ 182 V(ArmI16x8Add) \
183 V(ArmI16x8AddSaturateS) \ 183 V(ArmI16x8AddSaturateS) \
184 V(ArmI16x8AddHoriz) \ 184 V(ArmI16x8AddHoriz) \
185 V(ArmI16x8Sub) \ 185 V(ArmI16x8Sub) \
186 V(ArmI16x8SubSaturateS) \ 186 V(ArmI16x8SubSaturateS) \
187 V(ArmI16x8Mul) \ 187 V(ArmI16x8Mul) \
188 V(ArmI16x8MinS) \ 188 V(ArmI16x8MinS) \
189 V(ArmI16x8MaxS) \ 189 V(ArmI16x8MaxS) \
190 V(ArmI16x8Eq) \ 190 V(ArmI16x8Eq) \
191 V(ArmI16x8Ne) \ 191 V(ArmI16x8Ne) \
192 V(ArmI16x8LtS) \ 192 V(ArmI16x8GtS) \
193 V(ArmI16x8LeS) \ 193 V(ArmI16x8GeS) \
194 V(ArmI16x8UConvertI8x16Low) \ 194 V(ArmI16x8UConvertI8x16Low) \
195 V(ArmI16x8UConvertI8x16High) \ 195 V(ArmI16x8UConvertI8x16High) \
196 V(ArmI16x8ShrU) \ 196 V(ArmI16x8ShrU) \
197 V(ArmI16x8UConvertI32x4) \ 197 V(ArmI16x8UConvertI32x4) \
198 V(ArmI16x8AddSaturateU) \ 198 V(ArmI16x8AddSaturateU) \
199 V(ArmI16x8SubSaturateU) \ 199 V(ArmI16x8SubSaturateU) \
200 V(ArmI16x8MinU) \ 200 V(ArmI16x8MinU) \
201 V(ArmI16x8MaxU) \ 201 V(ArmI16x8MaxU) \
202 V(ArmI16x8LtU) \ 202 V(ArmI16x8GtU) \
203 V(ArmI16x8LeU) \ 203 V(ArmI16x8GeU) \
204 V(ArmI8x16Splat) \ 204 V(ArmI8x16Splat) \
205 V(ArmI8x16ExtractLane) \ 205 V(ArmI8x16ExtractLane) \
206 V(ArmI8x16ReplaceLane) \ 206 V(ArmI8x16ReplaceLane) \
207 V(ArmI8x16Neg) \ 207 V(ArmI8x16Neg) \
208 V(ArmI8x16Shl) \ 208 V(ArmI8x16Shl) \
209 V(ArmI8x16ShrS) \ 209 V(ArmI8x16ShrS) \
210 V(ArmI8x16SConvertI16x8) \ 210 V(ArmI8x16SConvertI16x8) \
211 V(ArmI8x16Add) \ 211 V(ArmI8x16Add) \
212 V(ArmI8x16AddSaturateS) \ 212 V(ArmI8x16AddSaturateS) \
213 V(ArmI8x16Sub) \ 213 V(ArmI8x16Sub) \
214 V(ArmI8x16SubSaturateS) \ 214 V(ArmI8x16SubSaturateS) \
215 V(ArmI8x16Mul) \ 215 V(ArmI8x16Mul) \
216 V(ArmI8x16MinS) \ 216 V(ArmI8x16MinS) \
217 V(ArmI8x16MaxS) \ 217 V(ArmI8x16MaxS) \
218 V(ArmI8x16Eq) \ 218 V(ArmI8x16Eq) \
219 V(ArmI8x16Ne) \ 219 V(ArmI8x16Ne) \
220 V(ArmI8x16LtS) \ 220 V(ArmI8x16GtS) \
221 V(ArmI8x16LeS) \ 221 V(ArmI8x16GeS) \
222 V(ArmI8x16ShrU) \ 222 V(ArmI8x16ShrU) \
223 V(ArmI8x16UConvertI16x8) \ 223 V(ArmI8x16UConvertI16x8) \
224 V(ArmI8x16AddSaturateU) \ 224 V(ArmI8x16AddSaturateU) \
225 V(ArmI8x16SubSaturateU) \ 225 V(ArmI8x16SubSaturateU) \
226 V(ArmI8x16MinU) \ 226 V(ArmI8x16MinU) \
227 V(ArmI8x16MaxU) \ 227 V(ArmI8x16MaxU) \
228 V(ArmI8x16LtU) \ 228 V(ArmI8x16GtU) \
229 V(ArmI8x16LeU) \ 229 V(ArmI8x16GeU) \
230 V(ArmS128Zero) \ 230 V(ArmS128Zero) \
231 V(ArmS128And) \ 231 V(ArmS128And) \
232 V(ArmS128Or) \ 232 V(ArmS128Or) \
233 V(ArmS128Xor) \ 233 V(ArmS128Xor) \
234 V(ArmS128Not) \ 234 V(ArmS128Not) \
235 V(ArmS128Select) \ 235 V(ArmS128Select) \
236 V(ArmS32x4ZipLeft) \ 236 V(ArmS32x4ZipLeft) \
237 V(ArmS32x4ZipRight) \ 237 V(ArmS32x4ZipRight) \
238 V(ArmS32x4UnzipLeft) \ 238 V(ArmS32x4UnzipLeft) \
239 V(ArmS32x4UnzipRight) \ 239 V(ArmS32x4UnzipRight) \
(...skipping 44 matching lines...) Expand 10 before | Expand all | Expand 10 after
284 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ 284 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \
285 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ 285 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \
286 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ 286 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \
287 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ 287 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */
288 288
289 } // namespace compiler 289 } // namespace compiler
290 } // namespace internal 290 } // namespace internal
291 } // namespace v8 291 } // namespace v8
292 292
293 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 293 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
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