Index: src/mips64/macro-assembler-mips64.cc |
diff --git a/src/mips64/macro-assembler-mips64.cc b/src/mips64/macro-assembler-mips64.cc |
index 13b4be0be60065500f3ba8cea41b835e4514bbbc..5328e05ae6bd9265cc9280fc78e375435581e803 100644 |
--- a/src/mips64/macro-assembler-mips64.cc |
+++ b/src/mips64/macro-assembler-mips64.cc |
@@ -1950,55 +1950,17 @@ void MacroAssembler::Ext(Register rt, |
ext_(rt, rs, pos, size); |
} |
-void MacroAssembler::ExtractBits(Register rt, Register rs, uint16_t pos, |
- uint16_t size) { |
- DCHECK(pos < 64); |
- DCHECK(size > 0 && size <= 64); |
- DCHECK(pos + size <= 64); |
- if (pos < 32) { |
- if (size <= 32) { |
- Dext(rt, rs, pos, size); |
- } else { |
- Dextm(rt, rs, pos, size); |
- } |
- } else if (pos < 64) { |
- DCHECK(size <= 32); |
- Dextu(rt, rs, pos, size); |
- } |
-} |
void MacroAssembler::Dext(Register rt, Register rs, uint16_t pos, |
uint16_t size) { |
- DCHECK(pos < 32); |
- DCHECK(size > 0 && size <= 32); |
- dext_(rt, rs, pos, size); |
-} |
- |
- |
-void MacroAssembler::Dextm(Register rt, Register rs, uint16_t pos, |
- uint16_t size) { |
- DCHECK(pos < 32); |
- DCHECK(size > 32 && size <= 64); |
- DCHECK((pos + size) > 32 && (pos + size) <= 64); |
- dextm(rt, rs, pos, size); |
-} |
- |
- |
-void MacroAssembler::Dextu(Register rt, Register rs, uint16_t pos, |
- uint16_t size) { |
- DCHECK(pos >= 32 && pos < 64); |
- DCHECK(size > 0 && size <= 32); |
- DCHECK((pos + size) > 32 && (pos + size) <= 64); |
- dextu(rt, rs, pos, size); |
-} |
- |
- |
-void MacroAssembler::Dins(Register rt, Register rs, uint16_t pos, |
- uint16_t size) { |
- DCHECK(pos < 32); |
- DCHECK(pos + size <= 32); |
- DCHECK(size != 0); |
- dins_(rt, rs, pos, size); |
+ uint16_t pps = pos + size; |
+ DCHECK(pos < 64 && 0 < size && size <= 64 && 0 < pps && pps <= 64); |
+ if (size > 32) |
ivica.bogosavljevic
2017/05/10 07:43:27
You should put braces here {}, since they are ever
miran.karic
2017/05/10 08:30:48
Done. We actually use the format without braces (e
|
+ dextm_(rt, rs, pos, size); |
+ else if (pos >= 32) |
+ dextu_(rt, rs, pos, size); |
+ else |
+ dext_(rt, rs, pos, size); |
} |
@@ -2012,6 +1974,18 @@ void MacroAssembler::Ins(Register rt, |
ins_(rt, rs, pos, size); |
} |
+void MacroAssembler::Dins(Register rt, Register rs, uint16_t pos, |
+ uint16_t size) { |
+ uint16_t pps = pos + size; |
+ DCHECK(pos < 64 && 0 < size && size <= 64 && 0 < pps && pps <= 64); |
+ if (pps <= 32) |
+ dins_(rt, rs, pos, size); |
+ else if (pos < 32) |
+ dinsm_(rt, rs, pos, size); |
+ else |
+ dinsu_(rt, rs, pos, size); |
+} |
+ |
void MacroAssembler::Neg_s(FPURegister fd, FPURegister fs) { |
if (kArchVariant == kMips64r6) { |
// r6 neg_s changes the sign for NaN-like operands as well. |