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Side by Side Diff: src/mips64/macro-assembler-mips64.h

Issue 2871663002: MIPS64: Add/fix bit insertion/extraction instrs. (Closed)
Patch Set: Remove pps variable use Created 3 years, 7 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips64/assembler-mips64.h" 10 #include "src/mips64/assembler-mips64.h"
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856 void PushSafepointRegisters(); 856 void PushSafepointRegisters();
857 void PopSafepointRegisters(); 857 void PopSafepointRegisters();
858 // Store value in register src in the safepoint stack slot for 858 // Store value in register src in the safepoint stack slot for
859 // register dst. 859 // register dst.
860 void StoreToSafepointRegisterSlot(Register src, Register dst); 860 void StoreToSafepointRegisterSlot(Register src, Register dst);
861 // Load the value of the src register from its safepoint stack slot 861 // Load the value of the src register from its safepoint stack slot
862 // into register dst. 862 // into register dst.
863 void LoadFromSafepointRegisterSlot(Register dst, Register src); 863 void LoadFromSafepointRegisterSlot(Register dst, Register src);
864 864
865 // MIPS64 R2 instruction macro. 865 // MIPS64 R2 instruction macro.
866 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
867 void Dext(Register rt, Register rs, uint16_t pos, uint16_t size);
866 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 868 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
867 void Dins(Register rt, Register rs, uint16_t pos, uint16_t size); 869 void Dins(Register rt, Register rs, uint16_t pos, uint16_t size);
868 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
869
870 void ExtractBits(Register rt, Register rs, uint16_t pos, uint16_t size);
871
872 void Dext(Register rt, Register rs, uint16_t pos, uint16_t size);
873 void Dextm(Register rt, Register rs, uint16_t pos, uint16_t size);
874 void Dextu(Register rt, Register rs, uint16_t pos, uint16_t size);
875 void Neg_s(FPURegister fd, FPURegister fs); 870 void Neg_s(FPURegister fd, FPURegister fs);
876 void Neg_d(FPURegister fd, FPURegister fs); 871 void Neg_d(FPURegister fd, FPURegister fs);
877 872
878 // MIPS64 R6 instruction macros. 873 // MIPS64 R6 instruction macros.
879 void Bovc(Register rt, Register rs, Label* L); 874 void Bovc(Register rt, Register rs, Label* L);
880 void Bnvc(Register rt, Register rs, Label* L); 875 void Bnvc(Register rt, Register rs, Label* L);
881 876
882 // --------------------------------------------------------------------------- 877 // ---------------------------------------------------------------------------
883 // FPU macros. These do not handle special cases like NaN or +- inf. 878 // FPU macros. These do not handle special cases like NaN or +- inf.
884 879
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1969 dd(GetLabelFunction(index)); 1964 dd(GetLabelFunction(index));
1970 } 1965 }
1971 } 1966 }
1972 1967
1973 #define ACCESS_MASM(masm) masm-> 1968 #define ACCESS_MASM(masm) masm->
1974 1969
1975 } // namespace internal 1970 } // namespace internal
1976 } // namespace v8 1971 } // namespace v8
1977 1972
1978 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1973 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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