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Side by Side Diff: test/cctest/test-disasm-ia32.cc

Issue 2870253003: [ia32] Add rcpps, rsqrtps, cvtdq2ps, cvttps2dq (Closed)
Patch Set: Created 3 years, 7 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 410 matching lines...) Expand 10 before | Expand all | Expand 10 after
421 __ subps(xmm1, xmm0); 421 __ subps(xmm1, xmm0);
422 __ subps(xmm1, Operand(ebx, ecx, times_4, 10000)); 422 __ subps(xmm1, Operand(ebx, ecx, times_4, 10000));
423 __ mulps(xmm1, xmm0); 423 __ mulps(xmm1, xmm0);
424 __ mulps(xmm1, Operand(ebx, ecx, times_4, 10000)); 424 __ mulps(xmm1, Operand(ebx, ecx, times_4, 10000));
425 __ divps(xmm1, xmm0); 425 __ divps(xmm1, xmm0);
426 __ divps(xmm1, Operand(ebx, ecx, times_4, 10000)); 426 __ divps(xmm1, Operand(ebx, ecx, times_4, 10000));
427 __ minps(xmm1, xmm0); 427 __ minps(xmm1, xmm0);
428 __ minps(xmm1, Operand(ebx, ecx, times_4, 10000)); 428 __ minps(xmm1, Operand(ebx, ecx, times_4, 10000));
429 __ maxps(xmm1, xmm0); 429 __ maxps(xmm1, xmm0);
430 __ maxps(xmm1, Operand(ebx, ecx, times_4, 10000)); 430 __ maxps(xmm1, Operand(ebx, ecx, times_4, 10000));
431 __ rcpps(xmm1, xmm0);
432 __ rcpps(xmm1, Operand(ebx, ecx, times_4, 10000));
433 __ rsqrtps(xmm1, xmm0);
434 __ rsqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
431 435
432 __ cmpeqps(xmm5, xmm1); 436 __ cmpeqps(xmm5, xmm1);
433 __ cmpeqps(xmm5, Operand(ebx, ecx, times_4, 10000)); 437 __ cmpeqps(xmm5, Operand(ebx, ecx, times_4, 10000));
434 __ cmpltps(xmm5, xmm1); 438 __ cmpltps(xmm5, xmm1);
435 __ cmpltps(xmm5, Operand(ebx, ecx, times_4, 10000)); 439 __ cmpltps(xmm5, Operand(ebx, ecx, times_4, 10000));
436 __ cmpleps(xmm5, xmm1); 440 __ cmpleps(xmm5, xmm1);
437 __ cmpleps(xmm5, Operand(ebx, ecx, times_4, 10000)); 441 __ cmpleps(xmm5, Operand(ebx, ecx, times_4, 10000));
438 __ cmpneqps(xmm5, xmm1); 442 __ cmpneqps(xmm5, xmm1);
439 __ cmpneqps(xmm5, Operand(ebx, ecx, times_4, 10000)); 443 __ cmpneqps(xmm5, Operand(ebx, ecx, times_4, 10000));
440 444
441 __ ucomiss(xmm0, xmm1); 445 __ ucomiss(xmm0, xmm1);
442 __ ucomiss(xmm0, Operand(ebx, ecx, times_4, 10000)); 446 __ ucomiss(xmm0, Operand(ebx, ecx, times_4, 10000));
443 } 447 }
444 { 448 {
445 __ cvttss2si(edx, Operand(ebx, ecx, times_4, 10000)); 449 __ cvttss2si(edx, Operand(ebx, ecx, times_4, 10000));
446 __ cvtsi2sd(xmm1, Operand(ebx, ecx, times_4, 10000)); 450 __ cvtsi2sd(xmm1, Operand(ebx, ecx, times_4, 10000));
447 __ cvtss2sd(xmm1, Operand(ebx, ecx, times_4, 10000)); 451 __ cvtss2sd(xmm1, Operand(ebx, ecx, times_4, 10000));
448 __ cvtss2sd(xmm1, xmm0); 452 __ cvtss2sd(xmm1, xmm0);
453 __ cvtdq2ps(xmm1, xmm0);
454 __ cvtdq2ps(xmm1, Operand(ebx, ecx, times_4, 10000));
455 __ cvttps2dq(xmm1, xmm0);
456 __ cvttps2dq(xmm1, Operand(ebx, ecx, times_4, 10000));
449 __ movsd(xmm1, Operand(ebx, ecx, times_4, 10000)); 457 __ movsd(xmm1, Operand(ebx, ecx, times_4, 10000));
450 __ movsd(Operand(ebx, ecx, times_4, 10000), xmm1); 458 __ movsd(Operand(ebx, ecx, times_4, 10000), xmm1);
451 // 128 bit move instructions. 459 // 128 bit move instructions.
452 __ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000)); 460 __ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000));
453 __ movdqa(Operand(ebx, ecx, times_4, 10000), xmm0); 461 __ movdqa(Operand(ebx, ecx, times_4, 10000), xmm0);
454 __ movdqu(xmm0, Operand(ebx, ecx, times_4, 10000)); 462 __ movdqu(xmm0, Operand(ebx, ecx, times_4, 10000));
455 __ movdqu(Operand(ebx, ecx, times_4, 10000), xmm0); 463 __ movdqu(Operand(ebx, ecx, times_4, 10000), xmm0);
456 464
457 __ addsd(xmm1, xmm0); 465 __ addsd(xmm1, xmm0);
458 __ addsd(xmm1, Operand(ebx, ecx, times_4, 10000)); 466 __ addsd(xmm1, Operand(ebx, ecx, times_4, 10000));
(...skipping 109 matching lines...) Expand 10 before | Expand all | Expand 10 after
568 __ vmulps(xmm0, xmm1, xmm2); 576 __ vmulps(xmm0, xmm1, xmm2);
569 __ vmulps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000)); 577 __ vmulps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
570 __ vsubps(xmm0, xmm1, xmm2); 578 __ vsubps(xmm0, xmm1, xmm2);
571 __ vsubps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000)); 579 __ vsubps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
572 __ vminps(xmm0, xmm1, xmm2); 580 __ vminps(xmm0, xmm1, xmm2);
573 __ vminps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000)); 581 __ vminps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
574 __ vdivps(xmm0, xmm1, xmm2); 582 __ vdivps(xmm0, xmm1, xmm2);
575 __ vdivps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000)); 583 __ vdivps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
576 __ vmaxps(xmm0, xmm1, xmm2); 584 __ vmaxps(xmm0, xmm1, xmm2);
577 __ vmaxps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000)); 585 __ vmaxps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
586 __ vrcpps(xmm1, xmm0);
587 __ vrcpps(xmm1, Operand(ebx, ecx, times_4, 10000));
588 __ vrsqrtps(xmm1, xmm0);
589 __ vrsqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
578 590
579 __ vcmpeqps(xmm5, xmm4, xmm1); 591 __ vcmpeqps(xmm5, xmm4, xmm1);
580 __ vcmpeqps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000)); 592 __ vcmpeqps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
581 __ vcmpltps(xmm5, xmm4, xmm1); 593 __ vcmpltps(xmm5, xmm4, xmm1);
582 __ vcmpltps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000)); 594 __ vcmpltps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
583 __ vcmpleps(xmm5, xmm4, xmm1); 595 __ vcmpleps(xmm5, xmm4, xmm1);
584 __ vcmpleps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000)); 596 __ vcmpleps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
585 __ vcmpneqps(xmm5, xmm4, xmm1); 597 __ vcmpneqps(xmm5, xmm4, xmm1);
586 __ vcmpneqps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000)); 598 __ vcmpneqps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
587 599
(...skipping 13 matching lines...) Expand all
601 __ vdivpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000)); 613 __ vdivpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
602 __ vmaxpd(xmm0, xmm1, xmm2); 614 __ vmaxpd(xmm0, xmm1, xmm2);
603 __ vmaxpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000)); 615 __ vmaxpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
604 616
605 __ vpsllw(xmm0, xmm7, 21); 617 __ vpsllw(xmm0, xmm7, 21);
606 __ vpslld(xmm0, xmm7, 21); 618 __ vpslld(xmm0, xmm7, 21);
607 __ vpsrlw(xmm0, xmm7, 21); 619 __ vpsrlw(xmm0, xmm7, 21);
608 __ vpsrld(xmm0, xmm7, 21); 620 __ vpsrld(xmm0, xmm7, 21);
609 __ vpsraw(xmm0, xmm7, 21); 621 __ vpsraw(xmm0, xmm7, 21);
610 __ vpsrad(xmm0, xmm7, 21); 622 __ vpsrad(xmm0, xmm7, 21);
623
624 __ vcvtdq2ps(xmm1, xmm0);
625 __ vcvtdq2ps(xmm1, Operand(ebx, ecx, times_4, 10000));
626 __ vcvttps2dq(xmm1, xmm0);
627 __ vcvttps2dq(xmm1, Operand(ebx, ecx, times_4, 10000));
628
611 #define EMIT_SSE2_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3) \ 629 #define EMIT_SSE2_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3) \
612 __ v##instruction(xmm7, xmm5, xmm1); \ 630 __ v##instruction(xmm7, xmm5, xmm1); \
613 __ v##instruction(xmm7, xmm5, Operand(edx, 4)); 631 __ v##instruction(xmm7, xmm5, Operand(edx, 4));
614 632
615 SSE2_INSTRUCTION_LIST(EMIT_SSE2_AVXINSTR) 633 SSE2_INSTRUCTION_LIST(EMIT_SSE2_AVXINSTR)
616 #undef EMIT_SSE2_AVXINSTR 634 #undef EMIT_SSE2_AVXINSTR
617 635
618 #define EMIT_SSE4_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3, \ 636 #define EMIT_SSE4_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3, \
619 notUsed4) \ 637 notUsed4) \
620 __ v##instruction(xmm7, xmm5, xmm1); \ 638 __ v##instruction(xmm7, xmm5, xmm1); \
(...skipping 167 matching lines...) Expand 10 before | Expand all | Expand 10 after
788 #ifdef OBJECT_PRINT 806 #ifdef OBJECT_PRINT
789 OFStream os(stdout); 807 OFStream os(stdout);
790 code->Print(os); 808 code->Print(os);
791 byte* begin = code->instruction_start(); 809 byte* begin = code->instruction_start();
792 byte* end = begin + code->instruction_size(); 810 byte* end = begin + code->instruction_size();
793 disasm::Disassembler::Disassemble(stdout, begin, end); 811 disasm::Disassembler::Disassemble(stdout, begin, end);
794 #endif 812 #endif
795 } 813 }
796 814
797 #undef __ 815 #undef __
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