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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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2155 | 2155 |
2156 | 2156 |
2157 void Assembler::cvtsd2ss(XMMRegister dst, const Operand& src) { | 2157 void Assembler::cvtsd2ss(XMMRegister dst, const Operand& src) { |
2158 EnsureSpace ensure_space(this); | 2158 EnsureSpace ensure_space(this); |
2159 EMIT(0xF2); | 2159 EMIT(0xF2); |
2160 EMIT(0x0F); | 2160 EMIT(0x0F); |
2161 EMIT(0x5A); | 2161 EMIT(0x5A); |
2162 emit_sse_operand(dst, src); | 2162 emit_sse_operand(dst, src); |
2163 } | 2163 } |
2164 | 2164 |
| 2165 void Assembler::cvtdq2ps(XMMRegister dst, const Operand& src) { |
| 2166 EnsureSpace ensure_space(this); |
| 2167 EMIT(0x0F); |
| 2168 EMIT(0x5B); |
| 2169 emit_sse_operand(dst, src); |
| 2170 } |
| 2171 |
| 2172 void Assembler::cvttps2dq(XMMRegister dst, const Operand& src) { |
| 2173 EnsureSpace ensure_space(this); |
| 2174 EMIT(0xF3); |
| 2175 EMIT(0x0F); |
| 2176 EMIT(0x5B); |
| 2177 emit_sse_operand(dst, src); |
| 2178 } |
2165 | 2179 |
2166 void Assembler::addsd(XMMRegister dst, const Operand& src) { | 2180 void Assembler::addsd(XMMRegister dst, const Operand& src) { |
2167 EnsureSpace ensure_space(this); | 2181 EnsureSpace ensure_space(this); |
2168 EMIT(0xF2); | 2182 EMIT(0xF2); |
2169 EMIT(0x0F); | 2183 EMIT(0x0F); |
2170 EMIT(0x58); | 2184 EMIT(0x58); |
2171 emit_sse_operand(dst, src); | 2185 emit_sse_operand(dst, src); |
2172 } | 2186 } |
2173 | 2187 |
2174 | 2188 |
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2256 } | 2270 } |
2257 | 2271 |
2258 | 2272 |
2259 void Assembler::divps(XMMRegister dst, const Operand& src) { | 2273 void Assembler::divps(XMMRegister dst, const Operand& src) { |
2260 EnsureSpace ensure_space(this); | 2274 EnsureSpace ensure_space(this); |
2261 EMIT(0x0F); | 2275 EMIT(0x0F); |
2262 EMIT(0x5E); | 2276 EMIT(0x5E); |
2263 emit_sse_operand(dst, src); | 2277 emit_sse_operand(dst, src); |
2264 } | 2278 } |
2265 | 2279 |
| 2280 void Assembler::rcpps(XMMRegister dst, const Operand& src) { |
| 2281 EnsureSpace ensure_space(this); |
| 2282 EMIT(0x0F); |
| 2283 EMIT(0x53); |
| 2284 emit_sse_operand(dst, src); |
| 2285 } |
| 2286 |
| 2287 void Assembler::rsqrtps(XMMRegister dst, const Operand& src) { |
| 2288 EnsureSpace ensure_space(this); |
| 2289 EMIT(0x0F); |
| 2290 EMIT(0x52); |
| 2291 emit_sse_operand(dst, src); |
| 2292 } |
| 2293 |
2266 void Assembler::minps(XMMRegister dst, const Operand& src) { | 2294 void Assembler::minps(XMMRegister dst, const Operand& src) { |
2267 EnsureSpace ensure_space(this); | 2295 EnsureSpace ensure_space(this); |
2268 EMIT(0x0F); | 2296 EMIT(0x0F); |
2269 EMIT(0x5D); | 2297 EMIT(0x5D); |
2270 emit_sse_operand(dst, src); | 2298 emit_sse_operand(dst, src); |
2271 } | 2299 } |
2272 | 2300 |
2273 void Assembler::maxps(XMMRegister dst, const Operand& src) { | 2301 void Assembler::maxps(XMMRegister dst, const Operand& src) { |
2274 EnsureSpace ensure_space(this); | 2302 EnsureSpace ensure_space(this); |
2275 EMIT(0x0F); | 2303 EMIT(0x0F); |
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3134 } | 3162 } |
3135 RelocInfo rinfo(pc_, rmode, data, NULL); | 3163 RelocInfo rinfo(pc_, rmode, data, NULL); |
3136 reloc_info_writer.Write(&rinfo); | 3164 reloc_info_writer.Write(&rinfo); |
3137 } | 3165 } |
3138 | 3166 |
3139 | 3167 |
3140 } // namespace internal | 3168 } // namespace internal |
3141 } // namespace v8 | 3169 } // namespace v8 |
3142 | 3170 |
3143 #endif // V8_TARGET_ARCH_IA32 | 3171 #endif // V8_TARGET_ARCH_IA32 |
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