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Issue 2868603002: [ARM] Improve VFP register moves. (Closed)
Patch Set: Rebase. Created 3 years, 7 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 151 matching lines...) Expand 10 before | Expand all | Expand 10 after
162 T t; 162 T t;
163 163
164 __ stm(db_w, sp, r4.bit() | r5.bit() | lr.bit()); 164 __ stm(db_w, sp, r4.bit() | r5.bit() | lr.bit());
165 165
166 for (int i = 0; i < 4; i++) { 166 for (int i = 0; i < 4; i++) {
167 __ mov(r4, Operand(i)); 167 __ mov(r4, Operand(i));
168 __ vdup(Neon32, q1, r4); 168 __ vdup(Neon32, q1, r4);
169 __ ExtractLane(r5, q1, NeonS32, i); 169 __ ExtractLane(r5, q1, NeonS32, i);
170 __ str(r5, MemOperand(r0, offsetof(T, i32x4_low) + 4 * i)); 170 __ str(r5, MemOperand(r0, offsetof(T, i32x4_low) + 4 * i));
171 SwVfpRegister si = SwVfpRegister::from_code(i); 171 SwVfpRegister si = SwVfpRegister::from_code(i);
172 __ ExtractLane(si, q1, r4, i); 172 __ ExtractLane(si, q1, i);
173 __ vstr(si, r0, offsetof(T, f32x4_low) + 4 * i); 173 __ vstr(si, r0, offsetof(T, f32x4_low) + 4 * i);
174 } 174 }
175 175
176 for (int i = 0; i < 8; i++) { 176 for (int i = 0; i < 8; i++) {
177 __ mov(r4, Operand(i)); 177 __ mov(r4, Operand(i));
178 __ vdup(Neon16, q1, r4); 178 __ vdup(Neon16, q1, r4);
179 __ ExtractLane(r5, q1, NeonS16, i); 179 __ ExtractLane(r5, q1, NeonS16, i);
180 __ str(r5, MemOperand(r0, offsetof(T, i16x8_low) + 4 * i)); 180 __ str(r5, MemOperand(r0, offsetof(T, i16x8_low) + 4 * i));
181 } 181 }
182 182
(...skipping 13 matching lines...) Expand all
196 __ str(r5, MemOperand(r0, offsetof(T, i8x16_low_d) + 4 * (i + 8))); 196 __ str(r5, MemOperand(r0, offsetof(T, i8x16_low_d) + 4 * (i + 8)));
197 } 197 }
198 198
199 if (CpuFeatures::IsSupported(VFP32DREGS)) { 199 if (CpuFeatures::IsSupported(VFP32DREGS)) {
200 for (int i = 0; i < 4; i++) { 200 for (int i = 0; i < 4; i++) {
201 __ mov(r4, Operand(-i)); 201 __ mov(r4, Operand(-i));
202 __ vdup(Neon32, q15, r4); 202 __ vdup(Neon32, q15, r4);
203 __ ExtractLane(r5, q15, NeonS32, i); 203 __ ExtractLane(r5, q15, NeonS32, i);
204 __ str(r5, MemOperand(r0, offsetof(T, i32x4_high) + 4 * i)); 204 __ str(r5, MemOperand(r0, offsetof(T, i32x4_high) + 4 * i));
205 SwVfpRegister si = SwVfpRegister::from_code(i); 205 SwVfpRegister si = SwVfpRegister::from_code(i);
206 __ ExtractLane(si, q15, r4, i); 206 __ ExtractLane(si, q15, i);
207 __ vstr(si, r0, offsetof(T, f32x4_high) + 4 * i); 207 __ vstr(si, r0, offsetof(T, f32x4_high) + 4 * i);
208 } 208 }
209 209
210 for (int i = 0; i < 8; i++) { 210 for (int i = 0; i < 8; i++) {
211 __ mov(r4, Operand(-i)); 211 __ mov(r4, Operand(-i));
212 __ vdup(Neon16, q15, r4); 212 __ vdup(Neon16, q15, r4);
213 __ ExtractLane(r5, q15, NeonS16, i); 213 __ ExtractLane(r5, q15, NeonS16, i);
214 __ str(r5, MemOperand(r0, offsetof(T, i16x8_high) + 4 * i)); 214 __ str(r5, MemOperand(r0, offsetof(T, i16x8_high) + 4 * i));
215 } 215 }
216 216
(...skipping 80 matching lines...) Expand 10 before | Expand all | Expand 10 after
297 int16_t i16x8_high[8]; 297 int16_t i16x8_high[8];
298 int8_t i8x16_low[16]; 298 int8_t i8x16_low[16];
299 int8_t i8x16_high[16]; 299 int8_t i8x16_high[16];
300 int32_t f32x4_low[4]; 300 int32_t f32x4_low[4];
301 int32_t f32x4_high[4]; 301 int32_t f32x4_high[4];
302 } T; 302 } T;
303 T t; 303 T t;
304 304
305 __ stm(db_w, sp, r4.bit() | r5.bit() | r6.bit() | r7.bit() | lr.bit()); 305 __ stm(db_w, sp, r4.bit() | r5.bit() | r6.bit() | r7.bit() | lr.bit());
306 306
307 const Register kScratch = r5;
308
309 __ veor(q0, q0, q0); // Zero 307 __ veor(q0, q0, q0); // Zero
310 __ veor(q1, q1, q1); // Zero 308 __ veor(q1, q1, q1); // Zero
311 for (int i = 0; i < 4; i++) { 309 for (int i = 0; i < 4; i++) {
312 __ mov(r4, Operand(i)); 310 __ mov(r4, Operand(i));
313 __ ReplaceLane(q0, q0, r4, NeonS32, i); 311 __ ReplaceLane(q0, q0, r4, NeonS32, i);
314 SwVfpRegister si = SwVfpRegister::from_code(i); 312 SwVfpRegister si = SwVfpRegister::from_code(i);
315 __ vmov(si, r4); 313 __ vmov(si, r4);
316 __ ReplaceLane(q1, q1, si, kScratch, i); 314 __ ReplaceLane(q1, q1, si, i);
317 } 315 }
318 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, i32x4_low)))); 316 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, i32x4_low))));
319 __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4)); 317 __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
320 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, f32x4_low)))); 318 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, f32x4_low))));
321 __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4)); 319 __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
322 320
323 __ veor(q0, q0, q0); // Zero 321 __ veor(q0, q0, q0); // Zero
324 for (int i = 0; i < 8; i++) { 322 for (int i = 0; i < 8; i++) {
325 __ mov(r4, Operand(i)); 323 __ mov(r4, Operand(i));
326 __ ReplaceLane(q0, q0, r4, NeonS16, i); 324 __ ReplaceLane(q0, q0, r4, NeonS16, i);
(...skipping 10 matching lines...) Expand all
337 __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4)); 335 __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
338 336
339 if (CpuFeatures::IsSupported(VFP32DREGS)) { 337 if (CpuFeatures::IsSupported(VFP32DREGS)) {
340 __ veor(q14, q14, q14); // Zero 338 __ veor(q14, q14, q14); // Zero
341 __ veor(q15, q15, q15); // Zero 339 __ veor(q15, q15, q15); // Zero
342 for (int i = 0; i < 4; i++) { 340 for (int i = 0; i < 4; i++) {
343 __ mov(r4, Operand(-i)); 341 __ mov(r4, Operand(-i));
344 __ ReplaceLane(q14, q14, r4, NeonS32, i); 342 __ ReplaceLane(q14, q14, r4, NeonS32, i);
345 SwVfpRegister si = SwVfpRegister::from_code(i); 343 SwVfpRegister si = SwVfpRegister::from_code(i);
346 __ vmov(si, r4); 344 __ vmov(si, r4);
347 __ ReplaceLane(q15, q15, si, kScratch, i); 345 __ ReplaceLane(q15, q15, si, i);
348 } 346 }
349 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, i32x4_high)))); 347 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, i32x4_high))));
350 __ vst1(Neon8, NeonListOperand(q14), NeonMemOperand(r4)); 348 __ vst1(Neon8, NeonListOperand(q14), NeonMemOperand(r4));
351 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, f32x4_high)))); 349 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, f32x4_high))));
352 __ vst1(Neon8, NeonListOperand(q15), NeonMemOperand(r4)); 350 __ vst1(Neon8, NeonListOperand(q15), NeonMemOperand(r4));
353 351
354 __ veor(q14, q14, q14); // Zero 352 __ veor(q14, q14, q14); // Zero
355 for (int i = 0; i < 8; i++) { 353 for (int i = 0; i < 8; i++) {
356 __ mov(r4, Operand(-i)); 354 __ mov(r4, Operand(-i));
357 __ ReplaceLane(q14, q14, r4, NeonS16, i); 355 __ ReplaceLane(q14, q14, r4, NeonS16, i);
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
399 for (int i = 0; i < 8; i++) { 397 for (int i = 0; i < 8; i++) {
400 CHECK_EQ(-i, t.i16x8_high[i]); 398 CHECK_EQ(-i, t.i16x8_high[i]);
401 } 399 }
402 for (int i = 0; i < 16; i++) { 400 for (int i = 0; i < 16; i++) {
403 CHECK_EQ(-i, t.i8x16_high[i]); 401 CHECK_EQ(-i, t.i8x16_high[i]);
404 } 402 }
405 } 403 }
406 } 404 }
407 405
408 #undef __ 406 #undef __
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