[ARM] Improve VFP register moves.

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 408 matching lines @@
 constexpr QwNeonRegister q14 = { 14 };
 constexpr QwNeonRegister q15 = { 15 };
 
 
 // Aliases for double registers.
 constexpr LowDwVfpRegister kFirstCalleeSavedDoubleReg = d8;
 constexpr LowDwVfpRegister kLastCalleeSavedDoubleReg = d15;
 constexpr LowDwVfpRegister kDoubleRegZero  = d13;
 constexpr LowDwVfpRegister kScratchDoubleReg = d14;
 // This scratch q-register aliases d14 (kScratchDoubleReg) and d15, but is only
-// used when NEON is supported. d15 is still allocatable if there are only 16
-// VFP registers.
+// used if NEON is supported, which implies VFP32DREGS. When there are only 16
+// d-registers, d15 is still allocatable.
 constexpr QwNeonRegister kScratchQuadReg = q7;
+constexpr LowDwVfpRegister kScratchDoubleReg2 = d15;
 
 // Coprocessor register
 struct CRegister {
   bool is_valid() const { return 0 <= reg_code && reg_code < 16; }
   bool is(CRegister creg) const { return reg_code == creg.reg_code; }
   int code() const {
     DCHECK(is_valid());
     return reg_code;
   }
   int bit() const {
@@ skipping 882 matching lines @@
   void vmovl(NeonDataType dt, QwNeonRegister dst, DwVfpRegister src);
   // dt represents the narrower type.
   void vqmovn(NeonDataType dt, DwVfpRegister dst, QwNeonRegister src);
 
   // Only unconditional core <-> scalar moves are currently supported.
   void vmov(NeonDataType dt, DwVfpRegister dst, int index, Register src);
   void vmov(NeonDataType dt, Register dst, DwVfpRegister src, int index);
 
   void vmov(QwNeonRegister dst, QwNeonRegister src);
   void vdup(NeonSize size, QwNeonRegister dst, Register src);
-  void vdup(QwNeonRegister dst, SwVfpRegister src);
+  void vdup(NeonSize size, QwNeonRegister dst, DwVfpRegister src, int index);
+  void vdup(NeonSize size, DwVfpRegister dst, DwVfpRegister src, int index);
 
   void vcvt_f32_s32(QwNeonRegister dst, QwNeonRegister src);
   void vcvt_f32_u32(QwNeonRegister dst, QwNeonRegister src);
   void vcvt_s32_f32(QwNeonRegister dst, QwNeonRegister src);
   void vcvt_u32_f32(QwNeonRegister dst, QwNeonRegister src);
 
   void vmvn(QwNeonRegister dst, QwNeonRegister src);
   void vswp(DwVfpRegister dst, DwVfpRegister src);
   void vswp(QwNeonRegister dst, QwNeonRegister src);
   void vabs(QwNeonRegister dst, QwNeonRegister src);
@@ skipping 28 matching lines @@
             QwNeonRegister src1, QwNeonRegister src2);
   void vpadd(DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2);
   void vpadd(NeonSize size, DwVfpRegister dst, DwVfpRegister src1,
              DwVfpRegister src2);
   void vpmin(NeonDataType dt, DwVfpRegister dst, DwVfpRegister src1,
              DwVfpRegister src2);
   void vpmax(NeonDataType dt, DwVfpRegister dst, DwVfpRegister src1,
              DwVfpRegister src2);
   void vshl(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src, int shift);
   void vshr(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src, int shift);
+  void vsli(NeonSize size, DwVfpRegister dst, DwVfpRegister src, int shift);
+  void vsri(NeonSize size, DwVfpRegister dst, DwVfpRegister src, int shift);
   // vrecpe and vrsqrte only support floating point lanes.
   void vrecpe(QwNeonRegister dst, QwNeonRegister src);
   void vrsqrte(QwNeonRegister dst, QwNeonRegister src);
   void vrecps(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vrsqrts(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vtst(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
             QwNeonRegister src2);
   void vceq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vceq(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
             QwNeonRegister src2);
@@ skipping 412 matching lines @@
 
   void Emit(Address addr);
   void FlushICache(Isolate* isolate);
 };
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_