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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/code_generator.h" | 9 #include "vm/code_generator.h" |
10 #include "vm/compiler.h" | 10 #include "vm/compiler.h" |
11 #include "vm/dart_entry.h" | 11 #include "vm/dart_entry.h" |
12 #include "vm/flow_graph_compiler.h" | 12 #include "vm/flow_graph_compiler.h" |
13 #include "vm/heap.h" | 13 #include "vm/heap.h" |
14 #include "vm/instructions.h" | 14 #include "vm/instructions.h" |
15 #include "vm/object_store.h" | 15 #include "vm/object_store.h" |
16 #include "vm/stack_frame.h" | 16 #include "vm/stack_frame.h" |
17 #include "vm/stub_code.h" | 17 #include "vm/stub_code.h" |
18 #include "vm/tags.h" | 18 #include "vm/tags.h" |
19 | 19 |
20 #define __ assembler-> | 20 #define __ assembler-> |
21 | 21 |
22 namespace dart { | 22 namespace dart { |
23 | 23 |
24 DEFINE_FLAG(bool, inline_alloc, true, "Inline allocation of objects."); | 24 DEFINE_FLAG(bool, inline_alloc, true, "Inline allocation of objects."); |
25 DEFINE_FLAG(bool, use_slow_path, false, | 25 DEFINE_FLAG(bool, use_slow_path, false, |
26 "Set to true for debugging & verifying the slow paths."); | 26 "Set to true for debugging & verifying the slow paths."); |
27 DECLARE_FLAG(bool, trace_optimized_ic_calls); | 27 DECLARE_FLAG(bool, trace_optimized_ic_calls); |
28 | 28 |
| 29 DECLARE_FLAG(bool, enable_debugger); |
29 | 30 |
30 // Input parameters: | 31 // Input parameters: |
31 // RA : return address. | 32 // RA : return address. |
32 // SP : address of last argument in argument array. | 33 // SP : address of last argument in argument array. |
33 // SP + 4*S4 - 4 : address of first argument in argument array. | 34 // SP + 4*S4 - 4 : address of first argument in argument array. |
34 // SP + 4*S4 : address of return value. | 35 // SP + 4*S4 : address of return value. |
35 // S5 : address of the runtime function to call. | 36 // S5 : address of the runtime function to call. |
36 // S4 : number of arguments to the call. | 37 // S4 : number of arguments to the call. |
37 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) { | 38 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) { |
38 const intptr_t isolate_offset = NativeArguments::isolate_offset(); | 39 const intptr_t isolate_offset = NativeArguments::isolate_offset(); |
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1417 __ lw(T0, FieldAddress(S5, ICData::state_bits_offset())); | 1418 __ lw(T0, FieldAddress(S5, ICData::state_bits_offset())); |
1418 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed. | 1419 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed. |
1419 __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask())); | 1420 __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask())); |
1420 __ BranchEqual(T0, num_args, &ok); | 1421 __ BranchEqual(T0, num_args, &ok); |
1421 __ Stop("Incorrect stub for IC data"); | 1422 __ Stop("Incorrect stub for IC data"); |
1422 __ Bind(&ok); | 1423 __ Bind(&ok); |
1423 } | 1424 } |
1424 #endif // DEBUG | 1425 #endif // DEBUG |
1425 | 1426 |
1426 | 1427 |
1427 // Check single stepping. | 1428 if (FLAG_enable_debugger) { |
1428 Label not_stepping; | 1429 // Check single stepping. |
1429 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); | 1430 Label not_stepping; |
1430 __ lbu(T0, Address(T0, Isolate::single_step_offset())); | 1431 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); |
1431 __ BranchEqual(T0, 0, ¬_stepping); | 1432 __ lbu(T0, Address(T0, Isolate::single_step_offset())); |
1432 // Call single step callback in debugger. | 1433 __ BranchEqual(T0, 0, ¬_stepping); |
1433 __ EnterStubFrame(); | 1434 // Call single step callback in debugger. |
1434 __ addiu(SP, SP, Immediate(-2 * kWordSize)); | 1435 __ EnterStubFrame(); |
1435 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data. | 1436 __ addiu(SP, SP, Immediate(-2 * kWordSize)); |
1436 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. | 1437 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data. |
1437 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); | 1438 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. |
1438 __ lw(RA, Address(SP, 0 * kWordSize)); | 1439 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); |
1439 __ lw(S5, Address(SP, 1 * kWordSize)); | 1440 __ lw(RA, Address(SP, 0 * kWordSize)); |
1440 __ addiu(SP, SP, Immediate(2 * kWordSize)); | 1441 __ lw(S5, Address(SP, 1 * kWordSize)); |
1441 __ LeaveStubFrame(); | 1442 __ addiu(SP, SP, Immediate(2 * kWordSize)); |
1442 __ Bind(¬_stepping); | 1443 __ LeaveStubFrame(); |
| 1444 __ Bind(¬_stepping); |
| 1445 } |
1443 | 1446 |
1444 // Load argument descriptor into S4. | 1447 // Load argument descriptor into S4. |
1445 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); | 1448 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); |
1446 // Preserve return address, since RA is needed for subroutine call. | 1449 // Preserve return address, since RA is needed for subroutine call. |
1447 __ mov(T2, RA); | 1450 __ mov(T2, RA); |
1448 // Loop that checks if there is an IC data match. | 1451 // Loop that checks if there is an IC data match. |
1449 Label loop, update, test, found, get_class_id_as_smi; | 1452 Label loop, update, test, found, get_class_id_as_smi; |
1450 // S5: IC data object (preserved). | 1453 // S5: IC data object (preserved). |
1451 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset())); | 1454 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset())); |
1452 // T0: ic_data_array with check entries: classes and target functions. | 1455 // T0: ic_data_array with check entries: classes and target functions. |
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1664 // 'NumArgsTested' is stored in the least significant bits of 'state_bits'. | 1667 // 'NumArgsTested' is stored in the least significant bits of 'state_bits'. |
1665 __ lw(T0, FieldAddress(S5, ICData::state_bits_offset())); | 1668 __ lw(T0, FieldAddress(S5, ICData::state_bits_offset())); |
1666 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed. | 1669 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed. |
1667 __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask())); | 1670 __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask())); |
1668 __ beq(T0, ZR, &ok); | 1671 __ beq(T0, ZR, &ok); |
1669 __ Stop("Incorrect IC data for unoptimized static call"); | 1672 __ Stop("Incorrect IC data for unoptimized static call"); |
1670 __ Bind(&ok); | 1673 __ Bind(&ok); |
1671 } | 1674 } |
1672 #endif // DEBUG | 1675 #endif // DEBUG |
1673 | 1676 |
1674 // Check single stepping. | 1677 if (FLAG_enable_debugger) { |
1675 Label not_stepping; | 1678 // Check single stepping. |
1676 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); | 1679 Label not_stepping; |
1677 __ lbu(T0, Address(T0, Isolate::single_step_offset())); | 1680 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); |
1678 __ BranchEqual(T0, 0, ¬_stepping); | 1681 __ lbu(T0, Address(T0, Isolate::single_step_offset())); |
1679 // Call single step callback in debugger. | 1682 __ BranchEqual(T0, 0, ¬_stepping); |
1680 __ EnterStubFrame(); | 1683 // Call single step callback in debugger. |
1681 __ addiu(SP, SP, Immediate(-2 * kWordSize)); | 1684 __ EnterStubFrame(); |
1682 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data. | 1685 __ addiu(SP, SP, Immediate(-2 * kWordSize)); |
1683 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. | 1686 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data. |
1684 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); | 1687 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. |
1685 __ lw(RA, Address(SP, 0 * kWordSize)); | 1688 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); |
1686 __ lw(S5, Address(SP, 1 * kWordSize)); | 1689 __ lw(RA, Address(SP, 0 * kWordSize)); |
1687 __ addiu(SP, SP, Immediate(2 * kWordSize)); | 1690 __ lw(S5, Address(SP, 1 * kWordSize)); |
1688 __ LeaveStubFrame(); | 1691 __ addiu(SP, SP, Immediate(2 * kWordSize)); |
1689 __ Bind(¬_stepping); | 1692 __ LeaveStubFrame(); |
1690 | 1693 __ Bind(¬_stepping); |
| 1694 } |
1691 | 1695 |
1692 // S5: IC data object (preserved). | 1696 // S5: IC data object (preserved). |
1693 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset())); | 1697 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset())); |
1694 // T0: ic_data_array with entries: target functions and count. | 1698 // T0: ic_data_array with entries: target functions and count. |
1695 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag); | 1699 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag); |
1696 // T0: points directly to the first ic data array element. | 1700 // T0: points directly to the first ic data array element. |
1697 const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize; | 1701 const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize; |
1698 const intptr_t count_offset = ICData::CountIndexFor(0) * kWordSize; | 1702 const intptr_t count_offset = ICData::CountIndexFor(0) * kWordSize; |
1699 | 1703 |
1700 // Increment count for this call. | 1704 // Increment count for this call. |
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1770 __ lw(T0, Address(SP, 0 * kWordSize)); | 1774 __ lw(T0, Address(SP, 0 * kWordSize)); |
1771 __ addiu(SP, SP, Immediate(3 * kWordSize)); | 1775 __ addiu(SP, SP, Immediate(3 * kWordSize)); |
1772 __ LeaveStubFrame(); | 1776 __ LeaveStubFrame(); |
1773 __ jr(T0); | 1777 __ jr(T0); |
1774 } | 1778 } |
1775 | 1779 |
1776 | 1780 |
1777 // Called only from unoptimized code. All relevant registers have been saved. | 1781 // Called only from unoptimized code. All relevant registers have been saved. |
1778 // RA: return address. | 1782 // RA: return address. |
1779 void StubCode::GenerateDebugStepCheckStub(Assembler* assembler) { | 1783 void StubCode::GenerateDebugStepCheckStub(Assembler* assembler) { |
1780 // Check single stepping. | 1784 if (FLAG_enable_debugger) { |
1781 Label not_stepping; | 1785 // Check single stepping. |
1782 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); | 1786 Label not_stepping; |
1783 __ lbu(T0, Address(T0, Isolate::single_step_offset())); | 1787 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); |
1784 __ BranchEqual(T0, 0, ¬_stepping); | 1788 __ lbu(T0, Address(T0, Isolate::single_step_offset())); |
1785 // Call single step callback in debugger. | 1789 __ BranchEqual(T0, 0, ¬_stepping); |
1786 __ EnterStubFrame(); | 1790 // Call single step callback in debugger. |
1787 __ addiu(SP, SP, Immediate(-1 * kWordSize)); | 1791 __ EnterStubFrame(); |
1788 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. | 1792 __ addiu(SP, SP, Immediate(-1 * kWordSize)); |
1789 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); | 1793 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. |
1790 __ lw(RA, Address(SP, 0 * kWordSize)); | 1794 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); |
1791 __ addiu(SP, SP, Immediate(1 * kWordSize)); | 1795 __ lw(RA, Address(SP, 0 * kWordSize)); |
1792 __ LeaveStubFrame(); | 1796 __ addiu(SP, SP, Immediate(1 * kWordSize)); |
1793 __ Bind(¬_stepping); | 1797 __ LeaveStubFrame(); |
| 1798 __ Bind(¬_stepping); |
| 1799 } |
1794 __ Ret(); | 1800 __ Ret(); |
1795 } | 1801 } |
1796 | 1802 |
1797 | 1803 |
1798 // Used to check class and type arguments. Arguments passed in registers: | 1804 // Used to check class and type arguments. Arguments passed in registers: |
1799 // RA: return address. | 1805 // RA: return address. |
1800 // A0: instance (must be preserved). | 1806 // A0: instance (must be preserved). |
1801 // A1: instantiator type arguments or NULL. | 1807 // A1: instantiator type arguments or NULL. |
1802 // A2: cache array. | 1808 // A2: cache array. |
1803 // Result in V0: null -> not found, otherwise result (true or false). | 1809 // Result in V0: null -> not found, otherwise result (true or false). |
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2046 } | 2052 } |
2047 | 2053 |
2048 | 2054 |
2049 // Called only from unoptimized code. All relevant registers have been saved. | 2055 // Called only from unoptimized code. All relevant registers have been saved. |
2050 // RA: return address. | 2056 // RA: return address. |
2051 // SP + 4: left operand. | 2057 // SP + 4: left operand. |
2052 // SP + 0: right operand. | 2058 // SP + 0: right operand. |
2053 // Returns: CMPRES1 is zero if equal, non-zero otherwise. | 2059 // Returns: CMPRES1 is zero if equal, non-zero otherwise. |
2054 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub( | 2060 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub( |
2055 Assembler* assembler) { | 2061 Assembler* assembler) { |
2056 // Check single stepping. | 2062 if (FLAG_enable_debugger) { |
2057 Label not_stepping; | 2063 // Check single stepping. |
2058 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); | 2064 Label not_stepping; |
2059 __ lbu(T0, Address(T0, Isolate::single_step_offset())); | 2065 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); |
2060 __ BranchEqual(T0, 0, ¬_stepping); | 2066 __ lbu(T0, Address(T0, Isolate::single_step_offset())); |
2061 // Call single step callback in debugger. | 2067 __ BranchEqual(T0, 0, ¬_stepping); |
2062 __ EnterStubFrame(); | 2068 // Call single step callback in debugger. |
2063 __ addiu(SP, SP, Immediate(-1 * kWordSize)); | 2069 __ EnterStubFrame(); |
2064 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. | 2070 __ addiu(SP, SP, Immediate(-1 * kWordSize)); |
2065 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); | 2071 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. |
2066 __ lw(RA, Address(SP, 0 * kWordSize)); | 2072 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); |
2067 __ addiu(SP, SP, Immediate(1 * kWordSize)); | 2073 __ lw(RA, Address(SP, 0 * kWordSize)); |
2068 __ LeaveStubFrame(); | 2074 __ addiu(SP, SP, Immediate(1 * kWordSize)); |
2069 __ Bind(¬_stepping); | 2075 __ LeaveStubFrame(); |
| 2076 __ Bind(¬_stepping); |
| 2077 } |
2070 | 2078 |
2071 const Register temp1 = T2; | 2079 const Register temp1 = T2; |
2072 const Register temp2 = T3; | 2080 const Register temp2 = T3; |
2073 const Register left = T1; | 2081 const Register left = T1; |
2074 const Register right = T0; | 2082 const Register right = T0; |
2075 __ lw(left, Address(SP, 1 * kWordSize)); | 2083 __ lw(left, Address(SP, 1 * kWordSize)); |
2076 __ lw(right, Address(SP, 0 * kWordSize)); | 2084 __ lw(right, Address(SP, 0 * kWordSize)); |
2077 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); | 2085 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); |
2078 __ Ret(); | 2086 __ Ret(); |
2079 } | 2087 } |
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2091 const Register right = T0; | 2099 const Register right = T0; |
2092 __ lw(left, Address(SP, 1 * kWordSize)); | 2100 __ lw(left, Address(SP, 1 * kWordSize)); |
2093 __ lw(right, Address(SP, 0 * kWordSize)); | 2101 __ lw(right, Address(SP, 0 * kWordSize)); |
2094 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); | 2102 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); |
2095 __ Ret(); | 2103 __ Ret(); |
2096 } | 2104 } |
2097 | 2105 |
2098 } // namespace dart | 2106 } // namespace dart |
2099 | 2107 |
2100 #endif // defined TARGET_ARCH_MIPS | 2108 #endif // defined TARGET_ARCH_MIPS |
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