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Issue 286363006: Add flag —enable-debugger (default true) in order to disable debugger single stepping code. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
11 #include "vm/dart_entry.h" 11 #include "vm/dart_entry.h"
12 #include "vm/flow_graph_compiler.h" 12 #include "vm/flow_graph_compiler.h"
13 #include "vm/heap.h" 13 #include "vm/heap.h"
14 #include "vm/instructions.h" 14 #include "vm/instructions.h"
15 #include "vm/object_store.h" 15 #include "vm/object_store.h"
16 #include "vm/stack_frame.h" 16 #include "vm/stack_frame.h"
17 #include "vm/stub_code.h" 17 #include "vm/stub_code.h"
18 #include "vm/tags.h" 18 #include "vm/tags.h"
19 19
20 #define __ assembler-> 20 #define __ assembler->
21 21
22 namespace dart { 22 namespace dart {
23 23
24 DEFINE_FLAG(bool, inline_alloc, true, "Inline allocation of objects."); 24 DEFINE_FLAG(bool, inline_alloc, true, "Inline allocation of objects.");
25 DEFINE_FLAG(bool, use_slow_path, false, 25 DEFINE_FLAG(bool, use_slow_path, false,
26 "Set to true for debugging & verifying the slow paths."); 26 "Set to true for debugging & verifying the slow paths.");
27 DECLARE_FLAG(bool, trace_optimized_ic_calls); 27 DECLARE_FLAG(bool, trace_optimized_ic_calls);
28 28
29 DECLARE_FLAG(bool, enable_debugger);
29 30
30 // Input parameters: 31 // Input parameters:
31 // RA : return address. 32 // RA : return address.
32 // SP : address of last argument in argument array. 33 // SP : address of last argument in argument array.
33 // SP + 4*S4 - 4 : address of first argument in argument array. 34 // SP + 4*S4 - 4 : address of first argument in argument array.
34 // SP + 4*S4 : address of return value. 35 // SP + 4*S4 : address of return value.
35 // S5 : address of the runtime function to call. 36 // S5 : address of the runtime function to call.
36 // S4 : number of arguments to the call. 37 // S4 : number of arguments to the call.
37 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) { 38 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) {
38 const intptr_t isolate_offset = NativeArguments::isolate_offset(); 39 const intptr_t isolate_offset = NativeArguments::isolate_offset();
(...skipping 1378 matching lines...) Expand 10 before | Expand all | Expand 10 after
1417 __ lw(T0, FieldAddress(S5, ICData::state_bits_offset())); 1418 __ lw(T0, FieldAddress(S5, ICData::state_bits_offset()));
1418 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed. 1419 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed.
1419 __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask())); 1420 __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
1420 __ BranchEqual(T0, num_args, &ok); 1421 __ BranchEqual(T0, num_args, &ok);
1421 __ Stop("Incorrect stub for IC data"); 1422 __ Stop("Incorrect stub for IC data");
1422 __ Bind(&ok); 1423 __ Bind(&ok);
1423 } 1424 }
1424 #endif // DEBUG 1425 #endif // DEBUG
1425 1426
1426 1427
1427 // Check single stepping. 1428 if (FLAG_enable_debugger) {
1428 Label not_stepping; 1429 // Check single stepping.
1429 __ lw(T0, FieldAddress(CTX, Context::isolate_offset())); 1430 Label not_stepping;
1430 __ lbu(T0, Address(T0, Isolate::single_step_offset())); 1431 __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
1431 __ BranchEqual(T0, 0, &not_stepping); 1432 __ lbu(T0, Address(T0, Isolate::single_step_offset()));
1432 // Call single step callback in debugger. 1433 __ BranchEqual(T0, 0, &not_stepping);
1433 __ EnterStubFrame(); 1434 // Call single step callback in debugger.
1434 __ addiu(SP, SP, Immediate(-2 * kWordSize)); 1435 __ EnterStubFrame();
1435 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data. 1436 __ addiu(SP, SP, Immediate(-2 * kWordSize));
1436 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address. 1437 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data.
1437 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); 1438 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address.
1438 __ lw(RA, Address(SP, 0 * kWordSize)); 1439 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
1439 __ lw(S5, Address(SP, 1 * kWordSize)); 1440 __ lw(RA, Address(SP, 0 * kWordSize));
1440 __ addiu(SP, SP, Immediate(2 * kWordSize)); 1441 __ lw(S5, Address(SP, 1 * kWordSize));
1441 __ LeaveStubFrame(); 1442 __ addiu(SP, SP, Immediate(2 * kWordSize));
1442 __ Bind(&not_stepping); 1443 __ LeaveStubFrame();
1444 __ Bind(&not_stepping);
1445 }
1443 1446
1444 // Load argument descriptor into S4. 1447 // Load argument descriptor into S4.
1445 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); 1448 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
1446 // Preserve return address, since RA is needed for subroutine call. 1449 // Preserve return address, since RA is needed for subroutine call.
1447 __ mov(T2, RA); 1450 __ mov(T2, RA);
1448 // Loop that checks if there is an IC data match. 1451 // Loop that checks if there is an IC data match.
1449 Label loop, update, test, found, get_class_id_as_smi; 1452 Label loop, update, test, found, get_class_id_as_smi;
1450 // S5: IC data object (preserved). 1453 // S5: IC data object (preserved).
1451 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset())); 1454 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
1452 // T0: ic_data_array with check entries: classes and target functions. 1455 // T0: ic_data_array with check entries: classes and target functions.
(...skipping 638 matching lines...) Expand 10 before | Expand all | Expand 10 after
2091 const Register right = T0; 2094 const Register right = T0;
2092 __ lw(left, Address(SP, 1 * kWordSize)); 2095 __ lw(left, Address(SP, 1 * kWordSize));
2093 __ lw(right, Address(SP, 0 * kWordSize)); 2096 __ lw(right, Address(SP, 0 * kWordSize));
2094 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); 2097 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
2095 __ Ret(); 2098 __ Ret();
2096 } 2099 }
2097 2100
2098 } // namespace dart 2101 } // namespace dart
2099 2102
2100 #endif // defined TARGET_ARCH_MIPS 2103 #endif // defined TARGET_ARCH_MIPS
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