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Side by Side Diff: runtime/vm/assembler_mips_test.cc

Issue 2858623002: Remove MIPS support (Closed)
Patch Set: Merge and cleanup Created 3 years, 6 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file.
4
5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS)
7
8 #include "vm/assembler.h"
9 #include "vm/cpu.h"
10 #include "vm/os.h"
11 #include "vm/unit_test.h"
12 #include "vm/virtual_memory.h"
13
14 namespace dart {
15
16 #define __ assembler->
17
18 ASSEMBLER_TEST_GENERATE(Simple, assembler) {
19 __ LoadImmediate(V0, 42);
20 __ jr(RA);
21 }
22
23
24 ASSEMBLER_TEST_RUN(Simple, test) {
25 typedef int (*SimpleCode)() DART_UNUSED;
26 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
27 }
28
29
30 ASSEMBLER_TEST_GENERATE(Addiu, assembler) {
31 __ addiu(V0, ZR, Immediate(42));
32 __ jr(RA);
33 }
34
35
36 ASSEMBLER_TEST_RUN(Addiu, test) {
37 typedef int (*SimpleCode)() DART_UNUSED;
38 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
39 }
40
41
42 ASSEMBLER_TEST_GENERATE(Addiu_overflow, assembler) {
43 __ LoadImmediate(V0, 0x7fffffff);
44 __ addiu(V0, V0, Immediate(1)); // V0 is modified on overflow.
45 __ jr(RA);
46 }
47
48
49 ASSEMBLER_TEST_RUN(Addiu_overflow, test) {
50 typedef int (*SimpleCode)() DART_UNUSED;
51 EXPECT_EQ(static_cast<int32_t>(0x80000000),
52 EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
53 }
54
55
56 ASSEMBLER_TEST_GENERATE(Addu, assembler) {
57 __ addiu(T2, ZR, Immediate(21));
58 __ addiu(T3, ZR, Immediate(21));
59 __ addu(V0, T2, T3);
60 __ jr(RA);
61 }
62
63
64 ASSEMBLER_TEST_RUN(Addu, test) {
65 typedef int (*SimpleCode)() DART_UNUSED;
66 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
67 }
68
69
70 ASSEMBLER_TEST_GENERATE(Addu_overflow, assembler) {
71 __ LoadImmediate(T2, 0x7fffffff);
72 __ addiu(T3, R0, Immediate(1));
73 __ addu(V0, T2, T3);
74 __ jr(RA);
75 }
76
77
78 ASSEMBLER_TEST_RUN(Addu_overflow, test) {
79 typedef int (*SimpleCode)() DART_UNUSED;
80 EXPECT_EQ(static_cast<int32_t>(0x80000000),
81 EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
82 }
83
84
85 ASSEMBLER_TEST_GENERATE(And, assembler) {
86 __ addiu(T2, ZR, Immediate(42));
87 __ addiu(T3, ZR, Immediate(2));
88 __ and_(V0, T2, T3);
89 __ jr(RA);
90 }
91
92
93 ASSEMBLER_TEST_RUN(And, test) {
94 typedef int (*SimpleCode)() DART_UNUSED;
95 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
96 }
97
98
99 ASSEMBLER_TEST_GENERATE(Andi, assembler) {
100 __ addiu(T1, ZR, Immediate(42));
101 __ andi(V0, T1, Immediate(2));
102 __ jr(RA);
103 }
104
105
106 ASSEMBLER_TEST_RUN(Andi, test) {
107 typedef int (*SimpleCode)() DART_UNUSED;
108 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
109 }
110
111
112 ASSEMBLER_TEST_GENERATE(Clo, assembler) {
113 __ addiu(T1, ZR, Immediate(-1));
114 __ clo(V0, T1);
115 __ jr(RA);
116 }
117
118
119 ASSEMBLER_TEST_RUN(Clo, test) {
120 typedef int (*SimpleCode)() DART_UNUSED;
121 EXPECT_EQ(32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
122 }
123
124
125 ASSEMBLER_TEST_GENERATE(Clz, assembler) {
126 __ addiu(T1, ZR, Immediate(0x7fff));
127 __ clz(V0, T1);
128 __ jr(RA);
129 }
130
131
132 ASSEMBLER_TEST_RUN(Clz, test) {
133 typedef int (*SimpleCode)() DART_UNUSED;
134 EXPECT_EQ(17, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
135 }
136
137
138 ASSEMBLER_TEST_GENERATE(MtloMflo, assembler) {
139 __ LoadImmediate(T0, 42);
140 __ mtlo(T0);
141 __ mflo(V0);
142 __ jr(RA);
143 }
144
145
146 ASSEMBLER_TEST_RUN(MtloMflo, test) {
147 typedef int (*SimpleCode)() DART_UNUSED;
148 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
149 }
150
151
152 ASSEMBLER_TEST_GENERATE(MthiMfhi, assembler) {
153 __ LoadImmediate(T0, 42);
154 __ mthi(T0);
155 __ mfhi(V0);
156 __ jr(RA);
157 }
158
159
160 ASSEMBLER_TEST_RUN(MthiMfhi, test) {
161 typedef int (*SimpleCode)() DART_UNUSED;
162 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
163 }
164
165
166 ASSEMBLER_TEST_GENERATE(Divu, assembler) {
167 __ addiu(T1, ZR, Immediate(27));
168 __ addiu(T2, ZR, Immediate(9));
169 __ divu(T1, T2);
170 __ mflo(V0);
171 __ jr(RA);
172 }
173
174
175 ASSEMBLER_TEST_RUN(Divu, test) {
176 typedef int (*SimpleCode)() DART_UNUSED;
177 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
178 }
179
180
181 ASSEMBLER_TEST_GENERATE(Div, assembler) {
182 __ addiu(T1, ZR, Immediate(27));
183 __ addiu(T2, ZR, Immediate(9));
184 __ div(T1, T2);
185 __ mflo(V0);
186 __ jr(RA);
187 }
188
189
190 ASSEMBLER_TEST_RUN(Div, test) {
191 typedef int (*SimpleCode)() DART_UNUSED;
192 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
193 }
194
195
196 ASSEMBLER_TEST_GENERATE(Divu_corner, assembler) {
197 __ LoadImmediate(T1, 0x80000000);
198 __ LoadImmediate(T2, 0xffffffff);
199 __ divu(T1, T2);
200 __ mflo(V0);
201 __ jr(RA);
202 }
203
204
205 ASSEMBLER_TEST_RUN(Divu_corner, test) {
206 typedef int (*SimpleCode)() DART_UNUSED;
207 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
208 }
209
210
211 ASSEMBLER_TEST_GENERATE(Div_corner, assembler) {
212 __ LoadImmediate(T1, 0x80000000);
213 __ LoadImmediate(T2, 0xffffffff);
214 __ div(T1, T2);
215 __ mflo(V0);
216 __ jr(RA);
217 }
218
219
220 ASSEMBLER_TEST_RUN(Div_corner, test) {
221 typedef int (*SimpleCode)() DART_UNUSED;
222 EXPECT_EQ(static_cast<int32_t>(0x80000000),
223 EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
224 }
225
226
227 ASSEMBLER_TEST_GENERATE(Lb, assembler) {
228 __ addiu(SP, SP, Immediate(-kWordSize * 30));
229 __ LoadImmediate(T1, 0xff);
230 __ sb(T1, Address(SP));
231 __ lb(V0, Address(SP));
232 __ addiu(SP, SP, Immediate(kWordSize * 30));
233 __ jr(RA);
234 }
235
236
237 ASSEMBLER_TEST_RUN(Lb, test) {
238 typedef int (*SimpleCode)() DART_UNUSED;
239 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
240 }
241
242
243 ASSEMBLER_TEST_GENERATE(Lb_offset, assembler) {
244 __ addiu(SP, SP, Immediate(-kWordSize * 30));
245 __ LoadImmediate(T1, 0xff);
246 __ sb(T1, Address(SP, 1));
247 __ lb(V0, Address(SP, 1));
248 __ addiu(SP, SP, Immediate(kWordSize * 30));
249 __ jr(RA);
250 }
251
252
253 ASSEMBLER_TEST_RUN(Lb_offset, test) {
254 typedef int (*SimpleCode)() DART_UNUSED;
255 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
256 }
257
258
259 ASSEMBLER_TEST_GENERATE(Lbu, assembler) {
260 __ addiu(SP, SP, Immediate(-kWordSize * 30));
261 __ LoadImmediate(T1, 0xff);
262 __ sb(T1, Address(SP));
263 __ lbu(V0, Address(SP));
264 __ addiu(SP, SP, Immediate(kWordSize * 30));
265 __ jr(RA);
266 }
267
268
269 ASSEMBLER_TEST_RUN(Lbu, test) {
270 typedef int (*SimpleCode)() DART_UNUSED;
271 EXPECT_EQ(255, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
272 }
273
274
275 ASSEMBLER_TEST_GENERATE(Lh, assembler) {
276 __ addiu(SP, SP, Immediate(-kWordSize * 30));
277 __ LoadImmediate(T1, 0xffff);
278 __ sh(T1, Address(SP));
279 __ lh(V0, Address(SP));
280 __ addiu(SP, SP, Immediate(kWordSize * 30));
281 __ jr(RA);
282 }
283
284
285 ASSEMBLER_TEST_RUN(Lh, test) {
286 typedef int (*SimpleCode)() DART_UNUSED;
287 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
288 }
289
290
291 ASSEMBLER_TEST_GENERATE(Lhu, assembler) {
292 __ addiu(SP, SP, Immediate(-kWordSize * 30));
293 __ LoadImmediate(T1, 0xffff);
294 __ sh(T1, Address(SP));
295 __ lhu(V0, Address(SP));
296 __ addiu(SP, SP, Immediate(kWordSize * 30));
297 __ jr(RA);
298 }
299
300
301 ASSEMBLER_TEST_RUN(Lhu, test) {
302 typedef int (*SimpleCode)() DART_UNUSED;
303 EXPECT_EQ(65535, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
304 }
305
306
307 ASSEMBLER_TEST_GENERATE(Lw, assembler) {
308 __ addiu(SP, SP, Immediate(-kWordSize * 30));
309 __ LoadImmediate(T1, -1);
310 __ sw(T1, Address(SP));
311 __ lw(V0, Address(SP));
312 __ addiu(SP, SP, Immediate(kWordSize * 30));
313 __ jr(RA);
314 }
315
316
317 ASSEMBLER_TEST_RUN(Lw, test) {
318 typedef int (*SimpleCode)() DART_UNUSED;
319 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
320 }
321
322
323 ASSEMBLER_TEST_GENERATE(LoadHalfWordUnaligned, assembler) {
324 __ LoadHalfWordUnaligned(V0, A0, TMP);
325 __ jr(RA);
326 }
327
328
329 ASSEMBLER_TEST_RUN(LoadHalfWordUnaligned, test) {
330 EXPECT(test != NULL);
331 typedef intptr_t (*LoadHalfWordUnaligned)(intptr_t) DART_UNUSED;
332 uint8_t buffer[4] = {
333 0x89, 0xAB, 0xCD, 0xEF,
334 };
335
336 EXPECT_EQ(
337 static_cast<int16_t>(static_cast<uint16_t>(0xAB89)),
338 EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
339 reinterpret_cast<intptr_t>(&buffer[0])));
340 EXPECT_EQ(
341 static_cast<int16_t>(static_cast<uint16_t>(0xCDAB)),
342 EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
343 reinterpret_cast<intptr_t>(&buffer[1])));
344 }
345
346
347 ASSEMBLER_TEST_GENERATE(LoadHalfWordUnsignedUnaligned, assembler) {
348 __ LoadHalfWordUnsignedUnaligned(V0, A0, TMP);
349 __ jr(RA);
350 }
351
352
353 ASSEMBLER_TEST_RUN(LoadHalfWordUnsignedUnaligned, test) {
354 EXPECT(test != NULL);
355 typedef intptr_t (*LoadHalfWordUnsignedUnaligned)(intptr_t) DART_UNUSED;
356 uint8_t buffer[4] = {
357 0x89, 0xAB, 0xCD, 0xEF,
358 };
359
360 EXPECT_EQ(0xAB89, EXECUTE_TEST_CODE_INTPTR_INTPTR(
361 LoadHalfWordUnsignedUnaligned, test->entry(),
362 reinterpret_cast<intptr_t>(&buffer[0])));
363 EXPECT_EQ(0xCDAB, EXECUTE_TEST_CODE_INTPTR_INTPTR(
364 LoadHalfWordUnsignedUnaligned, test->entry(),
365 reinterpret_cast<intptr_t>(&buffer[1])));
366 }
367
368
369 ASSEMBLER_TEST_GENERATE(StoreHalfWordUnaligned, assembler) {
370 __ LoadImmediate(A1, 0xABCD);
371 __ StoreWordUnaligned(A1, A0, TMP);
372 __ mov(V0, A1);
373 __ jr(RA);
374 }
375
376
377 ASSEMBLER_TEST_RUN(StoreHalfWordUnaligned, test) {
378 EXPECT(test != NULL);
379 typedef intptr_t (*StoreHalfWordUnaligned)(intptr_t) DART_UNUSED;
380 uint8_t buffer[4] = {
381 0, 0, 0, 0,
382 };
383
384 EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
385 StoreHalfWordUnaligned, test->entry(),
386 reinterpret_cast<intptr_t>(&buffer[0])));
387 EXPECT_EQ(0xCD, buffer[0]);
388 EXPECT_EQ(0xAB, buffer[1]);
389 EXPECT_EQ(0, buffer[2]);
390
391 EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
392 StoreHalfWordUnaligned, test->entry(),
393 reinterpret_cast<intptr_t>(&buffer[1])));
394 EXPECT_EQ(0xCD, buffer[1]);
395 EXPECT_EQ(0xAB, buffer[2]);
396 EXPECT_EQ(0, buffer[3]);
397 }
398
399
400 ASSEMBLER_TEST_GENERATE(LoadWordUnaligned, assembler) {
401 __ LoadWordUnaligned(V0, A0, TMP);
402 __ jr(RA);
403 }
404
405
406 ASSEMBLER_TEST_RUN(LoadWordUnaligned, test) {
407 EXPECT(test != NULL);
408 typedef intptr_t (*LoadWordUnaligned)(intptr_t) DART_UNUSED;
409 uint8_t buffer[8] = {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0};
410
411 EXPECT_EQ(
412 static_cast<intptr_t>(0x78563412),
413 EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadWordUnaligned, test->entry(),
414 reinterpret_cast<intptr_t>(&buffer[0])));
415 EXPECT_EQ(
416 static_cast<intptr_t>(0x9A785634),
417 EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadWordUnaligned, test->entry(),
418 reinterpret_cast<intptr_t>(&buffer[1])));
419 EXPECT_EQ(
420 static_cast<intptr_t>(0xBC9A7856),
421 EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadWordUnaligned, test->entry(),
422 reinterpret_cast<intptr_t>(&buffer[2])));
423 EXPECT_EQ(
424 static_cast<intptr_t>(0xDEBC9A78),
425 EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadWordUnaligned, test->entry(),
426 reinterpret_cast<intptr_t>(&buffer[3])));
427 }
428
429
430 ASSEMBLER_TEST_GENERATE(StoreWordUnaligned, assembler) {
431 __ LoadImmediate(A1, 0x12345678);
432 __ StoreWordUnaligned(A1, A0, TMP);
433 __ mov(V0, A1);
434 __ jr(RA);
435 }
436
437
438 ASSEMBLER_TEST_RUN(StoreWordUnaligned, test) {
439 EXPECT(test != NULL);
440 typedef intptr_t (*StoreWordUnaligned)(intptr_t) DART_UNUSED;
441 uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
442
443 EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
444 StoreWordUnaligned, test->entry(),
445 reinterpret_cast<intptr_t>(&buffer[0])));
446 EXPECT_EQ(0x78, buffer[0]);
447 EXPECT_EQ(0x56, buffer[1]);
448 EXPECT_EQ(0x34, buffer[2]);
449 EXPECT_EQ(0x12, buffer[3]);
450
451 EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
452 StoreWordUnaligned, test->entry(),
453 reinterpret_cast<intptr_t>(&buffer[1])));
454 EXPECT_EQ(0x78, buffer[1]);
455 EXPECT_EQ(0x56, buffer[2]);
456 EXPECT_EQ(0x34, buffer[3]);
457 EXPECT_EQ(0x12, buffer[4]);
458
459 EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
460 StoreWordUnaligned, test->entry(),
461 reinterpret_cast<intptr_t>(&buffer[2])));
462 EXPECT_EQ(0x78, buffer[2]);
463 EXPECT_EQ(0x56, buffer[3]);
464 EXPECT_EQ(0x34, buffer[4]);
465 EXPECT_EQ(0x12, buffer[5]);
466
467 EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
468 StoreWordUnaligned, test->entry(),
469 reinterpret_cast<intptr_t>(&buffer[3])));
470 EXPECT_EQ(0x78, buffer[3]);
471 EXPECT_EQ(0x56, buffer[4]);
472 EXPECT_EQ(0x34, buffer[5]);
473 EXPECT_EQ(0x12, buffer[6]);
474 }
475
476
477 ASSEMBLER_TEST_GENERATE(Lui, assembler) {
478 __ lui(V0, Immediate(42));
479 __ jr(RA);
480 }
481
482
483 ASSEMBLER_TEST_RUN(Lui, test) {
484 typedef int (*SimpleCode)() DART_UNUSED;
485 EXPECT_EQ(42 << 16, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
486 }
487
488
489 ASSEMBLER_TEST_GENERATE(Sll, assembler) {
490 __ LoadImmediate(T1, 21);
491 __ sll(V0, T1, 1);
492 __ jr(RA);
493 }
494
495
496 ASSEMBLER_TEST_RUN(Sll, test) {
497 typedef int (*SimpleCode)() DART_UNUSED;
498 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
499 }
500
501
502 ASSEMBLER_TEST_GENERATE(Srl, assembler) {
503 __ LoadImmediate(T1, 84);
504 __ srl(V0, T1, 1);
505 __ jr(RA);
506 }
507
508
509 ASSEMBLER_TEST_RUN(Srl, test) {
510 typedef int (*SimpleCode)() DART_UNUSED;
511 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
512 }
513
514
515 ASSEMBLER_TEST_GENERATE(LShifting, assembler) {
516 __ LoadImmediate(T1, 1);
517 __ sll(T1, T1, 31);
518 __ srl(V0, T1, 31);
519 __ jr(RA);
520 }
521
522
523 ASSEMBLER_TEST_RUN(LShifting, test) {
524 typedef int (*SimpleCode)() DART_UNUSED;
525 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
526 }
527
528
529 ASSEMBLER_TEST_GENERATE(RShifting, assembler) {
530 __ LoadImmediate(T1, 1);
531 __ sll(T1, T1, 31);
532 __ sra(V0, T1, 31);
533 __ jr(RA);
534 }
535
536
537 ASSEMBLER_TEST_RUN(RShifting, test) {
538 typedef int (*SimpleCode)() DART_UNUSED;
539 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
540 }
541
542
543 ASSEMBLER_TEST_GENERATE(Sllv, assembler) {
544 __ LoadImmediate(T1, 21);
545 __ LoadImmediate(T2, 1);
546 __ sllv(V0, T1, T2);
547 __ jr(RA);
548 }
549
550
551 ASSEMBLER_TEST_RUN(Sllv, test) {
552 typedef int (*SimpleCode)() DART_UNUSED;
553 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
554 }
555
556
557 ASSEMBLER_TEST_GENERATE(Srlv, assembler) {
558 __ LoadImmediate(T1, 84);
559 __ LoadImmediate(T2, 1);
560 __ srlv(V0, T1, T2);
561 __ jr(RA);
562 }
563
564
565 ASSEMBLER_TEST_RUN(Srlv, test) {
566 typedef int (*SimpleCode)() DART_UNUSED;
567 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
568 }
569
570
571 ASSEMBLER_TEST_GENERATE(LShiftingV, assembler) {
572 __ LoadImmediate(T1, 1);
573 __ LoadImmediate(T2, 31);
574 __ sllv(T1, T1, T2);
575 __ srlv(V0, T1, T2);
576 __ jr(RA);
577 }
578
579
580 ASSEMBLER_TEST_RUN(LShiftingV, test) {
581 typedef int (*SimpleCode)() DART_UNUSED;
582 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
583 }
584
585
586 ASSEMBLER_TEST_GENERATE(RShiftingV, assembler) {
587 __ LoadImmediate(T1, 1);
588 __ LoadImmediate(T2, 31);
589 __ sllv(T1, T1, T2);
590 __ srav(V0, T1, T2);
591 __ jr(RA);
592 }
593
594
595 ASSEMBLER_TEST_RUN(RShiftingV, test) {
596 typedef int (*SimpleCode)() DART_UNUSED;
597 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
598 }
599
600
601 ASSEMBLER_TEST_GENERATE(Mult_pos, assembler) {
602 __ LoadImmediate(T1, 6);
603 __ LoadImmediate(T2, 7);
604 __ mult(T1, T2);
605 __ mflo(V0);
606 __ jr(RA);
607 }
608
609
610 ASSEMBLER_TEST_RUN(Mult_pos, test) {
611 typedef int (*SimpleCode)() DART_UNUSED;
612 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
613 }
614
615
616 ASSEMBLER_TEST_GENERATE(Mult_neg, assembler) {
617 __ LoadImmediate(T1, -6);
618 __ LoadImmediate(T2, 7);
619 __ mult(T1, T2);
620 __ mflo(V0);
621 __ jr(RA);
622 }
623
624
625 ASSEMBLER_TEST_RUN(Mult_neg, test) {
626 typedef int (*SimpleCode)() DART_UNUSED;
627 EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
628 }
629
630
631 ASSEMBLER_TEST_GENERATE(Mult_neg_hi, assembler) {
632 __ LoadImmediate(T1, -6);
633 __ LoadImmediate(T2, 7);
634 __ mult(T1, T2);
635 __ mfhi(V0);
636 __ jr(RA);
637 }
638
639
640 ASSEMBLER_TEST_RUN(Mult_neg_hi, test) {
641 typedef int (*SimpleCode)() DART_UNUSED;
642 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
643 }
644
645
646 ASSEMBLER_TEST_GENERATE(Multu_lo, assembler) {
647 __ LoadImmediate(T1, 6);
648 __ LoadImmediate(T2, 7);
649 __ multu(T1, T2);
650 __ mflo(V0);
651 __ jr(RA);
652 }
653
654
655 ASSEMBLER_TEST_RUN(Multu_lo, test) {
656 typedef int (*SimpleCode)() DART_UNUSED;
657 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
658 }
659
660
661 ASSEMBLER_TEST_GENERATE(Multu_hi, assembler) {
662 __ LoadImmediate(T1, -1);
663 __ LoadImmediate(T2, -1);
664 __ multu(T1, T2);
665 __ mfhi(V0);
666 __ jr(RA);
667 }
668
669
670 ASSEMBLER_TEST_RUN(Multu_hi, test) {
671 typedef int (*SimpleCode)() DART_UNUSED;
672 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
673 }
674
675
676 ASSEMBLER_TEST_GENERATE(Madd_neg, assembler) {
677 __ LoadImmediate(T1, -6);
678 __ LoadImmediate(T2, 7);
679 __ mult(T1, T2);
680 __ madd(T1, T2);
681 __ mflo(V0);
682 __ mfhi(V1);
683 __ jr(RA);
684 }
685
686
687 ASSEMBLER_TEST_RUN(Madd_neg, test) {
688 typedef int (*SimpleCode)() DART_UNUSED;
689 EXPECT_EQ(-84, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
690 }
691
692
693 ASSEMBLER_TEST_GENERATE(Subu, assembler) {
694 __ LoadImmediate(T1, 737);
695 __ LoadImmediate(T2, 695);
696 __ subu(V0, T1, T2);
697 __ jr(RA);
698 }
699
700
701 ASSEMBLER_TEST_RUN(Subu, test) {
702 typedef int (*SimpleCode)() DART_UNUSED;
703 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
704 }
705
706
707 ASSEMBLER_TEST_GENERATE(Or, assembler) {
708 __ LoadImmediate(T1, 34);
709 __ LoadImmediate(T2, 8);
710 __ or_(V0, T1, T2);
711 __ jr(RA);
712 }
713
714
715 ASSEMBLER_TEST_RUN(Or, test) {
716 typedef int (*SimpleCode)() DART_UNUSED;
717 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
718 }
719
720
721 ASSEMBLER_TEST_GENERATE(Nor, assembler) {
722 __ LoadImmediate(T1, -47);
723 __ LoadImmediate(T2, -60);
724 __ nor(V0, T1, T2);
725 __ jr(RA);
726 }
727
728
729 ASSEMBLER_TEST_RUN(Nor, test) {
730 typedef int (*SimpleCode)() DART_UNUSED;
731 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
732 }
733
734
735 ASSEMBLER_TEST_GENERATE(Xor, assembler) {
736 __ LoadImmediate(T1, 51);
737 __ LoadImmediate(T2, 25);
738 __ xor_(V0, T1, T2);
739 __ jr(RA);
740 }
741
742
743 ASSEMBLER_TEST_RUN(Xor, test) {
744 typedef int (*SimpleCode)() DART_UNUSED;
745 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
746 }
747
748
749 ASSEMBLER_TEST_GENERATE(Xori, assembler) {
750 __ LoadImmediate(T0, 51);
751 __ xori(V0, T0, Immediate(25));
752 __ jr(RA);
753 }
754
755
756 ASSEMBLER_TEST_RUN(Xori, test) {
757 typedef int (*SimpleCode)() DART_UNUSED;
758 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
759 }
760
761
762 ASSEMBLER_TEST_GENERATE(Slt, assembler) {
763 __ LoadImmediate(T1, -1);
764 __ LoadImmediate(T2, 0);
765 __ slt(V0, T1, T2);
766 __ jr(RA);
767 }
768
769
770 ASSEMBLER_TEST_RUN(Slt, test) {
771 typedef int (*SimpleCode)() DART_UNUSED;
772 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
773 }
774
775
776 ASSEMBLER_TEST_GENERATE(Sltu, assembler) {
777 __ LoadImmediate(T1, -1);
778 __ LoadImmediate(T2, 0);
779 __ sltu(V0, T1, T2); // 0xffffffffUL < 0 -> 0.
780 __ jr(RA);
781 }
782
783
784 ASSEMBLER_TEST_RUN(Sltu, test) {
785 typedef int (*SimpleCode)() DART_UNUSED;
786 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
787 }
788
789
790 ASSEMBLER_TEST_GENERATE(Slti, assembler) {
791 __ LoadImmediate(T1, -2);
792 __ slti(A0, T1, Immediate(-1)); // -2 < -1 -> 1.
793 __ slti(A1, T1, Immediate(0)); // -2 < 0 -> 1.
794 __ and_(V0, A0, A1);
795 __ jr(RA);
796 }
797
798
799 ASSEMBLER_TEST_RUN(Slti, test) {
800 typedef int (*SimpleCode)() DART_UNUSED;
801 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
802 }
803
804
805 ASSEMBLER_TEST_GENERATE(Sltiu, assembler) {
806 __ LoadImmediate(T1, -1);
807 __ LoadImmediate(T2, 0x10000);
808 __ sltiu(A0, T1, Immediate(-2)); // 0xffffffffUL < 0xfffffffeUL -> 0.
809 __ sltiu(A1, T1, Immediate(0)); // 0xffffffffUL < 0 -> 0.
810 __ sltiu(A2, T2, Immediate(-2)); // 0x10000UL < 0xfffffffeUL -> 1.
811 __ addiu(A2, A2, Immediate(-1));
812 __ or_(V0, A0, A1);
813 __ or_(V0, V0, A2);
814 __ jr(RA);
815 }
816
817
818 ASSEMBLER_TEST_RUN(Sltiu, test) {
819 typedef int (*SimpleCode)() DART_UNUSED;
820 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
821 }
822
823
824 ASSEMBLER_TEST_GENERATE(Movz, assembler) {
825 __ LoadImmediate(T1, 42);
826 __ LoadImmediate(T2, 23);
827 __ slt(T3, T1, T2);
828 __ movz(V0, T1, T3);
829 __ jr(RA);
830 }
831
832
833 ASSEMBLER_TEST_RUN(Movz, test) {
834 typedef int (*SimpleCode)() DART_UNUSED;
835 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
836 }
837
838
839 ASSEMBLER_TEST_GENERATE(Movn, assembler) {
840 __ LoadImmediate(T1, 42);
841 __ LoadImmediate(T2, 23);
842 __ slt(T3, T2, T1);
843 __ movn(V0, T1, T3);
844 __ jr(RA);
845 }
846
847
848 ASSEMBLER_TEST_RUN(Movn, test) {
849 typedef int (*SimpleCode)() DART_UNUSED;
850 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
851 }
852
853
854 ASSEMBLER_TEST_GENERATE(Jr_delay, assembler) {
855 __ jr(RA);
856 __ delay_slot()->ori(V0, ZR, Immediate(42));
857 }
858
859
860 ASSEMBLER_TEST_RUN(Jr_delay, test) {
861 typedef int (*SimpleCode)() DART_UNUSED;
862 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
863 }
864
865
866 ASSEMBLER_TEST_GENERATE(Beq_backward, assembler) {
867 Label l;
868
869 __ LoadImmediate(T1, 0);
870 __ LoadImmediate(T2, 1);
871 __ Bind(&l);
872 __ addiu(T1, T1, Immediate(1));
873 __ beq(T1, T2, &l);
874 __ ori(V0, T1, Immediate(0));
875 __ jr(RA);
876 }
877
878
879 ASSEMBLER_TEST_RUN(Beq_backward, test) {
880 typedef int (*SimpleCode)() DART_UNUSED;
881 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
882 }
883
884
885 ASSEMBLER_TEST_GENERATE(Beq_backward_far, assembler) {
886 Label l;
887
888 __ set_use_far_branches(true);
889
890 __ LoadImmediate(T1, 0);
891 __ LoadImmediate(T2, 1);
892 __ Bind(&l);
893 __ addiu(T1, T1, Immediate(1));
894 __ beq(T1, T2, &l);
895 __ ori(V0, T1, Immediate(0));
896 __ jr(RA);
897 }
898
899
900 ASSEMBLER_TEST_RUN(Beq_backward_far, test) {
901 typedef int (*SimpleCode)() DART_UNUSED;
902 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
903 }
904
905
906 ASSEMBLER_TEST_GENERATE(Beq_backward_delay, assembler) {
907 Label l;
908
909 __ LoadImmediate(T1, 0);
910 __ LoadImmediate(T2, 1);
911 __ Bind(&l);
912 __ addiu(T1, T1, Immediate(1));
913 __ beq(T1, T2, &l);
914 __ delay_slot()->addiu(T1, T1, Immediate(1));
915 __ ori(V0, T1, Immediate(0));
916 __ jr(RA);
917 }
918
919
920 ASSEMBLER_TEST_RUN(Beq_backward_delay, test) {
921 typedef int (*SimpleCode)() DART_UNUSED;
922 EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
923 }
924
925
926 ASSEMBLER_TEST_GENERATE(Beq_forward_taken, assembler) {
927 Label l;
928
929 __ LoadImmediate(T5, 1);
930 __ LoadImmediate(T6, 1);
931
932 __ LoadImmediate(V0, 42);
933 __ beq(T5, T6, &l);
934 __ LoadImmediate(V0, 0);
935 __ Bind(&l);
936 __ jr(RA);
937 }
938
939
940 ASSEMBLER_TEST_RUN(Beq_forward_taken, test) {
941 typedef int (*SimpleCode)() DART_UNUSED;
942 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
943 }
944
945
946 ASSEMBLER_TEST_GENERATE(Beq_forward_taken_far, assembler) {
947 Label l;
948
949 __ set_use_far_branches(true);
950
951 __ LoadImmediate(T5, 1);
952 __ LoadImmediate(T6, 1);
953
954 __ LoadImmediate(V0, 42);
955 __ beq(T5, T6, &l);
956 __ LoadImmediate(V0, 0);
957 __ Bind(&l);
958 __ jr(RA);
959 }
960
961
962 ASSEMBLER_TEST_RUN(Beq_forward_taken_far, test) {
963 typedef int (*SimpleCode)() DART_UNUSED;
964 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
965 }
966
967
968 ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken, assembler) {
969 Label l;
970
971 __ LoadImmediate(T5, 0);
972 __ LoadImmediate(T6, 1);
973
974 __ LoadImmediate(V0, 42);
975 __ beq(T5, T6, &l);
976 __ nop();
977 __ LoadImmediate(V0, 0);
978 __ Bind(&l);
979 __ jr(RA);
980 }
981
982
983 ASSEMBLER_TEST_RUN(Beq_forward_not_taken, test) {
984 typedef int (*SimpleCode)() DART_UNUSED;
985 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
986 }
987
988
989 ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken_far, assembler) {
990 Label l;
991
992 __ set_use_far_branches(true);
993
994 __ LoadImmediate(T5, 0);
995 __ LoadImmediate(T6, 1);
996
997 __ LoadImmediate(V0, 42);
998 __ beq(T5, T6, &l);
999 __ nop();
1000 __ LoadImmediate(V0, 0);
1001 __ Bind(&l);
1002 __ jr(RA);
1003 }
1004
1005
1006 ASSEMBLER_TEST_RUN(Beq_forward_not_taken_far, test) {
1007 typedef int (*SimpleCode)() DART_UNUSED;
1008 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1009 }
1010
1011
1012 ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken_far2, assembler) {
1013 Label l;
1014
1015 __ set_use_far_branches(true);
1016
1017 __ LoadImmediate(T5, 0);
1018 __ LoadImmediate(T6, 1);
1019
1020 __ LoadImmediate(V0, 42);
1021 __ beq(T5, T6, &l);
1022 __ nop();
1023 for (int i = 0; i < (1 << 15); i++) {
1024 __ nop();
1025 }
1026 __ LoadImmediate(V0, 0);
1027 __ Bind(&l);
1028 __ jr(RA);
1029 }
1030
1031
1032 ASSEMBLER_TEST_RUN(Beq_forward_not_taken_far2, test) {
1033 typedef int (*SimpleCode)() DART_UNUSED;
1034 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1035 }
1036
1037
1038 ASSEMBLER_TEST_GENERATE(Beq_forward_taken2, assembler) {
1039 Label l;
1040
1041 __ LoadImmediate(T5, 1);
1042 __ LoadImmediate(T6, 1);
1043
1044 __ LoadImmediate(V0, 42);
1045 __ beq(T5, T6, &l);
1046 __ nop();
1047 __ nop();
1048 __ LoadImmediate(V0, 0);
1049 __ Bind(&l);
1050 __ jr(RA);
1051 }
1052
1053
1054 ASSEMBLER_TEST_RUN(Beq_forward_taken2, test) {
1055 typedef int (*SimpleCode)() DART_UNUSED;
1056 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1057 }
1058
1059
1060 ASSEMBLER_TEST_GENERATE(Beq_forward_taken_far2, assembler) {
1061 Label l;
1062
1063 __ set_use_far_branches(true);
1064
1065 __ LoadImmediate(T5, 1);
1066 __ LoadImmediate(T6, 1);
1067
1068 __ LoadImmediate(V0, 42);
1069 __ beq(T5, T6, &l);
1070 __ nop();
1071 __ nop();
1072 __ LoadImmediate(V0, 0);
1073 __ Bind(&l);
1074 __ jr(RA);
1075 }
1076
1077
1078 ASSEMBLER_TEST_RUN(Beq_forward_taken_far2, test) {
1079 typedef int (*SimpleCode)() DART_UNUSED;
1080 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1081 }
1082
1083
1084 ASSEMBLER_TEST_GENERATE(Beq_forward_taken_far3, assembler) {
1085 Label l;
1086
1087 __ set_use_far_branches(true);
1088
1089 __ LoadImmediate(T5, 1);
1090 __ LoadImmediate(T6, 1);
1091
1092 __ LoadImmediate(V0, 42);
1093 __ beq(T5, T6, &l);
1094 __ nop();
1095 for (int i = 0; i < (1 << 15); i++) {
1096 __ nop();
1097 }
1098 __ nop();
1099 __ LoadImmediate(V0, 0);
1100 __ Bind(&l);
1101 __ jr(RA);
1102 }
1103
1104
1105 ASSEMBLER_TEST_RUN(Beq_forward_taken_far3, test) {
1106 typedef int (*SimpleCode)() DART_UNUSED;
1107 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1108 }
1109
1110
1111 ASSEMBLER_TEST_GENERATE(Beq_forward_taken_delay, assembler) {
1112 Label l;
1113
1114 __ LoadImmediate(T5, 1);
1115 __ LoadImmediate(T6, 1);
1116
1117 __ LoadImmediate(V0, 42);
1118 __ beq(T5, T6, &l);
1119 __ delay_slot()->ori(V0, V0, Immediate(1));
1120 __ LoadImmediate(V0, 0);
1121 __ Bind(&l);
1122 __ jr(RA);
1123 }
1124
1125
1126 ASSEMBLER_TEST_RUN(Beq_forward_taken_delay, test) {
1127 typedef int (*SimpleCode)() DART_UNUSED;
1128 EXPECT_EQ(43, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1129 }
1130
1131
1132 ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken_delay, assembler) {
1133 Label l;
1134
1135 __ LoadImmediate(T5, 0);
1136 __ LoadImmediate(T6, 1);
1137
1138 __ LoadImmediate(V0, 42);
1139 __ beq(T5, T6, &l);
1140 __ delay_slot()->ori(V0, V0, Immediate(1));
1141 __ addiu(V0, V0, Immediate(1));
1142 __ Bind(&l);
1143 __ jr(RA);
1144 }
1145
1146
1147 ASSEMBLER_TEST_RUN(Beq_forward_not_taken_delay, test) {
1148 typedef int (*SimpleCode)() DART_UNUSED;
1149 EXPECT_EQ(44, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1150 }
1151
1152
1153 ASSEMBLER_TEST_GENERATE(Beql_backward_delay, assembler) {
1154 Label l;
1155
1156 __ LoadImmediate(T5, 0);
1157 __ LoadImmediate(T6, 1);
1158 __ Bind(&l);
1159 __ addiu(T5, T5, Immediate(1));
1160 __ beql(T5, T6, &l);
1161 __ delay_slot()->addiu(T5, T5, Immediate(1));
1162 __ ori(V0, T5, Immediate(0));
1163 __ jr(RA);
1164 }
1165
1166
1167 ASSEMBLER_TEST_RUN(Beql_backward_delay, test) {
1168 typedef int (*SimpleCode)() DART_UNUSED;
1169 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1170 }
1171
1172
1173 ASSEMBLER_TEST_GENERATE(Bgez, assembler) {
1174 Label l;
1175
1176 __ LoadImmediate(T5, 3);
1177 __ Bind(&l);
1178 __ bgez(T5, &l);
1179 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1180 __ ori(V0, T5, Immediate(0));
1181 __ jr(RA);
1182 }
1183
1184
1185 ASSEMBLER_TEST_RUN(Bgez, test) {
1186 typedef int (*SimpleCode)() DART_UNUSED;
1187 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1188 }
1189
1190
1191 ASSEMBLER_TEST_GENERATE(Bgez_far, assembler) {
1192 Label l;
1193
1194 __ set_use_far_branches(true);
1195
1196 __ LoadImmediate(T5, 3);
1197 __ Bind(&l);
1198 __ bgez(T5, &l);
1199 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1200 __ ori(V0, T5, Immediate(0));
1201 __ jr(RA);
1202 }
1203
1204
1205 ASSEMBLER_TEST_RUN(Bgez_far, test) {
1206 typedef int (*SimpleCode)() DART_UNUSED;
1207 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1208 }
1209
1210
1211 ASSEMBLER_TEST_GENERATE(Bgez_far2, assembler) {
1212 Label l;
1213
1214 __ set_use_far_branches(true);
1215
1216 __ LoadImmediate(T5, 3);
1217 __ Bind(&l);
1218 for (int i = 0; i < (1 << 15); i++) {
1219 __ nop();
1220 }
1221 __ bgez(T5, &l);
1222 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1223 __ ori(V0, T5, Immediate(0));
1224 __ jr(RA);
1225 }
1226
1227
1228 ASSEMBLER_TEST_RUN(Bgez_far2, test) {
1229 typedef int (*SimpleCode)() DART_UNUSED;
1230 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1231 }
1232
1233
1234 ASSEMBLER_TEST_GENERATE(Bgez_taken_forward_far, assembler) {
1235 Label l;
1236
1237 __ set_use_far_branches(true);
1238
1239 __ LoadImmediate(T5, 1);
1240
1241 __ LoadImmediate(V0, 42);
1242 __ bgez(T5, &l);
1243 __ nop();
1244 __ nop();
1245 __ LoadImmediate(V0, 0);
1246 __ Bind(&l);
1247 __ jr(RA);
1248 }
1249
1250
1251 ASSEMBLER_TEST_RUN(Bgez_taken_forward_far, test) {
1252 typedef int (*SimpleCode)() DART_UNUSED;
1253 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1254 }
1255
1256
1257 ASSEMBLER_TEST_GENERATE(Bgez_taken_forward_far2, assembler) {
1258 Label l;
1259
1260 __ set_use_far_branches(true);
1261
1262 __ LoadImmediate(T5, 1);
1263
1264 __ LoadImmediate(V0, 42);
1265 __ bgez(T5, &l);
1266 __ nop();
1267 for (int i = 0; i < (1 << 15); i++) {
1268 __ nop();
1269 }
1270 __ LoadImmediate(V0, 0);
1271 __ Bind(&l);
1272 __ jr(RA);
1273 }
1274
1275
1276 ASSEMBLER_TEST_RUN(Bgez_taken_forward_far2, test) {
1277 typedef int (*SimpleCode)() DART_UNUSED;
1278 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1279 }
1280
1281
1282 ASSEMBLER_TEST_GENERATE(Bgez_not_taken_forward_far, assembler) {
1283 Label l;
1284
1285 __ set_use_far_branches(true);
1286
1287 __ LoadImmediate(T5, -1);
1288
1289 __ LoadImmediate(V0, 42);
1290 __ bgez(T5, &l);
1291 __ nop();
1292 __ nop();
1293 __ LoadImmediate(V0, 0);
1294 __ Bind(&l);
1295 __ jr(RA);
1296 }
1297
1298
1299 ASSEMBLER_TEST_RUN(Bgez_not_taken_forward_far, test) {
1300 typedef int (*SimpleCode)() DART_UNUSED;
1301 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1302 }
1303
1304
1305 ASSEMBLER_TEST_GENERATE(Bgez_not_taken_forward_far2, assembler) {
1306 Label l;
1307
1308 __ set_use_far_branches(true);
1309
1310 __ LoadImmediate(T5, -1);
1311
1312 __ LoadImmediate(V0, 42);
1313 __ bgez(T5, &l);
1314 __ nop();
1315 for (int i = 0; i < (1 << 15); i++) {
1316 __ nop();
1317 }
1318 __ LoadImmediate(V0, 0);
1319 __ Bind(&l);
1320 __ jr(RA);
1321 }
1322
1323
1324 ASSEMBLER_TEST_RUN(Bgez_not_taken_forward_far2, test) {
1325 typedef int (*SimpleCode)() DART_UNUSED;
1326 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1327 }
1328
1329
1330 ASSEMBLER_TEST_GENERATE(Bgezl, assembler) {
1331 Label l;
1332
1333 __ LoadImmediate(T5, 3);
1334 __ Bind(&l);
1335 __ bgezl(T5, &l);
1336 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1337 __ ori(V0, T5, Immediate(0));
1338 __ jr(RA);
1339 }
1340
1341
1342 ASSEMBLER_TEST_RUN(Bgezl, test) {
1343 typedef int (*SimpleCode)() DART_UNUSED;
1344 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1345 }
1346
1347
1348 ASSEMBLER_TEST_GENERATE(Blez, assembler) {
1349 Label l;
1350
1351 __ LoadImmediate(T5, -3);
1352 __ Bind(&l);
1353 __ blez(T5, &l);
1354 __ delay_slot()->addiu(T5, T5, Immediate(1));
1355 __ ori(V0, T5, Immediate(0));
1356 __ jr(RA);
1357 }
1358
1359
1360 ASSEMBLER_TEST_RUN(Blez, test) {
1361 typedef int (*SimpleCode)() DART_UNUSED;
1362 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1363 }
1364
1365
1366 ASSEMBLER_TEST_GENERATE(Blez_far, assembler) {
1367 Label l;
1368
1369 __ set_use_far_branches(true);
1370
1371 __ LoadImmediate(T5, -3);
1372 __ Bind(&l);
1373 __ blez(T5, &l);
1374 __ delay_slot()->addiu(T5, T5, Immediate(1));
1375 __ ori(V0, T5, Immediate(0));
1376 __ jr(RA);
1377 }
1378
1379
1380 ASSEMBLER_TEST_RUN(Blez_far, test) {
1381 typedef int (*SimpleCode)() DART_UNUSED;
1382 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1383 }
1384
1385
1386 ASSEMBLER_TEST_GENERATE(Blez_far2, assembler) {
1387 Label l;
1388
1389 __ set_use_far_branches(true);
1390
1391 __ LoadImmediate(T5, -3);
1392 __ Bind(&l);
1393 for (int i = 0; i < (1 << 15); i++) {
1394 __ nop();
1395 }
1396 __ blez(T5, &l);
1397 __ delay_slot()->addiu(T5, T5, Immediate(1));
1398 __ ori(V0, T5, Immediate(0));
1399 __ jr(RA);
1400 }
1401
1402
1403 ASSEMBLER_TEST_RUN(Blez_far2, test) {
1404 typedef int (*SimpleCode)() DART_UNUSED;
1405 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1406 }
1407
1408
1409 ASSEMBLER_TEST_GENERATE(Blez_taken_forward_far, assembler) {
1410 Label l;
1411
1412 __ set_use_far_branches(true);
1413
1414 __ LoadImmediate(T5, -1);
1415
1416 __ LoadImmediate(V0, 42);
1417 __ blez(T5, &l);
1418 __ nop();
1419 __ nop();
1420 __ LoadImmediate(V0, 0);
1421 __ Bind(&l);
1422 __ jr(RA);
1423 }
1424
1425
1426 ASSEMBLER_TEST_RUN(Blez_taken_forward_far, test) {
1427 typedef int (*SimpleCode)() DART_UNUSED;
1428 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1429 }
1430
1431
1432 ASSEMBLER_TEST_GENERATE(Blez_not_taken_forward_far, assembler) {
1433 Label l;
1434
1435 __ set_use_far_branches(true);
1436
1437 __ LoadImmediate(T5, 1);
1438
1439 __ LoadImmediate(V0, 42);
1440 __ blez(T5, &l);
1441 __ nop();
1442 __ nop();
1443 __ LoadImmediate(V0, 0);
1444 __ Bind(&l);
1445 __ jr(RA);
1446 }
1447
1448
1449 ASSEMBLER_TEST_RUN(Blez_not_taken_forward_far, test) {
1450 typedef int (*SimpleCode)() DART_UNUSED;
1451 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1452 }
1453
1454
1455 ASSEMBLER_TEST_GENERATE(Blezl, assembler) {
1456 Label l;
1457
1458 __ LoadImmediate(T5, -3);
1459 __ Bind(&l);
1460 __ blezl(T5, &l);
1461 __ delay_slot()->addiu(T5, T5, Immediate(1));
1462 __ ori(V0, T5, Immediate(0));
1463 __ jr(RA);
1464 }
1465
1466
1467 ASSEMBLER_TEST_RUN(Blezl, test) {
1468 typedef int (*SimpleCode)() DART_UNUSED;
1469 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1470 }
1471
1472
1473 ASSEMBLER_TEST_GENERATE(Bgtz, assembler) {
1474 Label l;
1475
1476 __ LoadImmediate(T5, 3);
1477 __ Bind(&l);
1478 __ bgtz(T5, &l);
1479 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1480 __ ori(V0, T5, Immediate(0));
1481 __ jr(RA);
1482 }
1483
1484
1485 ASSEMBLER_TEST_RUN(Bgtz, test) {
1486 typedef int (*SimpleCode)() DART_UNUSED;
1487 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1488 }
1489
1490
1491 ASSEMBLER_TEST_GENERATE(Bgtzl, assembler) {
1492 Label l;
1493
1494 __ LoadImmediate(T5, 3);
1495 __ Bind(&l);
1496 __ bgtzl(T5, &l);
1497 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1498 __ ori(V0, T5, Immediate(0));
1499 __ jr(RA);
1500 }
1501
1502
1503 ASSEMBLER_TEST_RUN(Bgtzl, test) {
1504 typedef int (*SimpleCode)() DART_UNUSED;
1505 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1506 }
1507
1508
1509 ASSEMBLER_TEST_GENERATE(Bltz, assembler) {
1510 Label l;
1511
1512 __ LoadImmediate(T5, -3);
1513 __ Bind(&l);
1514 __ bltz(T5, &l);
1515 __ delay_slot()->addiu(T5, T5, Immediate(1));
1516 __ ori(V0, T5, Immediate(0));
1517 __ jr(RA);
1518 }
1519
1520
1521 ASSEMBLER_TEST_RUN(Bltz, test) {
1522 typedef int (*SimpleCode)() DART_UNUSED;
1523 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1524 }
1525
1526
1527 ASSEMBLER_TEST_GENERATE(Bltzl, assembler) {
1528 Label l;
1529
1530 __ LoadImmediate(T5, -3);
1531 __ Bind(&l);
1532 __ bltzl(T5, &l);
1533 __ delay_slot()->addiu(T5, T5, Immediate(1));
1534 __ ori(V0, T5, Immediate(0));
1535 __ jr(RA);
1536 }
1537
1538
1539 ASSEMBLER_TEST_RUN(Bltzl, test) {
1540 typedef int (*SimpleCode)() DART_UNUSED;
1541 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1542 }
1543
1544
1545 ASSEMBLER_TEST_GENERATE(Bne, assembler) {
1546 Label l;
1547
1548 __ LoadImmediate(T5, 3);
1549 __ Bind(&l);
1550 __ bne(T5, R0, &l);
1551 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1552 __ ori(V0, T5, Immediate(0));
1553 __ jr(RA);
1554 }
1555
1556
1557 ASSEMBLER_TEST_RUN(Bne, test) {
1558 typedef int (*SimpleCode)() DART_UNUSED;
1559 EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1560 }
1561
1562
1563 ASSEMBLER_TEST_GENERATE(Bnel, assembler) {
1564 Label l;
1565
1566 __ LoadImmediate(T5, 3);
1567 __ Bind(&l);
1568 __ bnel(T5, R0, &l);
1569 __ delay_slot()->addiu(T5, T5, Immediate(-1));
1570 __ ori(V0, T5, Immediate(0));
1571 __ jr(RA);
1572 }
1573
1574
1575 ASSEMBLER_TEST_RUN(Bnel, test) {
1576 typedef int (*SimpleCode)() DART_UNUSED;
1577 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1578 }
1579
1580
1581 ASSEMBLER_TEST_GENERATE(Label_link1, assembler) {
1582 Label l;
1583
1584 __ bgez(ZR, &l);
1585 __ bgez(ZR, &l);
1586 __ bgez(ZR, &l);
1587
1588 __ LoadImmediate(V0, 1);
1589 __ Bind(&l);
1590 __ mov(V0, ZR);
1591 __ jr(RA);
1592 }
1593
1594
1595 ASSEMBLER_TEST_RUN(Label_link1, test) {
1596 typedef int (*SimpleCode)() DART_UNUSED;
1597 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1598 }
1599
1600
1601 ASSEMBLER_TEST_GENERATE(Label_link2, assembler) {
1602 Label l;
1603
1604 __ beq(ZR, ZR, &l);
1605 __ beq(ZR, ZR, &l);
1606 __ beq(ZR, ZR, &l);
1607
1608 __ LoadImmediate(V0, 1);
1609 __ Bind(&l);
1610 __ mov(V0, ZR);
1611 __ jr(RA);
1612 }
1613
1614
1615 ASSEMBLER_TEST_RUN(Label_link2, test) {
1616 typedef int (*SimpleCode)() DART_UNUSED;
1617 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1618 }
1619
1620
1621 ASSEMBLER_TEST_GENERATE(Jalr_delay, assembler) {
1622 __ mov(T2, RA);
1623 __ jalr(T2, RA);
1624 __ delay_slot()->ori(V0, ZR, Immediate(42));
1625 }
1626
1627
1628 ASSEMBLER_TEST_RUN(Jalr_delay, test) {
1629 typedef int (*SimpleCode)() DART_UNUSED;
1630 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1631 }
1632
1633
1634 ASSEMBLER_TEST_GENERATE(AddOverflow_detect, assembler) {
1635 Register left = T0;
1636 Register right = T1;
1637 Register result = T2;
1638 Register overflow = T3;
1639 Register scratch = T4;
1640 Label error, done;
1641
1642 __ LoadImmediate(V0, 1); // Success value.
1643
1644 __ LoadImmediate(left, 0x7fffffff);
1645 __ LoadImmediate(right, 1);
1646 __ AdduDetectOverflow(result, left, right, overflow);
1647 __ bgez(overflow, &error); // INT_MAX + 1 overflows.
1648
1649 __ LoadImmediate(left, 0x7fffffff);
1650 __ AdduDetectOverflow(result, left, left, overflow);
1651 __ bgez(overflow, &error); // INT_MAX + INT_MAX overflows.
1652
1653 __ LoadImmediate(left, 0x7fffffff);
1654 __ LoadImmediate(right, -1);
1655 __ AdduDetectOverflow(result, left, right, overflow);
1656 __ bltz(overflow, &error); // INT_MAX - 1 does not overflow.
1657
1658 __ LoadImmediate(left, -1);
1659 __ LoadImmediate(right, 1);
1660 __ AdduDetectOverflow(result, left, right, overflow);
1661 __ bltz(overflow, &error); // -1 + 1 does not overflow.
1662
1663 __ LoadImmediate(left, 123456);
1664 __ LoadImmediate(right, 654321);
1665 __ AdduDetectOverflow(result, left, right, overflow);
1666 __ bltz(overflow, &error); // 123456 + 654321 does not overflow.
1667
1668 __ LoadImmediate(left, 0x80000000);
1669 __ LoadImmediate(right, -1);
1670 __ AdduDetectOverflow(result, left, right, overflow);
1671 __ bgez(overflow, &error); // INT_MIN - 1 overflows.
1672
1673 // result has 0x7fffffff.
1674 __ AdduDetectOverflow(result, result, result, overflow, scratch);
1675 __ bgez(overflow, &error); // INT_MAX + INT_MAX overflows.
1676
1677 __ LoadImmediate(left, 0x80000000);
1678 __ LoadImmediate(right, 0x80000000);
1679 __ AdduDetectOverflow(result, left, right, overflow);
1680 __ bgez(overflow, &error); // INT_MIN + INT_MIN overflows.
1681
1682 __ LoadImmediate(left, -123456);
1683 __ LoadImmediate(right, -654321);
1684 __ AdduDetectOverflow(result, left, right, overflow);
1685 __ bltz(overflow, &error); // -123456 + -654321 does not overflow.
1686
1687 __ b(&done);
1688 __ Bind(&error);
1689 __ mov(V0, ZR);
1690 __ Bind(&done);
1691 __ Ret();
1692 }
1693
1694
1695 ASSEMBLER_TEST_RUN(AddOverflow_detect, test) {
1696 typedef int (*SimpleCode)() DART_UNUSED;
1697 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1698 }
1699
1700
1701 ASSEMBLER_TEST_GENERATE(SubOverflow_detect, assembler) {
1702 Register left = T0;
1703 Register right = T1;
1704 Register result = T2;
1705 Register overflow = T3;
1706 Label error, done;
1707
1708 __ LoadImmediate(V0, 1); // Success value.
1709
1710 __ LoadImmediate(left, 0x80000000);
1711 __ LoadImmediate(right, 1);
1712 __ SubuDetectOverflow(result, left, right, overflow);
1713 __ bgez(overflow, &error); // INT_MIN - 1 overflows.
1714
1715 __ LoadImmediate(left, 0x7fffffff);
1716 __ LoadImmediate(right, 0x8000000);
1717 __ SubuDetectOverflow(result, left, left, overflow);
1718 __ bltz(overflow, &error); // INT_MIN - INT_MAX does not overflow.
1719
1720 __ LoadImmediate(left, 0x80000000);
1721 __ LoadImmediate(right, 0x80000000);
1722 __ SubuDetectOverflow(result, left, right, overflow);
1723 __ bltz(overflow, &error); // INT_MIN - INT_MIN does not overflow.
1724
1725 __ LoadImmediate(left, 0x7fffffff);
1726 __ LoadImmediate(right, 0x80000000);
1727 __ SubuDetectOverflow(result, left, right, overflow);
1728 __ bgez(overflow, &error); // INT_MAX - INT_MIN overflows.
1729
1730 __ LoadImmediate(left, 1);
1731 __ LoadImmediate(right, -1);
1732 __ SubuDetectOverflow(result, left, right, overflow);
1733 __ bltz(overflow, &error); // 1 - -1 does not overflow.
1734
1735 __ b(&done);
1736 __ Bind(&error);
1737 __ mov(V0, ZR);
1738 __ Bind(&done);
1739 __ Ret();
1740 }
1741
1742
1743 ASSEMBLER_TEST_RUN(SubOverflow_detect, test) {
1744 typedef int (*SimpleCode)() DART_UNUSED;
1745 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1746 }
1747
1748
1749 ASSEMBLER_TEST_GENERATE(Mtc1Mfc1, assembler) {
1750 __ mtc1(ZR, F0);
1751 __ mtc1(ZR, F1);
1752 __ mfc1(V0, F0);
1753 __ mfc1(V1, F1);
1754 __ Ret();
1755 }
1756
1757
1758 ASSEMBLER_TEST_RUN(Mtc1Mfc1, test) {
1759 typedef int (*SimpleCode)() DART_UNUSED;
1760 EXPECT(test != NULL);
1761 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1762 }
1763
1764
1765 ASSEMBLER_TEST_GENERATE(Addd, assembler) {
1766 __ LoadImmediate(D0, 1.0);
1767 __ LoadImmediate(D1, 2.0);
1768 __ addd(D0, D0, D1);
1769 __ Ret();
1770 }
1771
1772
1773 ASSEMBLER_TEST_RUN(Addd, test) {
1774 typedef double (*SimpleCode)() DART_UNUSED;
1775 EXPECT(test != NULL);
1776 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1777 EXPECT_FLOAT_EQ(3.0, res, 0.001);
1778 }
1779
1780
1781 ASSEMBLER_TEST_GENERATE(Movd, assembler) {
1782 __ LoadImmediate(D1, 1.0);
1783 __ movd(D0, D1);
1784 __ Ret();
1785 }
1786
1787
1788 ASSEMBLER_TEST_RUN(Movd, test) {
1789 typedef double (*SimpleCode)() DART_UNUSED;
1790 EXPECT(test != NULL);
1791 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1792 EXPECT_FLOAT_EQ(1.0, res, 0.001);
1793 }
1794
1795
1796 ASSEMBLER_TEST_GENERATE(Negd, assembler) {
1797 __ LoadImmediate(D1, 1.0);
1798 __ negd(D0, D1);
1799 __ Ret();
1800 }
1801
1802
1803 ASSEMBLER_TEST_RUN(Negd, test) {
1804 typedef double (*SimpleCode)() DART_UNUSED;
1805 EXPECT(test != NULL);
1806 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1807 EXPECT_FLOAT_EQ(-1.0, res, 0.001);
1808 }
1809
1810
1811 ASSEMBLER_TEST_GENERATE(Sdc1Ldc1, assembler) {
1812 __ mov(T0, SP);
1813 __ AddImmediate(SP, -3 * kWordSize);
1814 __ AndImmediate(SP, SP, ~(8 - 1)); // Align SP by 8 bytes.
1815 __ LoadImmediate(D1, 1.0);
1816 __ sdc1(D1, Address(SP));
1817 __ ldc1(D0, Address(SP));
1818 __ mov(SP, T0);
1819 __ Ret();
1820 }
1821
1822
1823 ASSEMBLER_TEST_RUN(Sdc1Ldc1, test) {
1824 typedef double (*SimpleCode)() DART_UNUSED;
1825 EXPECT(test != NULL);
1826 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1827 EXPECT_FLOAT_EQ(1.0, res, 0.001);
1828 }
1829
1830
1831 ASSEMBLER_TEST_GENERATE(Addd_NaN, assembler) {
1832 __ LoadImmediate(D0, 1.0);
1833 // Double non-signaling NaN is 0x7FF8000000000000.
1834 __ LoadImmediate(T0, 0x7FF80000);
1835 __ mtc1(ZR, F2); // Load upper bits of NaN.
1836 __ mtc1(T0, F3); // Load lower bits of NaN.
1837 __ addd(D0, D0, D1);
1838 __ Ret();
1839 }
1840
1841
1842 ASSEMBLER_TEST_RUN(Addd_NaN, test) {
1843 typedef double (*SimpleCode)() DART_UNUSED;
1844 EXPECT(test != NULL);
1845 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1846 EXPECT_EQ(isnan(res), true);
1847 }
1848
1849
1850 ASSEMBLER_TEST_GENERATE(Addd_Inf, assembler) {
1851 __ LoadImmediate(D0, 1.0);
1852 __ LoadImmediate(T0, 0x7FF00000); // +inf
1853 __ mtc1(ZR, F2);
1854 __ mtc1(T0, F3);
1855 __ addd(D0, D0, D1);
1856 __ Ret();
1857 }
1858
1859
1860 ASSEMBLER_TEST_RUN(Addd_Inf, test) {
1861 typedef double (*SimpleCode)() DART_UNUSED;
1862 EXPECT(test != NULL);
1863 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1864 EXPECT_EQ(isfinite(res), false);
1865 }
1866
1867
1868 ASSEMBLER_TEST_GENERATE(Subd, assembler) {
1869 __ LoadImmediate(D0, 2.5);
1870 __ LoadImmediate(D1, 1.5);
1871 __ subd(D0, D0, D1);
1872 __ Ret();
1873 }
1874
1875
1876 ASSEMBLER_TEST_RUN(Subd, test) {
1877 typedef double (*SimpleCode)() DART_UNUSED;
1878 EXPECT(test != NULL);
1879 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1880 EXPECT_FLOAT_EQ(1.0, res, 0.001);
1881 }
1882
1883
1884 ASSEMBLER_TEST_GENERATE(Muld, assembler) {
1885 __ LoadImmediate(D0, 6.0);
1886 __ LoadImmediate(D1, 7.0);
1887 __ muld(D0, D0, D1);
1888 __ Ret();
1889 }
1890
1891
1892 ASSEMBLER_TEST_RUN(Muld, test) {
1893 typedef double (*SimpleCode)() DART_UNUSED;
1894 EXPECT(test != NULL);
1895 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1896 EXPECT_FLOAT_EQ(42.0, res, 0.001);
1897 }
1898
1899
1900 ASSEMBLER_TEST_GENERATE(Divd, assembler) {
1901 __ LoadImmediate(D0, 42.0);
1902 __ LoadImmediate(D1, 7.0);
1903 __ divd(D0, D0, D1);
1904 __ Ret();
1905 }
1906
1907
1908 ASSEMBLER_TEST_RUN(Divd, test) {
1909 typedef double (*SimpleCode)() DART_UNUSED;
1910 EXPECT(test != NULL);
1911 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1912 EXPECT_FLOAT_EQ(6.0, res, 0.001);
1913 }
1914
1915
1916 ASSEMBLER_TEST_GENERATE(Sqrtd, assembler) {
1917 __ LoadImmediate(D1, 36.0);
1918 __ sqrtd(D0, D1);
1919 __ Ret();
1920 }
1921
1922
1923 ASSEMBLER_TEST_RUN(Sqrtd, test) {
1924 typedef double (*SimpleCode)() DART_UNUSED;
1925 EXPECT(test != NULL);
1926 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1927 EXPECT_FLOAT_EQ(6.0, res, 0.001);
1928 }
1929
1930
1931 ASSEMBLER_TEST_GENERATE(Cop1CUN, assembler) {
1932 Label is_true;
1933
1934 __ LoadImmediate(D0, 42.0);
1935 __ LoadImmediate(T0, 0x7FF80000);
1936 __ mtc1(ZR, F2);
1937 __ mtc1(T0, F3);
1938 __ LoadImmediate(V0, 42);
1939 __ cund(D0, D1);
1940 __ bc1t(&is_true);
1941 __ mov(V0, ZR);
1942 __ Bind(&is_true);
1943 __ Ret();
1944 }
1945
1946
1947 ASSEMBLER_TEST_RUN(Cop1CUN, test) {
1948 typedef int (*SimpleCode)() DART_UNUSED;
1949 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1950 }
1951
1952
1953 ASSEMBLER_TEST_GENERATE(Cop1CUN_not_taken, assembler) {
1954 Label is_true;
1955
1956 __ LoadImmediate(D0, 42.0);
1957 __ LoadImmediate(D1, 42.0);
1958 __ LoadImmediate(V0, 42);
1959 __ cund(D0, D1);
1960 __ bc1t(&is_true);
1961 __ mov(V0, ZR);
1962 __ Bind(&is_true);
1963 __ Ret();
1964 }
1965
1966
1967 ASSEMBLER_TEST_RUN(Cop1CUN_not_taken, test) {
1968 typedef int (*SimpleCode)() DART_UNUSED;
1969 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1970 }
1971
1972
1973 ASSEMBLER_TEST_GENERATE(Cop1CEq, assembler) {
1974 Label is_true;
1975
1976 __ LoadImmediate(D0, 42.5);
1977 __ LoadImmediate(D1, 42.5);
1978 __ LoadImmediate(V0, 42);
1979 __ ceqd(D0, D1);
1980 __ bc1t(&is_true);
1981 __ mov(V0, ZR);
1982 __ Bind(&is_true);
1983 __ Ret();
1984 }
1985
1986
1987 ASSEMBLER_TEST_RUN(Cop1CEq, test) {
1988 typedef int (*SimpleCode)() DART_UNUSED;
1989 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1990 }
1991
1992
1993 ASSEMBLER_TEST_GENERATE(Cop1CEq_not_taken, assembler) {
1994 Label is_true;
1995
1996 __ LoadImmediate(D0, 42.0);
1997 __ LoadImmediate(D1, 42.5);
1998 __ LoadImmediate(V0, 42);
1999 __ ceqd(D0, D1);
2000 __ bc1t(&is_true);
2001 __ mov(V0, ZR);
2002 __ Bind(&is_true);
2003 __ Ret();
2004 }
2005
2006
2007 ASSEMBLER_TEST_RUN(Cop1CEq_not_taken, test) {
2008 typedef int (*SimpleCode)() DART_UNUSED;
2009 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2010 }
2011
2012
2013 ASSEMBLER_TEST_GENERATE(Cop1CEq_false, assembler) {
2014 Label is_true;
2015
2016 __ LoadImmediate(D0, 42.0);
2017 __ LoadImmediate(D1, 42.5);
2018 __ LoadImmediate(V0, 42);
2019 __ ceqd(D0, D1);
2020 __ bc1f(&is_true);
2021 __ mov(V0, ZR);
2022 __ Bind(&is_true);
2023 __ Ret();
2024 }
2025
2026
2027 ASSEMBLER_TEST_RUN(Cop1CEq_false, test) {
2028 typedef int (*SimpleCode)() DART_UNUSED;
2029 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2030 }
2031
2032
2033 ASSEMBLER_TEST_GENERATE(Cop1CEq_false_not_taken, assembler) {
2034 Label is_true;
2035
2036 __ LoadImmediate(D0, 42.5);
2037 __ LoadImmediate(D1, 42.5);
2038 __ LoadImmediate(V0, 42);
2039 __ ceqd(D0, D1);
2040 __ bc1f(&is_true);
2041 __ mov(V0, ZR);
2042 __ Bind(&is_true);
2043 __ Ret();
2044 }
2045
2046
2047 ASSEMBLER_TEST_RUN(Cop1CEq_false_not_taken, test) {
2048 typedef int (*SimpleCode)() DART_UNUSED;
2049 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2050 }
2051
2052
2053 ASSEMBLER_TEST_GENERATE(Cop1COLT, assembler) {
2054 Label is_true;
2055
2056 __ LoadImmediate(D0, 42.0);
2057 __ LoadImmediate(D1, 42.5);
2058 __ LoadImmediate(V0, 42);
2059 __ coltd(D0, D1);
2060 __ bc1t(&is_true);
2061 __ mov(V0, ZR);
2062 __ Bind(&is_true);
2063 __ Ret();
2064 }
2065
2066
2067 ASSEMBLER_TEST_RUN(Cop1COLT, test) {
2068 typedef int (*SimpleCode)() DART_UNUSED;
2069 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2070 }
2071
2072
2073 ASSEMBLER_TEST_GENERATE(Cop1COLT_not_taken, assembler) {
2074 Label is_true;
2075
2076 __ LoadImmediate(D0, 42.5);
2077 __ LoadImmediate(D1, 42.0);
2078 __ LoadImmediate(V0, 42);
2079 __ coltd(D0, D1);
2080 __ bc1t(&is_true);
2081 __ mov(V0, ZR);
2082 __ Bind(&is_true);
2083 __ Ret();
2084 }
2085
2086
2087 ASSEMBLER_TEST_RUN(Cop1COLT_not_taken, test) {
2088 typedef int (*SimpleCode)() DART_UNUSED;
2089 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2090 }
2091
2092
2093 ASSEMBLER_TEST_GENERATE(Cop1COLE, assembler) {
2094 Label is_true;
2095
2096 __ LoadImmediate(D0, 42.0);
2097 __ LoadImmediate(D1, 42.0);
2098 __ LoadImmediate(V0, 42);
2099 __ coled(D0, D1);
2100 __ bc1t(&is_true);
2101 __ mov(V0, ZR);
2102 __ Bind(&is_true);
2103 __ Ret();
2104 }
2105
2106
2107 ASSEMBLER_TEST_RUN(Cop1COLE, test) {
2108 typedef int (*SimpleCode)() DART_UNUSED;
2109 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2110 }
2111
2112
2113 ASSEMBLER_TEST_GENERATE(Cop1COLE_not_taken, assembler) {
2114 Label is_true;
2115
2116 __ LoadImmediate(D0, 42.5);
2117 __ LoadImmediate(D1, 42.0);
2118 __ LoadImmediate(V0, 42);
2119 __ coled(D0, D1);
2120 __ bc1t(&is_true);
2121 __ mov(V0, ZR);
2122 __ Bind(&is_true);
2123 __ Ret();
2124 }
2125
2126
2127 ASSEMBLER_TEST_RUN(Cop1COLE_not_taken, test) {
2128 typedef int (*SimpleCode)() DART_UNUSED;
2129 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2130 }
2131
2132
2133 ASSEMBLER_TEST_GENERATE(Cop1TruncWD, assembler) {
2134 __ LoadImmediate(D1, 42.9);
2135 __ truncwd(F0, D1);
2136 __ mfc1(V0, F0);
2137 __ Ret();
2138 }
2139
2140
2141 ASSEMBLER_TEST_RUN(Cop1TruncWD, test) {
2142 typedef int (*SimpleCode)() DART_UNUSED;
2143 EXPECT(test != NULL);
2144 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2145 }
2146
2147
2148 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_neg, assembler) {
2149 __ LoadImmediate(D1, -42.9);
2150 __ truncwd(F0, D1);
2151 __ mfc1(V0, F0);
2152 __ Ret();
2153 }
2154
2155
2156 ASSEMBLER_TEST_RUN(Cop1TruncWD_neg, test) {
2157 typedef int (*SimpleCode)() DART_UNUSED;
2158 EXPECT(test != NULL);
2159 EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2160 }
2161
2162
2163 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_NaN, assembler) {
2164 // Double non-signaling NaN is 0x7FF8000000000000.
2165 __ LoadImmediate(T0, 0x7FF80000);
2166 __ mtc1(ZR, F2); // Load upper bits of NaN.
2167 __ mtc1(T0, F3); // Load lower bits of NaN.
2168 __ truncwd(F0, D1);
2169 __ mfc1(V0, F0);
2170 __ Ret();
2171 }
2172
2173
2174 ASSEMBLER_TEST_RUN(Cop1TruncWD_NaN, test) {
2175 typedef int (*SimpleCode)() DART_UNUSED;
2176 EXPECT(test != NULL);
2177 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2178 }
2179
2180
2181 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Inf, assembler) {
2182 __ LoadImmediate(T0, 0x7FF00000); // +inf
2183 __ mtc1(ZR, F2);
2184 __ mtc1(T0, F3);
2185 __ truncwd(F0, D1);
2186 __ mfc1(V0, F0);
2187 __ Ret();
2188 }
2189
2190
2191 ASSEMBLER_TEST_RUN(Cop1TruncWD_Inf, test) {
2192 typedef int (*SimpleCode)() DART_UNUSED;
2193 EXPECT(test != NULL);
2194 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2195 }
2196
2197
2198 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Overflow, assembler) {
2199 __ LoadImmediate(D1, 2.0 * kMaxInt32);
2200 __ truncwd(F0, D1);
2201 __ mfc1(V0, F0);
2202 __ Ret();
2203 }
2204
2205
2206 ASSEMBLER_TEST_RUN(Cop1TruncWD_Overflow, test) {
2207 typedef int (*SimpleCode)() DART_UNUSED;
2208 EXPECT(test != NULL);
2209 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2210 }
2211
2212
2213 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Underflow, assembler) {
2214 __ LoadImmediate(D1, 2.0 * kMinInt32);
2215 __ truncwd(F0, D1);
2216 __ mfc1(V0, F0);
2217 __ Ret();
2218 }
2219
2220
2221 ASSEMBLER_TEST_RUN(Cop1TruncWD_Underflow, test) {
2222 typedef int (*SimpleCode)() DART_UNUSED;
2223 EXPECT(test != NULL);
2224 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2225 }
2226
2227
2228 ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) {
2229 __ LoadImmediate(T0, 42);
2230 __ mtc1(T0, F2);
2231 __ cvtdw(D0, F2);
2232 __ Ret();
2233 }
2234
2235
2236 ASSEMBLER_TEST_RUN(Cop1CvtDW, test) {
2237 typedef double (*SimpleCode)() DART_UNUSED;
2238 EXPECT(test != NULL);
2239 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2240 EXPECT_FLOAT_EQ(42.0, res, 0.001);
2241 }
2242
2243
2244 ASSEMBLER_TEST_GENERATE(Cop1CvtDW_neg, assembler) {
2245 __ LoadImmediate(T0, -42);
2246 __ mtc1(T0, F2);
2247 __ cvtdw(D0, F2);
2248 __ Ret();
2249 }
2250
2251
2252 ASSEMBLER_TEST_RUN(Cop1CvtDW_neg, test) {
2253 typedef double (*SimpleCode)() DART_UNUSED;
2254 EXPECT(test != NULL);
2255 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2256 EXPECT_FLOAT_EQ(-42.0, res, 0.001);
2257 }
2258
2259
2260 ASSEMBLER_TEST_GENERATE(Cop1CvtSD, assembler) {
2261 __ LoadImmediate(D2, -42.42);
2262 __ cvtsd(F2, D2);
2263 __ cvtds(D0, F2);
2264 __ Ret();
2265 }
2266
2267
2268 ASSEMBLER_TEST_RUN(Cop1CvtSD, test) {
2269 typedef double (*SimpleCode)() DART_UNUSED;
2270 EXPECT(test != NULL);
2271 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2272 EXPECT_FLOAT_EQ(-42.42, res, 0.001);
2273 }
2274
2275
2276 // Called from assembler_test.cc.
2277 // RA: return address.
2278 // A0: value.
2279 // A1: growable array.
2280 // A2: current thread.
2281 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
2282 __ addiu(SP, SP, Immediate(-3 * kWordSize));
2283 __ sw(CODE_REG, Address(SP, 2 * kWordSize));
2284 __ sw(THR, Address(SP, 1 * kWordSize));
2285 __ sw(RA, Address(SP, 0 * kWordSize));
2286 __ mov(THR, A2);
2287 __ StoreIntoObject(A1, FieldAddress(A1, GrowableObjectArray::data_offset()),
2288 A0);
2289 __ lw(RA, Address(SP, 0 * kWordSize));
2290 __ lw(THR, Address(SP, 1 * kWordSize));
2291 __ lw(CODE_REG, Address(SP, 2 * kWordSize));
2292 __ addiu(SP, SP, Immediate(3 * kWordSize));
2293 __ Ret();
2294 }
2295
2296
2297 ASSEMBLER_TEST_GENERATE(Semaphore, assembler) {
2298 __ EnterFrame();
2299 __ LoadImmediate(T0, 40);
2300 __ LoadImmediate(T1, 42);
2301 __ Push(T0);
2302 Label retry;
2303 __ Bind(&retry);
2304 __ ll(T0, Address(SP));
2305 __ mov(T2, T1);
2306 __ sc(T2, Address(SP)); // T1 == 1, success
2307 __ LoadImmediate(T3, 1);
2308 __ bne(T2, T3, &retry); // NE if context switch occurred between ll and sc
2309 __ Pop(V0); // 42
2310 __ LeaveFrameAndReturn();
2311 }
2312
2313
2314 ASSEMBLER_TEST_RUN(Semaphore, test) {
2315 EXPECT(test != NULL);
2316 typedef int (*Semaphore)() DART_UNUSED;
2317 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry()));
2318 }
2319
2320
2321 } // namespace dart
2322
2323 #endif // defined TARGET_ARCH_MIPS
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