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1 // Copyright (c) 2011 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2011 The Chromium Authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "courgette/encoded_program.h" | 5 #include "courgette/encoded_program.h" |
6 | 6 |
7 #include <stddef.h> | 7 #include <stddef.h> |
8 #include <stdint.h> | 8 #include <stdint.h> |
9 | 9 |
10 #include <algorithm> | 10 #include <algorithm> |
11 #include <map> | 11 #include <map> |
12 #include <string> | 12 #include <string> |
13 #include <utility> | 13 #include <utility> |
14 #include <vector> | 14 #include <vector> |
15 | 15 |
16 #include "base/environment.h" | 16 #include "base/environment.h" |
17 #include "base/logging.h" | 17 #include "base/logging.h" |
18 #include "base/numerics/safe_conversions.h" | 18 #include "base/numerics/safe_conversions.h" |
19 #include "base/numerics/safe_math.h" | 19 #include "base/numerics/safe_math.h" |
20 #include "base/strings/string_number_conversions.h" | 20 #include "base/strings/string_number_conversions.h" |
21 #include "base/strings/string_util.h" | 21 #include "base/strings/string_util.h" |
22 #include "courgette/courgette.h" | |
23 #include "courgette/disassembler_elf_32_arm.h" | 22 #include "courgette/disassembler_elf_32_arm.h" |
| 23 #include "courgette/label_manager.h" |
24 #include "courgette/streams.h" | 24 #include "courgette/streams.h" |
25 | 25 |
26 namespace courgette { | 26 namespace courgette { |
27 | 27 |
28 namespace { | 28 namespace { |
29 | 29 |
30 // Serializes a vector of integral values using Varint32 coding. | 30 // Serializes a vector of integral values using Varint32 coding. |
31 template<typename V> | 31 template<typename V> |
32 CheckBool WriteVector(const V& items, SinkStream* buffer) { | 32 CheckBool WriteVector(const V& items, SinkStream* buffer) { |
33 size_t count = items.size(); | 33 size_t count = items.size(); |
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363 // 'false' for out-of-bounds index error. | 363 // 'false' for out-of-bounds index error. |
364 template<typename V, typename T> | 364 template<typename V, typename T> |
365 bool VectorAt(const V& v, size_t index, T* output) { | 365 bool VectorAt(const V& v, size_t index, T* output) { |
366 if (index >= v.size()) | 366 if (index >= v.size()) |
367 return false; | 367 return false; |
368 *output = v[index]; | 368 *output = v[index]; |
369 return true; | 369 return true; |
370 } | 370 } |
371 | 371 |
372 CheckBool EncodedProgram::EvaluateRel32ARM(OP op, | 372 CheckBool EncodedProgram::EvaluateRel32ARM(OP op, |
373 size_t& ix_rel32_ix, | 373 size_t* ix_rel32_ix, |
374 RVA& current_rva, | 374 RVA* current_rva, |
375 SinkStream* output) { | 375 SinkStream* output) { |
376 switch (op & 0x0000F000) { | 376 switch (op & 0x0000F000) { |
377 case REL32ARM8: { | 377 case REL32ARM8: { |
378 uint32_t index; | 378 uint32_t index; |
379 if (!VectorAt(rel32_ix_, ix_rel32_ix, &index)) | 379 if (!VectorAt(rel32_ix_, *ix_rel32_ix, &index)) |
380 return false; | 380 return false; |
381 ++ix_rel32_ix; | 381 ++(*ix_rel32_ix); |
382 RVA rva; | 382 RVA rva; |
383 if (!VectorAt(rel32_rva_, index, &rva)) | 383 if (!VectorAt(rel32_rva_, index, &rva)) |
384 return false; | 384 return false; |
385 uint32_t decompressed_op; | 385 uint32_t decompressed_op; |
386 if (!DisassemblerElf32ARM::Decompress( | 386 if (!DisassemblerElf32ARM::Decompress( |
387 ARM_OFF8, static_cast<uint16_t>(op), | 387 ARM_OFF8, static_cast<uint16_t>(op), |
388 static_cast<uint32_t>(rva - current_rva), &decompressed_op)) { | 388 static_cast<uint32_t>(rva - *current_rva), &decompressed_op)) { |
389 return false; | 389 return false; |
390 } | 390 } |
391 uint16_t op16 = static_cast<uint16_t>(decompressed_op); | 391 uint16_t op16 = static_cast<uint16_t>(decompressed_op); |
392 if (!output->Write(&op16, 2)) | 392 if (!output->Write(&op16, 2)) |
393 return false; | 393 return false; |
394 current_rva += 2; | 394 *current_rva += 2; |
395 break; | 395 break; |
396 } | 396 } |
397 case REL32ARM11: { | 397 case REL32ARM11: { |
398 uint32_t index; | 398 uint32_t index; |
399 if (!VectorAt(rel32_ix_, ix_rel32_ix, &index)) | 399 if (!VectorAt(rel32_ix_, *ix_rel32_ix, &index)) |
400 return false; | 400 return false; |
401 ++ix_rel32_ix; | 401 ++(*ix_rel32_ix); |
402 RVA rva; | 402 RVA rva; |
403 if (!VectorAt(rel32_rva_, index, &rva)) | 403 if (!VectorAt(rel32_rva_, index, &rva)) |
404 return false; | 404 return false; |
405 uint32_t decompressed_op; | 405 uint32_t decompressed_op; |
406 if (!DisassemblerElf32ARM::Decompress(ARM_OFF11, (uint16_t)op, | 406 if (!DisassemblerElf32ARM::Decompress(ARM_OFF11, (uint16_t)op, |
407 (uint32_t)(rva - current_rva), | 407 (uint32_t)(rva - *current_rva), |
408 &decompressed_op)) { | 408 &decompressed_op)) { |
409 return false; | 409 return false; |
410 } | 410 } |
411 uint16_t op16 = static_cast<uint16_t>(decompressed_op); | 411 uint16_t op16 = static_cast<uint16_t>(decompressed_op); |
412 if (!output->Write(&op16, 2)) | 412 if (!output->Write(&op16, 2)) |
413 return false; | 413 return false; |
414 current_rva += 2; | 414 *current_rva += 2; |
415 break; | 415 break; |
416 } | 416 } |
417 case REL32ARM24: { | 417 case REL32ARM24: { |
418 uint32_t index; | 418 uint32_t index; |
419 if (!VectorAt(rel32_ix_, ix_rel32_ix, &index)) | 419 if (!VectorAt(rel32_ix_, *ix_rel32_ix, &index)) |
420 return false; | 420 return false; |
421 ++ix_rel32_ix; | 421 ++(*ix_rel32_ix); |
422 RVA rva; | 422 RVA rva; |
423 if (!VectorAt(rel32_rva_, index, &rva)) | 423 if (!VectorAt(rel32_rva_, index, &rva)) |
424 return false; | 424 return false; |
425 uint32_t decompressed_op; | 425 uint32_t decompressed_op; |
426 if (!DisassemblerElf32ARM::Decompress(ARM_OFF24, (uint16_t)op, | 426 if (!DisassemblerElf32ARM::Decompress(ARM_OFF24, (uint16_t)op, |
427 (uint32_t)(rva - current_rva), | 427 (uint32_t)(rva - *current_rva), |
428 &decompressed_op)) { | 428 &decompressed_op)) { |
429 return false; | 429 return false; |
430 } | 430 } |
431 if (!output->Write(&decompressed_op, 4)) | 431 if (!output->Write(&decompressed_op, 4)) |
432 return false; | 432 return false; |
433 current_rva += 4; | 433 *current_rva += 4; |
434 break; | 434 break; |
435 } | 435 } |
436 case REL32ARM25: { | 436 case REL32ARM25: { |
437 uint32_t index; | 437 uint32_t index; |
438 if (!VectorAt(rel32_ix_, ix_rel32_ix, &index)) | 438 if (!VectorAt(rel32_ix_, *ix_rel32_ix, &index)) |
439 return false; | 439 return false; |
440 ++ix_rel32_ix; | 440 ++(*ix_rel32_ix); |
441 RVA rva; | 441 RVA rva; |
442 if (!VectorAt(rel32_rva_, index, &rva)) | 442 if (!VectorAt(rel32_rva_, index, &rva)) |
443 return false; | 443 return false; |
444 uint32_t decompressed_op; | 444 uint32_t decompressed_op; |
445 if (!DisassemblerElf32ARM::Decompress(ARM_OFF25, (uint16_t)op, | 445 if (!DisassemblerElf32ARM::Decompress(ARM_OFF25, (uint16_t)op, |
446 (uint32_t)(rva - current_rva), | 446 (uint32_t)(rva - *current_rva), |
447 &decompressed_op)) { | 447 &decompressed_op)) { |
448 return false; | 448 return false; |
449 } | 449 } |
450 uint32_t words = (decompressed_op << 16) | (decompressed_op >> 16); | 450 uint32_t words = (decompressed_op << 16) | (decompressed_op >> 16); |
451 if (!output->Write(&words, 4)) | 451 if (!output->Write(&words, 4)) |
452 return false; | 452 return false; |
453 current_rva += 4; | 453 *current_rva += 4; |
454 break; | 454 break; |
455 } | 455 } |
456 case REL32ARM21: { | 456 case REL32ARM21: { |
457 uint32_t index; | 457 uint32_t index; |
458 if (!VectorAt(rel32_ix_, ix_rel32_ix, &index)) | 458 if (!VectorAt(rel32_ix_, *ix_rel32_ix, &index)) |
459 return false; | 459 return false; |
460 ++ix_rel32_ix; | 460 ++(*ix_rel32_ix); |
461 RVA rva; | 461 RVA rva; |
462 if (!VectorAt(rel32_rva_, index, &rva)) | 462 if (!VectorAt(rel32_rva_, index, &rva)) |
463 return false; | 463 return false; |
464 uint32_t decompressed_op; | 464 uint32_t decompressed_op; |
465 if (!DisassemblerElf32ARM::Decompress(ARM_OFF21, (uint16_t)op, | 465 if (!DisassemblerElf32ARM::Decompress(ARM_OFF21, (uint16_t)op, |
466 (uint32_t)(rva - current_rva), | 466 (uint32_t)(rva - *current_rva), |
467 &decompressed_op)) { | 467 &decompressed_op)) { |
468 return false; | 468 return false; |
469 } | 469 } |
470 uint32_t words = (decompressed_op << 16) | (decompressed_op >> 16); | 470 uint32_t words = (decompressed_op << 16) | (decompressed_op >> 16); |
471 if (!output->Write(&words, 4)) | 471 if (!output->Write(&words, 4)) |
472 return false; | 472 return false; |
473 current_rva += 4; | 473 *current_rva += 4; |
474 break; | 474 break; |
475 } | 475 } |
476 default: | 476 default: |
477 return false; | 477 return false; |
478 } | 478 } |
479 | 479 |
480 return true; | 480 return true; |
481 } | 481 } |
482 | 482 |
483 CheckBool EncodedProgram::AssembleTo(SinkStream* final_buffer) { | 483 CheckBool EncodedProgram::AssembleTo(SinkStream* final_buffer) { |
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496 Elf32_Word pending_elf_relocation_table_type = 0; | 496 Elf32_Word pending_elf_relocation_table_type = 0; |
497 SinkStream bytes_following_relocation_table; | 497 SinkStream bytes_following_relocation_table; |
498 | 498 |
499 SinkStream* output = final_buffer; | 499 SinkStream* output = final_buffer; |
500 | 500 |
501 for (size_t ix_ops = 0; ix_ops < ops_.size(); ++ix_ops) { | 501 for (size_t ix_ops = 0; ix_ops < ops_.size(); ++ix_ops) { |
502 OP op = ops_[ix_ops]; | 502 OP op = ops_[ix_ops]; |
503 | 503 |
504 switch (op) { | 504 switch (op) { |
505 default: | 505 default: |
506 if (!EvaluateRel32ARM(op, ix_rel32_ix, current_rva, output)) | 506 if (!EvaluateRel32ARM(op, &ix_rel32_ix, ¤t_rva, output)) |
507 return false; | 507 return false; |
508 break; | 508 break; |
509 | 509 |
510 case ORIGIN: { | 510 case ORIGIN: { |
511 RVA section_rva; | 511 RVA section_rva; |
512 if (!VectorAt(origins_, ix_origins, §ion_rva)) | 512 if (!VectorAt(origins_, ix_origins, §ion_rva)) |
513 return false; | 513 return false; |
514 ++ix_origins; | 514 ++ix_origins; |
515 current_rva = section_rva; | 515 current_rva = section_rva; |
516 break; | 516 break; |
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668 if (ix_abs32_ix != abs32_ix_.size()) | 668 if (ix_abs32_ix != abs32_ix_.size()) |
669 return false; | 669 return false; |
670 if (ix_rel32_ix != rel32_ix_.size()) | 670 if (ix_rel32_ix != rel32_ix_.size()) |
671 return false; | 671 return false; |
672 | 672 |
673 return true; | 673 return true; |
674 } | 674 } |
675 | 675 |
676 // RelocBlock has the layout of a block of relocations in the base relocation | 676 // RelocBlock has the layout of a block of relocations in the base relocation |
677 // table file format. | 677 // table file format. |
678 // | |
679 struct RelocBlockPOD { | 678 struct RelocBlockPOD { |
680 uint32_t page_rva; | 679 uint32_t page_rva; |
681 uint32_t block_size; | 680 uint32_t block_size; |
682 uint16_t relocs[4096]; // Allow up to one relocation per byte of a 4k page. | 681 uint16_t relocs[4096]; // Allow up to one relocation per byte of a 4k page. |
683 }; | 682 }; |
684 | 683 |
685 static_assert(offsetof(RelocBlockPOD, relocs) == 8, "reloc block header size"); | 684 static_assert(offsetof(RelocBlockPOD, relocs) == 8, "reloc block header size"); |
686 | 685 |
687 class RelocBlock { | 686 class RelocBlock { |
688 public: | 687 public: |
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806 } | 805 } |
807 | 806 |
808 Status Assemble(EncodedProgram* encoded, SinkStream* buffer) { | 807 Status Assemble(EncodedProgram* encoded, SinkStream* buffer) { |
809 bool assembled = encoded->AssembleTo(buffer); | 808 bool assembled = encoded->AssembleTo(buffer); |
810 if (assembled) | 809 if (assembled) |
811 return C_OK; | 810 return C_OK; |
812 return C_ASSEMBLY_FAILED; | 811 return C_ASSEMBLY_FAILED; |
813 } | 812 } |
814 | 813 |
815 } // namespace courgette | 814 } // namespace courgette |
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