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Issue 2856543002: Use off-heap data for class check instructions (Closed)
Patch Set: Feedback from Slava: rejig inheritance of CallTargets Created 3 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM.
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/flow_graph_compiler.h" 8 #include "vm/flow_graph_compiler.h"
9 9
10 #include "vm/ast_printer.h" 10 #include "vm/ast_printer.h"
(...skipping 1505 matching lines...) Expand 10 before | Expand all | Expand 10 after
1516 __ b(label, if_smi ? EQ : NE); 1516 __ b(label, if_smi ? EQ : NE);
1517 } 1517 }
1518 1518
1519 1519
1520 void FlowGraphCompiler::EmitTestAndCallLoadCid() { 1520 void FlowGraphCompiler::EmitTestAndCallLoadCid() {
1521 __ LoadClassId(R2, R0); 1521 __ LoadClassId(R2, R0);
1522 } 1522 }
1523 1523
1524 1524
1525 int FlowGraphCompiler::EmitTestAndCallCheckCid(Label* next_label, 1525 int FlowGraphCompiler::EmitTestAndCallCheckCid(Label* next_label,
1526 const CidRangeTarget& target, 1526 const CidRange& range,
1527 int bias) { 1527 int bias) {
1528 intptr_t cid_start = target.cid_start; 1528 intptr_t cid_start = range.cid_start;
1529 intptr_t cid_end = target.cid_end; 1529 intptr_t cid_end = range.cid_end;
1530 if (cid_start == cid_end) { 1530 if (cid_start == cid_end) {
1531 __ CompareImmediate(R2, cid_start - bias); 1531 __ CompareImmediate(R2, cid_start - bias);
1532 __ b(next_label, NE); 1532 __ b(next_label, NE);
1533 } else { 1533 } else {
1534 __ AddImmediate(R2, R2, bias - cid_start); 1534 __ AddImmediate(R2, R2, bias - cid_start);
1535 bias = cid_start; 1535 bias = cid_start;
1536 __ CompareImmediate(R2, cid_end - cid_start); 1536 __ CompareImmediate(R2, cid_end - cid_start);
1537 __ b(next_label, HI); // Unsigned higher. 1537 __ b(next_label, HI); // Unsigned higher.
1538 } 1538 }
1539 return bias; 1539 return bias;
(...skipping 292 matching lines...) Expand 10 before | Expand all | Expand 10 after
1832 DRegister dreg = EvenDRegisterOf(reg); 1832 DRegister dreg = EvenDRegisterOf(reg);
1833 __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex)); 1833 __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex));
1834 } 1834 }
1835 1835
1836 1836
1837 #undef __ 1837 #undef __
1838 1838
1839 } // namespace dart 1839 } // namespace dart
1840 1840
1841 #endif // defined TARGET_ARCH_ARM 1841 #endif // defined TARGET_ARCH_ARM
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