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Side by Side Diff: silk/arm/macros_armv5e.h

Issue 28553003: Updating Opus to a pre-release of 1.1 (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/deps/third_party/opus
Patch Set: Removing failing file Created 7 years, 2 months ago
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1 /***********************************************************************
2 Copyright (c) 2006-2011, Skype Limited. All rights reserved.
3 Copyright (c) 2013 Parrot
4 Redistribution and use in source and binary forms, with or without
5 modification, are permitted provided that the following conditions
6 are met:
7 - Redistributions of source code must retain the above copyright notice,
8 this list of conditions and the following disclaimer.
9 - Redistributions in binary form must reproduce the above copyright
10 notice, this list of conditions and the following disclaimer in the
11 documentation and/or other materials provided with the distribution.
12 - Neither the name of Internet Society, IETF or IETF Trust, nor the
13 names of specific contributors, may be used to endorse or promote
14 products derived from this software without specific prior written
15 permission.
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE.
27 ***********************************************************************/
28
29 #ifndef SILK_MACROS_ARMv5E_H
30 #define SILK_MACROS_ARMv5E_H
31
32 /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */
33 #undef silk_SMULWB
34 static inline opus_int32 silk_SMULWB_armv5e(opus_int32 a, opus_int16 b)
35 {
36 int res;
37 __asm__(
38 "#silk_SMULWB\n\t"
39 "smulwb %0, %1, %2\n\t"
40 : "=r"(res)
41 : "r"(a), "r"(b)
42 );
43 return res;
44 }
45 #define silk_SMULWB(a, b) (silk_SMULWB_armv5e(a, b))
46
47 /* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit i nt */
48 #undef silk_SMLAWB
49 static inline opus_int32 silk_SMLAWB_armv5e(opus_int32 a, opus_int32 b,
50 opus_int16 c)
51 {
52 int res;
53 __asm__(
54 "#silk_SMLAWB\n\t"
55 "smlawb %0, %1, %2, %3\n\t"
56 : "=r"(res)
57 : "r"(b), "r"(c), "r"(a)
58 );
59 return res;
60 }
61 #define silk_SMLAWB(a, b, c) (silk_SMLAWB_armv5e(a, b, c))
62
63 /* (a32 * (b32 >> 16)) >> 16 */
64 #undef silk_SMULWT
65 static inline opus_int32 silk_SMULWT_armv5e(opus_int32 a, opus_int32 b)
66 {
67 int res;
68 __asm__(
69 "#silk_SMULWT\n\t"
70 "smulwt %0, %1, %2\n\t"
71 : "=r"(res)
72 : "r"(a), "r"(b)
73 );
74 return res;
75 }
76 #define silk_SMULWT(a, b) (silk_SMULWT_armv5e(a, b))
77
78 /* a32 + (b32 * (c32 >> 16)) >> 16 */
79 #undef silk_SMLAWT
80 static inline opus_int32 silk_SMLAWT_armv5e(opus_int32 a, opus_int32 b,
81 opus_int32 c)
82 {
83 int res;
84 __asm__(
85 "#silk_SMLAWT\n\t"
86 "smlawt %0, %1, %2, %3\n\t"
87 : "=r"(res)
88 : "r"(b), "r"(c), "r"(a)
89 );
90 return res;
91 }
92 #define silk_SMLAWT(a, b, c) (silk_SMLAWT_armv5e(a, b, c))
93
94 /* (opus_int32)((opus_int16)(a3))) * (opus_int32)((opus_int16)(b32)) output have to be 32bit int */
95 #undef silk_SMULBB
96 static inline opus_int32 silk_SMULBB_armv5e(opus_int32 a, opus_int32 b)
97 {
98 int res;
99 __asm__(
100 "#silk_SMULBB\n\t"
101 "smulbb %0, %1, %2\n\t"
102 : "=r"(res)
103 : "%r"(a), "r"(b)
104 );
105 return res;
106 }
107 #define silk_SMULBB(a, b) (silk_SMULBB_armv5e(a, b))
108
109 /* a32 + (opus_int32)((opus_int16)(b32)) * (opus_int32)((opus_int16)(c32)) outpu t have to be 32bit int */
110 #undef silk_SMLABB
111 static inline opus_int32 silk_SMLABB_armv5e(opus_int32 a, opus_int32 b,
112 opus_int32 c)
113 {
114 int res;
115 __asm__(
116 "#silk_SMLABB\n\t"
117 "smlabb %0, %1, %2, %3\n\t"
118 : "=r"(res)
119 : "%r"(b), "r"(c), "r"(a)
120 );
121 return res;
122 }
123 #define silk_SMLABB(a, b, c) (silk_SMLABB_armv5e(a, b, c))
124
125 /* (opus_int32)((opus_int16)(a32)) * (b32 >> 16) */
126 #undef silk_SMULBT
127 static inline opus_int32 silk_SMULBT_armv5e(opus_int32 a, opus_int32 b)
128 {
129 int res;
130 __asm__(
131 "#silk_SMULBT\n\t"
132 "smulbt %0, %1, %2\n\t"
133 : "=r"(res)
134 : "r"(a), "r"(b)
135 );
136 return res;
137 }
138 #define silk_SMULBT(a, b) (silk_SMULBT_armv5e(a, b))
139
140 /* a32 + (opus_int32)((opus_int16)(b32)) * (c32 >> 16) */
141 #undef silk_SMLABT
142 static inline opus_int32 silk_SMLABT_armv5e(opus_int32 a, opus_int32 b,
143 opus_int32 c)
144 {
145 int res;
146 __asm__(
147 "#silk_SMLABT\n\t"
148 "smlabt %0, %1, %2, %3\n\t"
149 : "=r"(res)
150 : "r"(b), "r"(c), "r"(a)
151 );
152 return res;
153 }
154 #define silk_SMLABT(a, b, c) (silk_SMLABT_armv5e(a, b, c))
155
156 /* add/subtract with output saturated */
157 #undef silk_ADD_SAT32
158 static inline opus_int32 silk_ADD_SAT32_armv5e(opus_int32 a, opus_int32 b)
159 {
160 int res;
161 __asm__(
162 "#silk_ADD_SAT32\n\t"
163 "qadd %0, %1, %2\n\t"
164 : "=r"(res)
165 : "%r"(a), "r"(b)
166 );
167 return res;
168 }
169 #define silk_ADD_SAT32(a, b) (silk_ADD_SAT32_armv5e(a, b))
170
171 #undef silk_SUB_SAT32
172 static inline opus_int32 silk_SUB_SAT32_armv5e(opus_int32 a, opus_int32 b)
173 {
174 int res;
175 __asm__(
176 "#silk_SUB_SAT32\n\t"
177 "qsub %0, %1, %2\n\t"
178 : "=r"(res)
179 : "r"(a), "r"(b)
180 );
181 return res;
182 }
183 #define silk_SUB_SAT32(a, b) (silk_SUB_SAT32_armv5e(a, b))
184
185 #undef silk_CLZ16
186 static inline opus_int32 silk_CLZ16_armv5(opus_int16 in16)
187 {
188 int res;
189 __asm__(
190 "#silk_CLZ16\n\t"
191 "clz %0, %1;\n"
192 : "=r"(res)
193 : "r"(in16<<16|0x8000)
194 );
195 return res;
196 }
197 #define silk_CLZ16(in16) (silk_CLZ16_armv5(in16))
198
199 #undef silk_CLZ32
200 static inline opus_int32 silk_CLZ32_armv5(opus_int32 in32)
201 {
202 int res;
203 __asm__(
204 "#silk_CLZ32\n\t"
205 "clz %0, %1\n\t"
206 : "=r"(res)
207 : "r"(in32)
208 );
209 return res;
210 }
211 #define silk_CLZ32(in32) (silk_CLZ32_armv5(in32))
212
213 #endif /* SILK_MACROS_ARMv5E_H */
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