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Issue 2849463003: [wasm] Implement Generic S128 Load/Store, logical ops and Horizontal add (Closed)
Patch Set: Zvi's review Created 3 years, 7 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_SSE_INSTR_H_ 5 #ifndef V8_SSE_INSTR_H_
6 #define V8_SSE_INSTR_H_ 6 #define V8_SSE_INSTR_H_
7 7
8 #define SSE2_INSTRUCTION_LIST(V) \ 8 #define SSE2_INSTRUCTION_LIST(V) \
9 V(packsswb, 66, 0F, 63) \ 9 V(packsswb, 66, 0F, 63) \
10 V(packssdw, 66, 0F, 6B) \ 10 V(packssdw, 66, 0F, 6B) \
(...skipping 23 matching lines...) Expand all
34 V(psrad, 66, 0F, E2) \ 34 V(psrad, 66, 0F, E2) \
35 V(psrlw, 66, 0F, D1) \ 35 V(psrlw, 66, 0F, D1) \
36 V(psrld, 66, 0F, D2) \ 36 V(psrld, 66, 0F, D2) \
37 V(psubb, 66, 0F, F8) \ 37 V(psubb, 66, 0F, F8) \
38 V(psubw, 66, 0F, F9) \ 38 V(psubw, 66, 0F, F9) \
39 V(psubd, 66, 0F, FA) \ 39 V(psubd, 66, 0F, FA) \
40 V(psubsb, 66, 0F, E8) \ 40 V(psubsb, 66, 0F, E8) \
41 V(psubsw, 66, 0F, E9) \ 41 V(psubsw, 66, 0F, E9) \
42 V(psubusb, 66, 0F, D8) \ 42 V(psubusb, 66, 0F, D8) \
43 V(psubusw, 66, 0F, D9) \ 43 V(psubusw, 66, 0F, D9) \
44 V(pand, 66, 0F, DB) \
45 V(por, 66, 0F, EB) \
44 V(pxor, 66, 0F, EF) \ 46 V(pxor, 66, 0F, EF) \
45 V(cvtps2dq, 66, 0F, 5B) 47 V(cvtps2dq, 66, 0F, 5B)
46 48
47 #define SSSE3_INSTRUCTION_LIST(V) \ 49 #define SSSE3_INSTRUCTION_LIST(V) \
48 V(pabsb, 66, 0F, 38, 1C) \ 50 V(pabsb, 66, 0F, 38, 1C) \
49 V(pabsw, 66, 0F, 38, 1D) \ 51 V(pabsw, 66, 0F, 38, 1D) \
50 V(pabsd, 66, 0F, 38, 1E) \ 52 V(pabsd, 66, 0F, 38, 1E) \
53 V(phaddd, 66, 0F, 38, 02) \
54 V(phaddw, 66, 0F, 38, 01) \
51 V(pshufb, 66, 0F, 38, 00) \ 55 V(pshufb, 66, 0F, 38, 00) \
52 V(psignb, 66, 0F, 38, 08) \ 56 V(psignb, 66, 0F, 38, 08) \
53 V(psignw, 66, 0F, 38, 09) \ 57 V(psignw, 66, 0F, 38, 09) \
54 V(psignd, 66, 0F, 38, 0A) 58 V(psignd, 66, 0F, 38, 0A)
55 59
56 #define SSE4_INSTRUCTION_LIST(V) \ 60 #define SSE4_INSTRUCTION_LIST(V) \
57 V(packusdw, 66, 0F, 38, 2B) \ 61 V(packusdw, 66, 0F, 38, 2B) \
58 V(pminsb, 66, 0F, 38, 38) \ 62 V(pminsb, 66, 0F, 38, 38) \
59 V(pminsd, 66, 0F, 38, 39) \ 63 V(pminsd, 66, 0F, 38, 39) \
60 V(pminuw, 66, 0F, 38, 3A) \ 64 V(pminuw, 66, 0F, 38, 3A) \
61 V(pminud, 66, 0F, 38, 3B) \ 65 V(pminud, 66, 0F, 38, 3B) \
62 V(pmaxsb, 66, 0F, 38, 3C) \ 66 V(pmaxsb, 66, 0F, 38, 3C) \
63 V(pmaxsd, 66, 0F, 38, 3D) \ 67 V(pmaxsd, 66, 0F, 38, 3D) \
64 V(pmaxuw, 66, 0F, 38, 3E) \ 68 V(pmaxuw, 66, 0F, 38, 3E) \
65 V(pmaxud, 66, 0F, 38, 3F) \ 69 V(pmaxud, 66, 0F, 38, 3F) \
66 V(pmulld, 66, 0F, 38, 40) \ 70 V(pmulld, 66, 0F, 38, 40) \
67 V(ptest, 66, 0F, 38, 17) 71 V(ptest, 66, 0F, 38, 17)
68 72
69 #endif // V8_SSE_INSTR_H_ 73 #endif // V8_SSE_INSTR_H_
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