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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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2270 emit_sse_operand(dst, src); | 2270 emit_sse_operand(dst, src); |
2271 } | 2271 } |
2272 | 2272 |
2273 void Assembler::maxps(XMMRegister dst, const Operand& src) { | 2273 void Assembler::maxps(XMMRegister dst, const Operand& src) { |
2274 EnsureSpace ensure_space(this); | 2274 EnsureSpace ensure_space(this); |
2275 EMIT(0x0F); | 2275 EMIT(0x0F); |
2276 EMIT(0x5F); | 2276 EMIT(0x5F); |
2277 emit_sse_operand(dst, src); | 2277 emit_sse_operand(dst, src); |
2278 } | 2278 } |
2279 | 2279 |
| 2280 void Assembler::cmpps(XMMRegister dst, const Operand& src, int8_t cmp) { |
| 2281 EnsureSpace ensure_space(this); |
| 2282 EMIT(0x0F); |
| 2283 EMIT(0xC2); |
| 2284 emit_sse_operand(dst, src); |
| 2285 EMIT(cmp); |
| 2286 } |
| 2287 |
2280 void Assembler::sqrtsd(XMMRegister dst, const Operand& src) { | 2288 void Assembler::sqrtsd(XMMRegister dst, const Operand& src) { |
2281 EnsureSpace ensure_space(this); | 2289 EnsureSpace ensure_space(this); |
2282 EMIT(0xF2); | 2290 EMIT(0xF2); |
2283 EMIT(0x0F); | 2291 EMIT(0x0F); |
2284 EMIT(0x51); | 2292 EMIT(0x51); |
2285 emit_sse_operand(dst, src); | 2293 emit_sse_operand(dst, src); |
2286 } | 2294 } |
2287 | 2295 |
2288 | 2296 |
2289 void Assembler::andpd(XMMRegister dst, XMMRegister src) { | 2297 void Assembler::andpd(XMMRegister dst, XMMRegister src) { |
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2788 const Operand& src2) { | 2796 const Operand& src2) { |
2789 vinstr(op, dst, src1, src2, kNone, k0F, kWIG); | 2797 vinstr(op, dst, src1, src2, kNone, k0F, kWIG); |
2790 } | 2798 } |
2791 | 2799 |
2792 | 2800 |
2793 void Assembler::vpd(byte op, XMMRegister dst, XMMRegister src1, | 2801 void Assembler::vpd(byte op, XMMRegister dst, XMMRegister src1, |
2794 const Operand& src2) { | 2802 const Operand& src2) { |
2795 vinstr(op, dst, src1, src2, k66, k0F, kWIG); | 2803 vinstr(op, dst, src1, src2, k66, k0F, kWIG); |
2796 } | 2804 } |
2797 | 2805 |
| 2806 void Assembler::vcmpps(XMMRegister dst, XMMRegister src1, const Operand& src2, |
| 2807 int8_t cmp) { |
| 2808 vps(0xC2, dst, src1, src2); |
| 2809 EMIT(cmp); |
| 2810 } |
| 2811 |
2798 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, int8_t imm8) { | 2812 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, int8_t imm8) { |
2799 XMMRegister iop = {6}; | 2813 XMMRegister iop = {6}; |
2800 vinstr(0x71, iop, dst, Operand(src), k66, k0F, kWIG); | 2814 vinstr(0x71, iop, dst, Operand(src), k66, k0F, kWIG); |
2801 EMIT(imm8); | 2815 EMIT(imm8); |
2802 } | 2816 } |
2803 | 2817 |
2804 void Assembler::vpslld(XMMRegister dst, XMMRegister src, int8_t imm8) { | 2818 void Assembler::vpslld(XMMRegister dst, XMMRegister src, int8_t imm8) { |
2805 XMMRegister iop = {6}; | 2819 XMMRegister iop = {6}; |
2806 vinstr(0x72, iop, dst, Operand(src), k66, k0F, kWIG); | 2820 vinstr(0x72, iop, dst, Operand(src), k66, k0F, kWIG); |
2807 EMIT(imm8); | 2821 EMIT(imm8); |
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3120 } | 3134 } |
3121 RelocInfo rinfo(pc_, rmode, data, NULL); | 3135 RelocInfo rinfo(pc_, rmode, data, NULL); |
3122 reloc_info_writer.Write(&rinfo); | 3136 reloc_info_writer.Write(&rinfo); |
3123 } | 3137 } |
3124 | 3138 |
3125 | 3139 |
3126 } // namespace internal | 3140 } // namespace internal |
3127 } // namespace v8 | 3141 } // namespace v8 |
3128 | 3142 |
3129 #endif // V8_TARGET_ARCH_IA32 | 3143 #endif // V8_TARGET_ARCH_IA32 |
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