Chromium Code Reviews| Index: src/arm/assembler-arm-inl.h |
| diff --git a/src/arm/assembler-arm-inl.h b/src/arm/assembler-arm-inl.h |
| index c9e32cbf3f106f706699cfd1a39005e8e78491ed..21baeb2bccb3e1c36216cfc25634915e2b3786dc 100644 |
| --- a/src/arm/assembler-arm-inl.h |
| +++ b/src/arm/assembler-arm-inl.h |
| @@ -142,10 +142,13 @@ int RelocInfo::target_address_size() { |
| } |
| -void RelocInfo::set_target_address(Address target, WriteBarrierMode mode) { |
| +void RelocInfo::set_target_address(Address target, |
| + WriteBarrierMode write_barrier_mode, |
| + ICacheFlushMode icache_flush_mode) { |
| ASSERT(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); |
| - Assembler::set_target_address_at(pc_, host_, target); |
| - if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) { |
| + Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode); |
| + if (write_barrier_mode == UPDATE_WRITE_BARRIER && |
| + host() != NULL && IsCodeTarget(rmode_)) { |
| Object* target_code = Code::GetCodeFromTargetAddress(target); |
| host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| host(), this, HeapObject::cast(target_code)); |
| @@ -166,12 +169,15 @@ Handle<Object> RelocInfo::target_object_handle(Assembler* origin) { |
| } |
| -void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) { |
| +void RelocInfo::set_target_object(Object* target, |
| + WriteBarrierMode write_barrier_mode, |
| + ICacheFlushMode icache_flush_mode) { |
| ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
| ASSERT(!target->IsConsString()); |
| Assembler::set_target_address_at(pc_, host_, |
| - reinterpret_cast<Address>(target)); |
| - if (mode == UPDATE_WRITE_BARRIER && |
| + reinterpret_cast<Address>(target), |
| + icache_flush_mode); |
| + if (write_barrier_mode == UPDATE_WRITE_BARRIER && |
| host() != NULL && |
| target->IsHeapObject()) { |
| host()->GetHeap()->incremental_marking()->RecordWrite( |
| @@ -193,9 +199,11 @@ Address RelocInfo::target_runtime_entry(Assembler* origin) { |
| void RelocInfo::set_target_runtime_entry(Address target, |
| - WriteBarrierMode mode) { |
| + WriteBarrierMode write_barrier_mode, |
| + ICacheFlushMode icache_flush_mode) { |
| ASSERT(IsRuntimeEntry(rmode_)); |
| - if (target_address() != target) set_target_address(target, mode); |
| + if (target_address() != target) |
| + set_target_address(target, write_barrier_mode, icache_flush_mode); |
| } |
| @@ -212,11 +220,13 @@ Cell* RelocInfo::target_cell() { |
| } |
| -void RelocInfo::set_target_cell(Cell* cell, WriteBarrierMode mode) { |
| +void RelocInfo::set_target_cell(Cell* cell, |
| + WriteBarrierMode write_barrier_mode, |
| + ICacheFlushMode icache_flush_mode) { |
| ASSERT(rmode_ == RelocInfo::CELL); |
| Address address = cell->address() + Cell::kValueOffset; |
| Memory::Address_at(pc_) = address; |
| - if (mode == UPDATE_WRITE_BARRIER && host() != NULL) { |
| + if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) { |
| // TODO(1550) We are passing NULL as a slot because cell can never be on |
| // evacuation candidate. |
| host()->GetHeap()->incremental_marking()->RecordWrite( |
| @@ -500,30 +510,51 @@ void Assembler::deserialization_set_special_target_at( |
| } |
| +static uint32_t ExtractMovwImmediate(Instr instruction) { |
|
Rodolph Perfetta
2014/05/19 12:38:38
the Instruction class has a ImmedMovwMovtValue met
rmcilroy
2014/05/19 16:52:16
Ack (no longer applicable).
|
| + ASSERT(Assembler::IsMovW(instruction) || Assembler::IsMovT(instruction)); |
| + return ((instruction & 0xf0000) >> 4) | (instruction & 0xfff); |
| +} |
| + |
| + |
| static Instr EncodeMovwImmediate(uint32_t immediate) { |
| ASSERT(immediate < 0x10000); |
| return ((immediate & 0xf000) << 4) | (immediate & 0xfff); |
| } |
| +static Instr PatchMovwImmediate(Instr instruction, uint32_t immediate) { |
| + instruction &= ~EncodeMovwImmediate(0xffff); |
| + return instruction | EncodeMovwImmediate(immediate); |
| +} |
| + |
| + |
| void Assembler::set_target_address_at(Address pc, |
| ConstantPoolArray* constant_pool, |
| - Address target) { |
| + Address target, |
| + ICacheFlushMode icache_flush_mode) { |
| if (IsMovW(Memory::int32_at(pc))) { |
| ASSERT(IsMovT(Memory::int32_at(pc + kInstrSize))); |
| uint32_t* instr_ptr = reinterpret_cast<uint32_t*>(pc); |
| - uint32_t immediate = reinterpret_cast<uint32_t>(target); |
| - uint32_t intermediate = instr_ptr[0]; |
| - intermediate &= ~EncodeMovwImmediate(0xFFFF); |
| - intermediate |= EncodeMovwImmediate(immediate & 0xFFFF); |
| - instr_ptr[0] = intermediate; |
| - intermediate = instr_ptr[1]; |
| - intermediate &= ~EncodeMovwImmediate(0xFFFF); |
| - intermediate |= EncodeMovwImmediate(immediate >> 16); |
| - instr_ptr[1] = intermediate; |
| + uint32_t immediate_high = reinterpret_cast<uint32_t>(target) >> 16; |
| + uint32_t immediate_low = reinterpret_cast<uint32_t>(target) & 0xFFFF; |
| + int instructions_patched = 0; |
| + if (ExtractMovwImmediate(instr_ptr[0]) != immediate_low) { |
| + instr_ptr[0] = PatchMovwImmediate(instr_ptr[0], immediate_low); |
| + instructions_patched++; |
| + } |
| + if (ExtractMovwImmediate(instr_ptr[1]) != immediate_high) { |
| + instr_ptr[1] = PatchMovwImmediate(instr_ptr[1], immediate_high); |
| + instructions_patched++; |
| + } |
| ASSERT(IsMovW(Memory::int32_at(pc))); |
| ASSERT(IsMovT(Memory::int32_at(pc + kInstrSize))); |
| - CPU::FlushICache(pc, 2 * kInstrSize); |
| + if (icache_flush_mode == SKIP_ICACHE_FLUSH || |
| + (icache_flush_mode == SKIP_ICACHE_FLUSH_IF_ATOMIC && |
| + instructions_patched <= 1)) { |
| + // We can skip the icache flush in these cases. |
| + } else { |
| + CPU::FlushICache(pc, 2 * kInstrSize); |
| + } |
| } else if (FLAG_enable_ool_constant_pool) { |
| ASSERT(IsLdrPpImmediateOffset(Memory::int32_at(pc))); |
| Memory::Address_at( |