MIPS64: Move load/store instructions to macro-assembler.

src/mips64/macro-assembler-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #if V8_TARGET_ARCH_MIPS64
 
 #include "src/base/division-by-constant.h"
 #include "src/bootstrapper.h"
@@ skipping 29 matching lines @@
     code_object_ =
         Handle<Object>::New(isolate_->heap()->undefined_value(), isolate_);
   }
 }
 
 void MacroAssembler::Load(Register dst,
                           const MemOperand& src,
                           Representation r) {
   DCHECK(!r.IsDouble());
   if (r.IsInteger8()) {
-    lb(dst, src);
+    Lb(dst, src);
   } else if (r.IsUInteger8()) {
-    lbu(dst, src);
+    Lbu(dst, src);
   } else if (r.IsInteger16()) {
-    lh(dst, src);
+    Lh(dst, src);
   } else if (r.IsUInteger16()) {
-    lhu(dst, src);
+    Lhu(dst, src);
   } else if (r.IsInteger32()) {
-    lw(dst, src);
+    Lw(dst, src);
   } else {
-    ld(dst, src);
+    Ld(dst, src);
   }
 }
 
 
 void MacroAssembler::Store(Register src,
                            const MemOperand& dst,
                            Representation r) {
   DCHECK(!r.IsDouble());
   if (r.IsInteger8() || r.IsUInteger8()) {
-    sb(src, dst);
+    Sb(src, dst);
   } else if (r.IsInteger16() || r.IsUInteger16()) {
-    sh(src, dst);
+    Sh(src, dst);
   } else if (r.IsInteger32()) {
-    sw(src, dst);
+    Sw(src, dst);
   } else {
     if (r.IsHeapObject()) {
       AssertNotSmi(src);
     } else if (r.IsSmi()) {
       AssertSmi(src);
     }
-    sd(src, dst);
+    Sd(src, dst);
   }
 }
 
 
 void MacroAssembler::LoadRoot(Register destination,
                               Heap::RootListIndex index) {
-  ld(destination, MemOperand(s6, index << kPointerSizeLog2));
+  Ld(destination, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::LoadRoot(Register destination,
                               Heap::RootListIndex index,
                               Condition cond,
                               Register src1, const Operand& src2) {
   Branch(2, NegateCondition(cond), src1, src2);
-  ld(destination, MemOperand(s6, index << kPointerSizeLog2));
+  Ld(destination, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::StoreRoot(Register source,
                                Heap::RootListIndex index) {
   DCHECK(Heap::RootCanBeWrittenAfterInitialization(index));
-  sd(source, MemOperand(s6, index << kPointerSizeLog2));
+  Sd(source, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::StoreRoot(Register source,
                                Heap::RootListIndex index,
                                Condition cond,
                                Register src1, const Operand& src2) {
   DCHECK(Heap::RootCanBeWrittenAfterInitialization(index));
   Branch(2, NegateCondition(cond), src1, src2);
-  sd(source, MemOperand(s6, index << kPointerSizeLog2));
+  Sd(source, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 void MacroAssembler::PushCommonFrame(Register marker_reg) {
   if (marker_reg.is_valid()) {
     Push(ra, fp, marker_reg);
     Daddu(fp, sp, Operand(kPointerSize));
   } else {
     Push(ra, fp);
     mov(fp, sp);
   }
@@ skipping 34 matching lines @@
 void MacroAssembler::PopSafepointRegisters() {
   const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
   MultiPop(kSafepointSavedRegisters);
   if (num_unsaved > 0) {
     Daddu(sp, sp, Operand(num_unsaved * kPointerSize));
   }
 }
 
 
 void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
-  sd(src, SafepointRegisterSlot(dst));
+  Sd(src, SafepointRegisterSlot(dst));
 }
 
 
 void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
-  ld(dst, SafepointRegisterSlot(src));
+  Ld(dst, SafepointRegisterSlot(src));
 }
 
 
 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
   // The registers are pushed starting with the highest encoding,
   // which means that lowest encodings are closest to the stack pointer.
   return kSafepointRegisterStackIndexMap[reg_code];
 }
 
 
 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
   return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
 }
 
 
 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
   UNIMPLEMENTED_MIPS();
   // General purpose registers are pushed last on the stack.
   int doubles_size = DoubleRegister::kMaxNumRegisters * kDoubleSize;
   int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize;
   return MemOperand(sp, doubles_size + register_offset);
 }
 
+// Helper for base-reg + offset, when offset is larger than int16.
+void MacroAssembler::LoadRegPlusOffsetToAt(const MemOperand& src) {
+  DCHECK(!src.rm().is(at));
+  DCHECK(is_int32(src.offset()));
+
+  if (kArchVariant == kMips64r6) {
+    int32_t hi = (src.offset() >> kLuiShift) & kImm16Mask;
+    if (src.offset() & kNegOffset) {
+      if ((hi & kNegOffset) != ((hi + 1) & kNegOffset)) {
+        lui(at, (src.offset() >> kLuiShift) & kImm16Mask);
+        ori(at, at, src.offset() & kImm16Mask);  // Load 32-bit offset.
+        daddu(at, at, src.rm());                 // Add base register.
+        return;
+      }
+
+      hi += 1;
+    }
+
+    daui(at, src.rm(), hi);
+    daddiu(at, at, src.offset() & kImm16Mask);
+  } else {
+    lui(at, (src.offset() >> kLuiShift) & kImm16Mask);
+    ori(at, at, src.offset() & kImm16Mask);  // Load 32-bit offset.
+    daddu(at, at, src.rm());                 // Add base register.
+  }
+}
+
+// Helper for base-reg + upper part of offset, when offset is larger than int16.
+// Loads higher part of the offset to AT register.
+// Returns lower part of the offset to be used as offset
+// in Load/Store instructions
+int32_t MacroAssembler::LoadRegPlusUpperOffsetPartToAt(const MemOperand& src) {
+  DCHECK(!src.rm().is(at));
+  DCHECK(is_int32(src.offset()));
+  int32_t hi = (src.offset() >> kLuiShift) & kImm16Mask;
+  // If the highest bit of the lower part of the offset is 1, this would make
+  // the offset in the load/store instruction negative. We need to compensate
+  // for this by adding 1 to the upper part of the offset.
+  if (src.offset() & kNegOffset) {
+    if ((hi & kNegOffset) != ((hi + 1) & kNegOffset)) {
+      LoadRegPlusOffsetToAt(src);
+      return 0;
+    }
+
+    hi += 1;
+  }
+
+  if (kArchVariant == kMips64r6) {
+    daui(at, src.rm(), hi);
+  } else {
+    lui(at, hi);
+    daddu(at, at, src.rm());
+  }
+  return (src.offset() & kImm16Mask);
+}
 
 void MacroAssembler::InNewSpace(Register object,
                                 Register scratch,
                                 Condition cc,
                                 Label* branch) {
   DCHECK(cc == eq || cc == ne);
   CheckPageFlag(object, scratch, MemoryChunk::kIsInNewSpaceMask, cc, branch);
 }
 
 
@@ skipping 54 matching lines @@
 
 
 // Clobbers object, dst, map, and ra, if (ra_status == kRAHasBeenSaved)
 void MacroAssembler::RecordWriteForMap(Register object,
                                        Register map,
                                        Register dst,
                                        RAStatus ra_status,
                                        SaveFPRegsMode fp_mode) {
   if (emit_debug_code()) {
     DCHECK(!dst.is(at));
-    ld(dst, FieldMemOperand(map, HeapObject::kMapOffset));
+    Ld(dst, FieldMemOperand(map, HeapObject::kMapOffset));
     Check(eq,
           kWrongAddressOrValuePassedToRecordWrite,
           dst,
           Operand(isolate()->factory()->meta_map()));
   }
 
   if (!FLAG_incremental_marking) {
     return;
   }
 
   if (emit_debug_code()) {
-    ld(at, FieldMemOperand(object, HeapObject::kMapOffset));
+    Ld(at, FieldMemOperand(object, HeapObject::kMapOffset));
     Check(eq,
           kWrongAddressOrValuePassedToRecordWrite,
           map,
           Operand(at));
   }
 
   Label done;
 
   // A single check of the map's pages interesting flag suffices, since it is
   // only set during incremental collection, and then it's also guaranteed that
@@ skipping 49 matching lines @@
     Register value,
     RAStatus ra_status,
     SaveFPRegsMode fp_mode,
     RememberedSetAction remembered_set_action,
     SmiCheck smi_check,
     PointersToHereCheck pointers_to_here_check_for_value) {
   DCHECK(!AreAliased(object, address, value, t8));
   DCHECK(!AreAliased(object, address, value, t9));
 
   if (emit_debug_code()) {
-    ld(at, MemOperand(address));
+    Ld(at, MemOperand(address));
     Assert(
         eq, kWrongAddressOrValuePassedToRecordWrite, at, Operand(value));
   }
 
   if (remembered_set_action == OMIT_REMEMBERED_SET &&
       !FLAG_incremental_marking) {
     return;
   }
 
   // First, check if a write barrier is even needed. The tests below
@@ skipping 54 matching lines @@
   // do.
   if (!FLAG_incremental_marking) return;
 
   DCHECK(js_function.is(a1));
   DCHECK(code_entry.is(a4));
   DCHECK(scratch.is(a5));
   AssertNotSmi(js_function);
 
   if (emit_debug_code()) {
     Daddu(scratch, js_function, Operand(offset - kHeapObjectTag));
-    ld(at, MemOperand(scratch));
+    Ld(at, MemOperand(scratch));
     Assert(eq, kWrongAddressOrValuePassedToRecordWrite, at,
            Operand(code_entry));
   }
 
   // First, check if a write barrier is even needed. The tests below
   // catch stores of Smis and stores into young gen.
   Label done;
 
   CheckPageFlag(code_entry, scratch,
                 MemoryChunk::kPointersToHereAreInterestingMask, eq, &done);
@@ skipping 40 matching lines @@
   if (emit_debug_code()) {
     Label ok;
     JumpIfNotInNewSpace(object, scratch, &ok);
     stop("Remembered set pointer is in new space");
     bind(&ok);
   }
   // Load store buffer top.
   ExternalReference store_buffer =
       ExternalReference::store_buffer_top(isolate());
   li(t8, Operand(store_buffer));
-  ld(scratch, MemOperand(t8));
+  Ld(scratch, MemOperand(t8));
   // Store pointer to buffer and increment buffer top.
-  sd(address, MemOperand(scratch));
+  Sd(address, MemOperand(scratch));
   Daddu(scratch, scratch, kPointerSize);
   // Write back new top of buffer.
-  sd(scratch, MemOperand(t8));
+  Sd(scratch, MemOperand(t8));
   // Call stub on end of buffer.
   // Check for end of buffer.
   And(t8, scratch, Operand(StoreBuffer::kStoreBufferMask));
   DCHECK(!scratch.is(t8));
   if (and_then == kFallThroughAtEnd) {
     Branch(&done, ne, t8, Operand(zero_reg));
   } else {
     DCHECK(and_then == kReturnAtEnd);
     Ret(ne, t8, Operand(zero_reg));
   }
@@ skipping 736 matching lines @@
     dsrl32(src, src, 0);
     dsbh(dest, src);
     dshd(dest, dest);
   }
 }
 
 void MacroAssembler::Ulw(Register rd, const MemOperand& rs) {
   DCHECK(!rd.is(at));
   DCHECK(!rs.rm().is(at));
   if (kArchVariant == kMips64r6) {
-    lw(rd, rs);
+    Lw(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     if (is_int16(rs.offset() + kMipsLwrOffset) &&
         is_int16(rs.offset() + kMipsLwlOffset)) {
       if (!rd.is(rs.rm())) {
         lwr(rd, MemOperand(rs.rm(), rs.offset() + kMipsLwrOffset));
         lwl(rd, MemOperand(rs.rm(), rs.offset() + kMipsLwlOffset));
       } else {
         lwr(at, MemOperand(rs.rm(), rs.offset() + kMipsLwrOffset));
         lwl(at, MemOperand(rs.rm(), rs.offset() + kMipsLwlOffset));
         mov(rd, at);
       }
     } else {  // Offset > 16 bits, use multiple instructions to load.
       LoadRegPlusOffsetToAt(rs);
       lwr(rd, MemOperand(at, kMipsLwrOffset));
       lwl(rd, MemOperand(at, kMipsLwlOffset));
     }
   }
 }
 
 void MacroAssembler::Ulwu(Register rd, const MemOperand& rs) {
   if (kArchVariant == kMips64r6) {
-    lwu(rd, rs);
+    Lwu(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     Ulw(rd, rs);
     Dext(rd, rd, 0, 32);
   }
 }
 
 
 void MacroAssembler::Usw(Register rd, const MemOperand& rs) {
   DCHECK(!rd.is(at));
   DCHECK(!rs.rm().is(at));
   if (kArchVariant == kMips64r6) {
-    sw(rd, rs);
+    Sw(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     if (is_int16(rs.offset() + kMipsSwrOffset) &&
         is_int16(rs.offset() + kMipsSwlOffset)) {
       swr(rd, MemOperand(rs.rm(), rs.offset() + kMipsSwrOffset));
       swl(rd, MemOperand(rs.rm(), rs.offset() + kMipsSwlOffset));
     } else {
       LoadRegPlusOffsetToAt(rs);
       swr(rd, MemOperand(at, kMipsSwrOffset));
       swl(rd, MemOperand(at, kMipsSwlOffset));
     }
   }
 }
 
 void MacroAssembler::Ulh(Register rd, const MemOperand& rs) {
   DCHECK(!rd.is(at));
   DCHECK(!rs.rm().is(at));
   if (kArchVariant == kMips64r6) {
-    lh(rd, rs);
+    Lh(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     if (is_int16(rs.offset()) && is_int16(rs.offset() + 1)) {
 #if defined(V8_TARGET_LITTLE_ENDIAN)
-      lbu(at, rs);
-      lb(rd, MemOperand(rs.rm(), rs.offset() + 1));
+      Lbu(at, rs);
+      Lb(rd, MemOperand(rs.rm(), rs.offset() + 1));
 #elif defined(V8_TARGET_BIG_ENDIAN)
-      lbu(at, MemOperand(rs.rm(), rs.offset() + 1));
-      lb(rd, rs);
+      Lbu(at, MemOperand(rs.rm(), rs.offset() + 1));
+      Lb(rd, rs);
 #endif
     } else {  // Offset > 16 bits, use multiple instructions to load.
       LoadRegPlusOffsetToAt(rs);
 #if defined(V8_TARGET_LITTLE_ENDIAN)
-      lb(rd, MemOperand(at, 1));
-      lbu(at, MemOperand(at, 0));
+      Lb(rd, MemOperand(at, 1));
+      Lbu(at, MemOperand(at, 0));
 #elif defined(V8_TARGET_BIG_ENDIAN)
-      lb(rd, MemOperand(at, 0));
-      lbu(at, MemOperand(at, 1));
+      Lb(rd, MemOperand(at, 0));
+      Lbu(at, MemOperand(at, 1));
 #endif
     }
     dsll(rd, rd, 8);
     or_(rd, rd, at);
   }
 }
 
 void MacroAssembler::Ulhu(Register rd, const MemOperand& rs) {
   DCHECK(!rd.is(at));
   DCHECK(!rs.rm().is(at));
   if (kArchVariant == kMips64r6) {
-    lhu(rd, rs);
+    Lhu(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     if (is_int16(rs.offset()) && is_int16(rs.offset() + 1)) {
 #if defined(V8_TARGET_LITTLE_ENDIAN)
-      lbu(at, rs);
-      lbu(rd, MemOperand(rs.rm(), rs.offset() + 1));
+      Lbu(at, rs);
+      Lbu(rd, MemOperand(rs.rm(), rs.offset() + 1));
 #elif defined(V8_TARGET_BIG_ENDIAN)
-      lbu(at, MemOperand(rs.rm(), rs.offset() + 1));
-      lbu(rd, rs);
+      Lbu(at, MemOperand(rs.rm(), rs.offset() + 1));
+      Lbu(rd, rs);
 #endif
     } else {  // Offset > 16 bits, use multiple instructions to load.
       LoadRegPlusOffsetToAt(rs);
 #if defined(V8_TARGET_LITTLE_ENDIAN)
-      lbu(rd, MemOperand(at, 1));
-      lbu(at, MemOperand(at, 0));
+      Lbu(rd, MemOperand(at, 1));
+      Lbu(at, MemOperand(at, 0));
 #elif defined(V8_TARGET_BIG_ENDIAN)
-      lbu(rd, MemOperand(at, 0));
-      lbu(at, MemOperand(at, 1));
+      Lbu(rd, MemOperand(at, 0));
+      Lbu(at, MemOperand(at, 1));
 #endif
     }
     dsll(rd, rd, 8);
     or_(rd, rd, at);
   }
 }
 
 void MacroAssembler::Ush(Register rd, const MemOperand& rs, Register scratch) {
   DCHECK(!rd.is(at));
   DCHECK(!rs.rm().is(at));
   DCHECK(!rs.rm().is(scratch));
   DCHECK(!scratch.is(at));
   if (kArchVariant == kMips64r6) {
-    sh(rd, rs);
+    Sh(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     MemOperand source = rs;
     // If offset > 16 bits, load address to at with offset 0.
     if (!is_int16(rs.offset()) || !is_int16(rs.offset() + 1)) {
       LoadRegPlusOffsetToAt(rs);
       source = MemOperand(at, 0);
     }
 
     if (!scratch.is(rd)) {
       mov(scratch, rd);
     }
 
 #if defined(V8_TARGET_LITTLE_ENDIAN)
-    sb(scratch, source);
+    Sb(scratch, source);
     srl(scratch, scratch, 8);
-    sb(scratch, MemOperand(source.rm(), source.offset() + 1));
+    Sb(scratch, MemOperand(source.rm(), source.offset() + 1));
 #elif defined(V8_TARGET_BIG_ENDIAN)
-    sb(scratch, MemOperand(source.rm(), source.offset() + 1));
+    Sb(scratch, MemOperand(source.rm(), source.offset() + 1));
     srl(scratch, scratch, 8);
-    sb(scratch, source);
+    Sb(scratch, source);
 #endif
   }
 }
 
 void MacroAssembler::Uld(Register rd, const MemOperand& rs) {
   DCHECK(!rd.is(at));
   DCHECK(!rs.rm().is(at));
   if (kArchVariant == kMips64r6) {
-    ld(rd, rs);
+    Ld(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     if (is_int16(rs.offset() + kMipsLdrOffset) &&
         is_int16(rs.offset() + kMipsLdlOffset)) {
       if (!rd.is(rs.rm())) {
         ldr(rd, MemOperand(rs.rm(), rs.offset() + kMipsLdrOffset));
         ldl(rd, MemOperand(rs.rm(), rs.offset() + kMipsLdlOffset));
       } else {
         ldr(at, MemOperand(rs.rm(), rs.offset() + kMipsLdrOffset));
         ldl(at, MemOperand(rs.rm(), rs.offset() + kMipsLdlOffset));
         mov(rd, at);
       }
     } else {  // Offset > 16 bits, use multiple instructions to load.
       LoadRegPlusOffsetToAt(rs);
       ldr(rd, MemOperand(at, kMipsLdrOffset));
       ldl(rd, MemOperand(at, kMipsLdlOffset));
     }
   }
 }
 
 
 // Load consequent 32-bit word pair in 64-bit reg. and put first word in low
 // bits,
 // second word in high bits.
 void MacroAssembler::LoadWordPair(Register rd, const MemOperand& rs,
                                   Register scratch) {
-  lwu(rd, rs);
-  lw(scratch, MemOperand(rs.rm(), rs.offset() + kPointerSize / 2));
+  Lwu(rd, rs);
+  Lw(scratch, MemOperand(rs.rm(), rs.offset() + kPointerSize / 2));
   dsll32(scratch, scratch, 0);
   Daddu(rd, rd, scratch);
 }
 
 void MacroAssembler::Usd(Register rd, const MemOperand& rs) {
   DCHECK(!rd.is(at));
   DCHECK(!rs.rm().is(at));
   if (kArchVariant == kMips64r6) {
-    sd(rd, rs);
+    Sd(rd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     if (is_int16(rs.offset() + kMipsSdrOffset) &&
         is_int16(rs.offset() + kMipsSdlOffset)) {
       sdr(rd, MemOperand(rs.rm(), rs.offset() + kMipsSdrOffset));
       sdl(rd, MemOperand(rs.rm(), rs.offset() + kMipsSdlOffset));
     } else {
       LoadRegPlusOffsetToAt(rs);
       sdr(rd, MemOperand(at, kMipsSdrOffset));
       sdl(rd, MemOperand(at, kMipsSdlOffset));
     }
   }
 }
 
 
 // Do 64-bit store as two consequent 32-bit stores to unaligned address.
 void MacroAssembler::StoreWordPair(Register rd, const MemOperand& rs,
                                    Register scratch) {
-  sw(rd, rs);
+  Sw(rd, rs);
   dsrl32(scratch, rd, 0);
-  sw(scratch, MemOperand(rs.rm(), rs.offset() + kPointerSize / 2));
+  Sw(scratch, MemOperand(rs.rm(), rs.offset() + kPointerSize / 2));
 }
 
 void MacroAssembler::Ulwc1(FPURegister fd, const MemOperand& rs,
                            Register scratch) {
   if (kArchVariant == kMips64r6) {
-    lwc1(fd, rs);
+    Lwc1(fd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     Ulw(scratch, rs);
     mtc1(scratch, fd);
   }
 }
 
 void MacroAssembler::Uswc1(FPURegister fd, const MemOperand& rs,
                            Register scratch) {
   if (kArchVariant == kMips64r6) {
-    swc1(fd, rs);
+    Swc1(fd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     mfc1(scratch, fd);
     Usw(scratch, rs);
   }
 }
 
 void MacroAssembler::Uldc1(FPURegister fd, const MemOperand& rs,
                            Register scratch) {
   DCHECK(!scratch.is(at));
   if (kArchVariant == kMips64r6) {
-    ldc1(fd, rs);
+    Ldc1(fd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     Uld(scratch, rs);
     dmtc1(scratch, fd);
   }
 }
 
 void MacroAssembler::Usdc1(FPURegister fd, const MemOperand& rs,
                            Register scratch) {
   DCHECK(!scratch.is(at));
   if (kArchVariant == kMips64r6) {
-    sdc1(fd, rs);
+    Sdc1(fd, rs);
   } else {
     DCHECK(kArchVariant == kMips64r2);
     dmfc1(scratch, fd);
     Usd(scratch, rs);
   }
 }
 
+void MacroAssembler::Lb(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    lb(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    lb(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Lbu(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    lbu(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    lbu(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Sb(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    sb(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to store.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    sb(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Lh(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    lh(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    lh(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Lhu(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    lhu(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    lhu(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Sh(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    sh(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to store.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    sh(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Lw(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    lw(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    lw(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Lwu(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    lwu(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    lwu(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Sw(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    sw(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to store.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    sw(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Ld(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    ld(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    ld(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Sd(Register rd, const MemOperand& rs) {
+  if (is_int16(rs.offset())) {
+    sd(rd, rs);
+  } else {  // Offset > 16 bits, use multiple instructions to store.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs);
+    sd(rd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Lwc1(FPURegister fd, const MemOperand& src) {
+  if (is_int16(src.offset())) {
+    lwc1(fd, src);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(src);
+    lwc1(fd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Swc1(FPURegister fs, const MemOperand& src) {
+  if (is_int16(src.offset())) {
+    swc1(fs, src);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(src);
+    swc1(fs, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Ldc1(FPURegister fd, const MemOperand& src) {
+  if (is_int16(src.offset())) {
+    ldc1(fd, src);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(src);
+    ldc1(fd, MemOperand(at, off16));
+  }
+}
+
+void MacroAssembler::Sdc1(FPURegister fs, const MemOperand& src) {
+  DCHECK(!src.rm().is(at));
+  if (is_int16(src.offset())) {
+    sdc1(fs, src);
+  } else {  // Offset > 16 bits, use multiple instructions to load.
+    int32_t off16 = LoadRegPlusUpperOffsetPartToAt(src);
+    sdc1(fs, MemOperand(at, off16));
+  }
+}
+
 void MacroAssembler::li(Register dst, Handle<Object> value, LiFlags mode) {
   li(dst, Operand(value), mode);
 }
 
 static inline int64_t ShiftAndFixSignExtension(int64_t imm, int bitnum) {
   if ((imm >> (bitnum - 1)) & 0x1) {
     imm = (imm >> bitnum) + 1;
   } else {
     imm = imm >> bitnum;
   }
@@ skipping 127 matching lines @@
 
 
 void MacroAssembler::MultiPush(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kPointerSize;
 
   Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kPointerSize;
-      sd(ToRegister(i), MemOperand(sp, stack_offset));
+      Sd(ToRegister(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPushReversed(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kPointerSize;
 
   Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kPointerSize;
-      sd(ToRegister(i), MemOperand(sp, stack_offset));
+      Sd(ToRegister(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPop(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
-      ld(ToRegister(i), MemOperand(sp, stack_offset));
+      Ld(ToRegister(i), MemOperand(sp, stack_offset));
       stack_offset += kPointerSize;
     }
   }
   daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::MultiPopReversed(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
-      ld(ToRegister(i), MemOperand(sp, stack_offset));
+      Ld(ToRegister(i), MemOperand(sp, stack_offset));
       stack_offset += kPointerSize;
     }
   }
   daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::MultiPushFPU(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kDoubleSize;
 
   Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kDoubleSize;
-      sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
+      Sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPushReversedFPU(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kDoubleSize;
 
   Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kDoubleSize;
-      sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
+      Sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPopFPU(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
-      ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
+      Ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
       stack_offset += kDoubleSize;
     }
   }
   daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::MultiPopReversedFPU(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
-      ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
+      Ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
       stack_offset += kDoubleSize;
     }
   }
   daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::Ext(Register rt,
                          Register rs,
                          uint16_t pos,
@@ skipping 896 matching lines @@
 
 void MacroAssembler::TruncateDoubleToI(Register result,
                                        DoubleRegister double_input) {
   Label done;
 
   TryInlineTruncateDoubleToI(result, double_input, &done);
 
   // If we fell through then inline version didn't succeed - call stub instead.
   push(ra);
   Dsubu(sp, sp, Operand(kDoubleSize));  // Put input on stack.
-  sdc1(double_input, MemOperand(sp, 0));
+  Sdc1(double_input, MemOperand(sp, 0));
 
   DoubleToIStub stub(isolate(), sp, result, 0, true, true);
   CallStub(&stub);
 
   Daddu(sp, sp, Operand(kDoubleSize));
   pop(ra);
 
   bind(&done);
 }
 
 
 void MacroAssembler::TruncateHeapNumberToI(Register result, Register object) {
   Label done;
   DoubleRegister double_scratch = f12;
   DCHECK(!result.is(object));
 
-  ldc1(double_scratch,
+  Ldc1(double_scratch,
        MemOperand(object, HeapNumber::kValueOffset - kHeapObjectTag));
   TryInlineTruncateDoubleToI(result, double_scratch, &done);
 
   // If we fell through then inline version didn't succeed - call stub instead.
   push(ra);
   DoubleToIStub stub(isolate(),
                      object,
                      result,
                      HeapNumber::kValueOffset - kHeapObjectTag,
                      true,
@@ skipping 1349 matching lines @@
   dsrl32(dst, dst, 0);
   dsll32(dst, dst, 0);
   or_(dst, dst, scratch);
 }
 
 void MacroAssembler::MaybeDropFrames() {
   // Check whether we need to drop frames to restart a function on the stack.
   ExternalReference restart_fp =
       ExternalReference::debug_restart_fp_address(isolate());
   li(a1, Operand(restart_fp));
-  ld(a1, MemOperand(a1));
+  Ld(a1, MemOperand(a1));
   Jump(isolate()->builtins()->FrameDropperTrampoline(), RelocInfo::CODE_TARGET,
        ne, a1, Operand(zero_reg));
 }
 
 // ---------------------------------------------------------------------------
 // Exception handling.
 
 void MacroAssembler::PushStackHandler() {
   // Adjust this code if not the case.
   STATIC_ASSERT(StackHandlerConstants::kSize == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);
 
   // Link the current handler as the next handler.
   li(a6, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
-  ld(a5, MemOperand(a6));
+  Ld(a5, MemOperand(a6));
   push(a5);
 
   // Set this new handler as the current one.
-  sd(sp, MemOperand(a6));
+  Sd(sp, MemOperand(a6));
 }
 
 
 void MacroAssembler::PopStackHandler() {
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   pop(a1);
   Daddu(sp, sp, Operand(static_cast<int64_t>(StackHandlerConstants::kSize -
                                              kPointerSize)));
   li(at, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
-  sd(a1, MemOperand(at));
+  Sd(a1, MemOperand(at));
 }
 
 
 void MacroAssembler::Allocate(int object_size,
                               Register result,
                               Register scratch1,
                               Register scratch2,
                               Label* gc_required,
                               AllocationFlags flags) {
   DCHECK(object_size <= kMaxRegularHeapObjectSize);
@@ skipping 30 matching lines @@
 
   // Set up allocation top address and allocation limit registers.
   Register top_address = scratch1;
   // This code stores a temporary value in t9.
   Register alloc_limit = t9;
   Register result_end = scratch2;
   li(top_address, Operand(allocation_top));
 
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and allocation limit into alloc_limit.
-    ld(result, MemOperand(top_address));
-    ld(alloc_limit, MemOperand(top_address, kPointerSize));
+    Ld(result, MemOperand(top_address));
+    Ld(alloc_limit, MemOperand(top_address, kPointerSize));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry.
-      ld(alloc_limit, MemOperand(top_address));
+      Ld(alloc_limit, MemOperand(top_address));
       Check(eq, kUnexpectedAllocationTop, result, Operand(alloc_limit));
     }
     // Load allocation limit. Result already contains allocation top.
-    ld(alloc_limit, MemOperand(top_address, static_cast<int32_t>(limit - top)));
+    Ld(alloc_limit, MemOperand(top_address, static_cast<int32_t>(limit - top)));
   }
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on ARM64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   if (emit_debug_code()) {
     And(at, result, Operand(kDoubleAlignmentMask));
     Check(eq, kAllocationIsNotDoubleAligned, at, Operand(zero_reg));
   }
 
   // Calculate new top and bail out if new space is exhausted. Use result
   // to calculate the new top.
   Daddu(result_end, result, Operand(object_size));
   Branch(gc_required, Ugreater, result_end, Operand(alloc_limit));
 
   if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) {
     // The top pointer is not updated for allocation folding dominators.
-    sd(result_end, MemOperand(top_address));
+    Sd(result_end, MemOperand(top_address));
   }
 
   // Tag object.
   Daddu(result, result, Operand(kHeapObjectTag));
 }
 
 
 void MacroAssembler::Allocate(Register object_size, Register result,
                               Register result_end, Register scratch,
                               Label* gc_required, AllocationFlags flags) {
@@ skipping 24 matching lines @@
   DCHECK((limit - top) == kPointerSize);
 
   // Set up allocation top address and object size registers.
   Register top_address = scratch;
   // This code stores a temporary value in t9.
   Register alloc_limit = t9;
   li(top_address, Operand(allocation_top));
 
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and allocation limit into alloc_limit.
-    ld(result, MemOperand(top_address));
-    ld(alloc_limit, MemOperand(top_address, kPointerSize));
+    Ld(result, MemOperand(top_address));
+    Ld(alloc_limit, MemOperand(top_address, kPointerSize));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry.
-      ld(alloc_limit, MemOperand(top_address));
+      Ld(alloc_limit, MemOperand(top_address));
       Check(eq, kUnexpectedAllocationTop, result, Operand(alloc_limit));
     }
     // Load allocation limit. Result already contains allocation top.
-    ld(alloc_limit, MemOperand(top_address, static_cast<int32_t>(limit - top)));
+    Ld(alloc_limit, MemOperand(top_address, static_cast<int32_t>(limit - top)));
   }
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on ARM64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   if (emit_debug_code()) {
     And(at, result, Operand(kDoubleAlignmentMask));
     Check(eq, kAllocationIsNotDoubleAligned, at, Operand(zero_reg));
   }
@@ skipping 10 matching lines @@
   Branch(gc_required, Ugreater, result_end, Operand(alloc_limit));
 
   // Update allocation top. result temporarily holds the new top.
   if (emit_debug_code()) {
     And(at, result_end, Operand(kObjectAlignmentMask));
     Check(eq, kUnalignedAllocationInNewSpace, at, Operand(zero_reg));
   }
 
   if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) {
     // The top pointer is not updated for allocation folding dominators.
-    sd(result_end, MemOperand(top_address));
+    Sd(result_end, MemOperand(top_address));
   }
 
   // Tag object if.
   Daddu(result, result, Operand(kHeapObjectTag));
 }
 
 void MacroAssembler::FastAllocate(int object_size, Register result,
                                   Register scratch1, Register scratch2,
                                   AllocationFlags flags) {
   DCHECK(object_size <= kMaxRegularHeapObjectSize);
   DCHECK(!AreAliased(result, scratch1, scratch2, at));
 
   // Make object size into bytes.
   if ((flags & SIZE_IN_WORDS) != 0) {
     object_size *= kPointerSize;
   }
   DCHECK(0 == (object_size & kObjectAlignmentMask));
 
   ExternalReference allocation_top =
       AllocationUtils::GetAllocationTopReference(isolate(), flags);
 
   Register top_address = scratch1;
   Register result_end = scratch2;
   li(top_address, Operand(allocation_top));
-  ld(result, MemOperand(top_address));
+  Ld(result, MemOperand(top_address));
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on MIPS64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   if (emit_debug_code()) {
     And(at, result, Operand(kDoubleAlignmentMask));
     Check(eq, kAllocationIsNotDoubleAligned, at, Operand(zero_reg));
   }
 
   // Calculate new top and write it back.
   Daddu(result_end, result, Operand(object_size));
-  sd(result_end, MemOperand(top_address));
+  Sd(result_end, MemOperand(top_address));
 
   Daddu(result, result, Operand(kHeapObjectTag));
 }
 
 void MacroAssembler::FastAllocate(Register object_size, Register result,
                                   Register result_end, Register scratch,
                                   AllocationFlags flags) {
   // |object_size| and |result_end| may overlap, other registers must not.
   DCHECK(!AreAliased(object_size, result, scratch, at));
   DCHECK(!AreAliased(result_end, result, scratch, at));
 
   ExternalReference allocation_top =
       AllocationUtils::GetAllocationTopReference(isolate(), flags);
 
   // Set up allocation top address and object size registers.
   Register top_address = scratch;
   li(top_address, Operand(allocation_top));
-  ld(result, MemOperand(top_address));
+  Ld(result, MemOperand(top_address));
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on MIPS64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   if (emit_debug_code()) {
     And(at, result, Operand(kDoubleAlignmentMask));
     Check(eq, kAllocationIsNotDoubleAligned, at, Operand(zero_reg));
   }
 
@@ skipping 37 matching lines @@
   // object.
   Allocate(HeapNumber::kSize, result, scratch1, scratch2, need_gc,
            NO_ALLOCATION_FLAGS);
 
   Heap::RootListIndex map_index = mode == MUTABLE
       ? Heap::kMutableHeapNumberMapRootIndex
       : Heap::kHeapNumberMapRootIndex;
   AssertIsRoot(heap_number_map, map_index);
 
   // Store heap number map in the allocated object.
-  sd(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
+  Sd(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
 }
 
 
 void MacroAssembler::AllocateHeapNumberWithValue(Register result,
                                                  FPURegister value,
                                                  Register scratch1,
                                                  Register scratch2,
                                                  Label* gc_required) {
   LoadRoot(t8, Heap::kHeapNumberMapRootIndex);
   AllocateHeapNumber(result, scratch1, scratch2, t8, gc_required);
-  sdc1(value, FieldMemOperand(result, HeapNumber::kValueOffset));
+  Sdc1(value, FieldMemOperand(result, HeapNumber::kValueOffset));
 }
 
 
 void MacroAssembler::AllocateJSValue(Register result, Register constructor,
                                      Register value, Register scratch1,
                                      Register scratch2, Label* gc_required) {
   DCHECK(!result.is(constructor));
   DCHECK(!result.is(scratch1));
   DCHECK(!result.is(scratch2));
   DCHECK(!result.is(value));
 
   // Allocate JSValue in new space.
   Allocate(JSValue::kSize, result, scratch1, scratch2, gc_required,
            NO_ALLOCATION_FLAGS);
 
   // Initialize the JSValue.
   LoadGlobalFunctionInitialMap(constructor, scratch1, scratch2);
-  sd(scratch1, FieldMemOperand(result, HeapObject::kMapOffset));
+  Sd(scratch1, FieldMemOperand(result, HeapObject::kMapOffset));
   LoadRoot(scratch1, Heap::kEmptyFixedArrayRootIndex);
-  sd(scratch1, FieldMemOperand(result, JSObject::kPropertiesOffset));
-  sd(scratch1, FieldMemOperand(result, JSObject::kElementsOffset));
-  sd(value, FieldMemOperand(result, JSValue::kValueOffset));
+  Sd(scratch1, FieldMemOperand(result, JSObject::kPropertiesOffset));
+  Sd(scratch1, FieldMemOperand(result, JSObject::kElementsOffset));
+  Sd(value, FieldMemOperand(result, JSValue::kValueOffset));
   STATIC_ASSERT(JSValue::kSize == 4 * kPointerSize);
 }
 
 void MacroAssembler::InitializeFieldsWithFiller(Register current_address,
                                                 Register end_address,
                                                 Register filler) {
   Label loop, entry;
   Branch(&entry);
   bind(&loop);
-  sd(filler, MemOperand(current_address));
+  Sd(filler, MemOperand(current_address));
   Daddu(current_address, current_address, kPointerSize);
   bind(&entry);
   Branch(&loop, ult, current_address, Operand(end_address));
 }
 
 void MacroAssembler::SubNanPreservePayloadAndSign_s(FPURegister fd,
                                                     FPURegister fs,
                                                     FPURegister ft) {
   FloatRegister dest = fd.is(fs) || fd.is(ft) ? kLithiumScratchDouble : fd;
   Label check_nan, save_payload, done;
@@ skipping 58 matching lines @@
 
   bind(&done);
 }
 
 void MacroAssembler::CompareMapAndBranch(Register obj,
                                          Register scratch,
                                          Handle<Map> map,
                                          Label* early_success,
                                          Condition cond,
                                          Label* branch_to) {
-  ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
+  Ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   CompareMapAndBranch(scratch, map, early_success, cond, branch_to);
 }
 
 
 void MacroAssembler::CompareMapAndBranch(Register obj_map,
                                          Handle<Map> map,
                                          Label* early_success,
                                          Condition cond,
                                          Label* branch_to) {
   Branch(branch_to, cond, obj_map, Operand(map));
@@ skipping 15 matching lines @@
 
 
 void MacroAssembler::CheckMap(Register obj,
                               Register scratch,
                               Heap::RootListIndex index,
                               Label* fail,
                               SmiCheckType smi_check_type) {
   if (smi_check_type == DO_SMI_CHECK) {
     JumpIfSmi(obj, fail);
   }
-  ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
+  Ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   LoadRoot(at, index);
   Branch(fail, ne, scratch, Operand(at));
 }
 
 
 void MacroAssembler::GetWeakValue(Register value, Handle<WeakCell> cell) {
   li(value, Operand(cell));
-  ld(value, FieldMemOperand(value, WeakCell::kValueOffset));
+  Ld(value, FieldMemOperand(value, WeakCell::kValueOffset));
 }
 
 void MacroAssembler::FPUCanonicalizeNaN(const DoubleRegister dst,
                                         const DoubleRegister src) {
   sub_d(dst, src, kDoubleRegZero);
 }
 
 void MacroAssembler::LoadWeakValue(Register value, Handle<WeakCell> cell,
                                    Label* miss) {
   GetWeakValue(value, cell);
@@ skipping 109 matching lines @@
     Daddu(src_reg, sp,
           Operand((callee_args_count.immediate() + 1) * kPointerSize));
   }
 
   if (FLAG_debug_code) {
     Check(lo, kStackAccessBelowStackPointer, src_reg, Operand(dst_reg));
   }
 
   // Restore caller's frame pointer and return address now as they will be
   // overwritten by the copying loop.
-  ld(ra, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
-  ld(fp, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+  Ld(ra, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
+  Ld(fp, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
 
   // Now copy callee arguments to the caller frame going backwards to avoid
   // callee arguments corruption (source and destination areas could overlap).
 
   // Both src_reg and dst_reg are pointing to the word after the one to copy,
   // so they must be pre-decremented in the loop.
   Register tmp_reg = scratch1;
   Label loop, entry;
   Branch(&entry);
   bind(&loop);
   Dsubu(src_reg, src_reg, Operand(kPointerSize));
   Dsubu(dst_reg, dst_reg, Operand(kPointerSize));
-  ld(tmp_reg, MemOperand(src_reg));
-  sd(tmp_reg, MemOperand(dst_reg));
+  Ld(tmp_reg, MemOperand(src_reg));
+  Sd(tmp_reg, MemOperand(dst_reg));
   bind(&entry);
   Branch(&loop, ne, sp, Operand(src_reg));
 
   // Leave current frame.
   mov(sp, dst_reg);
 }
 
 void MacroAssembler::InvokePrologue(const ParameterCount& expected,
                                     const ParameterCount& actual,
                                     Label* done,
@@ skipping 58 matching lines @@
   }
 }
 
 void MacroAssembler::CheckDebugHook(Register fun, Register new_target,
                                     const ParameterCount& expected,
                                     const ParameterCount& actual) {
   Label skip_hook;
   ExternalReference debug_hook_active =
       ExternalReference::debug_hook_on_function_call_address(isolate());
   li(t0, Operand(debug_hook_active));
-  lb(t0, MemOperand(t0));
+  Lb(t0, MemOperand(t0));
   Branch(&skip_hook, eq, t0, Operand(zero_reg));
   {
     FrameScope frame(this,
                      has_frame() ? StackFrame::NONE : StackFrame::INTERNAL);
     if (expected.is_reg()) {
       SmiTag(expected.reg());
       Push(expected.reg());
     }
     if (actual.is_reg()) {
       SmiTag(actual.reg());
@@ skipping 43 matching lines @@
 
   Label done;
   bool definitely_mismatches = false;
   InvokePrologue(expected, actual, &done, &definitely_mismatches, flag,
                  call_wrapper);
   if (!definitely_mismatches) {
     // We call indirectly through the code field in the function to
     // allow recompilation to take effect without changing any of the
     // call sites.
     Register code = t0;
-    ld(code, FieldMemOperand(function, JSFunction::kCodeEntryOffset));
+    Ld(code, FieldMemOperand(function, JSFunction::kCodeEntryOffset));
     if (flag == CALL_FUNCTION) {
       call_wrapper.BeforeCall(CallSize(code));
       Call(code);
       call_wrapper.AfterCall();
     } else {
       DCHECK(flag == JUMP_FUNCTION);
       Jump(code);
     }
     // Continue here if InvokePrologue does handle the invocation due to
     // mismatched parameter counts.
     bind(&done);
   }
 }
 
 
 void MacroAssembler::InvokeFunction(Register function,
                                     Register new_target,
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper) {
   // You can't call a function without a valid frame.
   DCHECK(flag == JUMP_FUNCTION || has_frame());
 
   // Contract with called JS functions requires that function is passed in a1.
   DCHECK(function.is(a1));
   Register expected_reg = a2;
   Register temp_reg = t0;
-  ld(temp_reg, FieldMemOperand(a1, JSFunction::kSharedFunctionInfoOffset));
-  ld(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
+  Ld(temp_reg, FieldMemOperand(a1, JSFunction::kSharedFunctionInfoOffset));
+  Ld(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
   // The argument count is stored as int32_t on 64-bit platforms.
   // TODO(plind): Smi on 32-bit platforms.
-  lw(expected_reg,
+  Lw(expected_reg,
      FieldMemOperand(temp_reg,
                      SharedFunctionInfo::kFormalParameterCountOffset));
   ParameterCount expected(expected_reg);
   InvokeFunctionCode(a1, new_target, expected, actual, flag, call_wrapper);
 }
 
 
 void MacroAssembler::InvokeFunction(Register function,
                                     const ParameterCount& expected,
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper) {
   // You can't call a function without a valid frame.
   DCHECK(flag == JUMP_FUNCTION || has_frame());
 
   // Contract with called JS functions requires that function is passed in a1.
   DCHECK(function.is(a1));
 
   // Get the function and setup the context.
-  ld(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
+  Ld(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
 
   InvokeFunctionCode(a1, no_reg, expected, actual, flag, call_wrapper);
 }
 
 
 void MacroAssembler::InvokeFunction(Handle<JSFunction> function,
                                     const ParameterCount& expected,
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper) {
   li(a1, function);
   InvokeFunction(a1, expected, actual, flag, call_wrapper);
 }
 
 
 void MacroAssembler::IsObjectJSStringType(Register object,
                                           Register scratch,
                                           Label* fail) {
   DCHECK(kNotStringTag != 0);
 
-  ld(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
-  lbu(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+  Ld(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+  Lbu(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
   And(scratch, scratch, Operand(kIsNotStringMask));
   Branch(fail, ne, scratch, Operand(zero_reg));
 }
 
 
 // ---------------------------------------------------------------------------
 // Support functions.
 
 void MacroAssembler::GetMapConstructor(Register result, Register map,
                                        Register temp, Register temp2) {
   Label done, loop;
   ld(result, FieldMemOperand(map, Map::kConstructorOrBackPointerOffset));
   bind(&loop);
   JumpIfSmi(result, &done);
   GetObjectType(result, temp, temp2);
   Branch(&done, ne, temp2, Operand(MAP_TYPE));
   ld(result, FieldMemOperand(result, Map::kConstructorOrBackPointerOffset));
   Branch(&loop);
   bind(&done);
 }
 
 void MacroAssembler::GetObjectType(Register object,
                                    Register map,
                                    Register type_reg) {
-  ld(map, FieldMemOperand(object, HeapObject::kMapOffset));
-  lbu(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
+  Ld(map, FieldMemOperand(object, HeapObject::kMapOffset));
+  Lbu(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
 }
 
 
 // -----------------------------------------------------------------------------
 // Runtime calls.
 
 void MacroAssembler::CallStub(CodeStub* stub,
                               TypeFeedbackId ast_id,
                               Condition cond,
                               Register r1,
@@ skipping 31 matching lines @@
     JumpIfNotSmi(object, &not_smi);
     // Remove smi tag and convert to double.
     // dsra(scratch1, object, kSmiTagSize);
     dsra32(scratch1, object, 0);
     mtc1(scratch1, result);
     cvt_d_w(result, result);
     Branch(&done);
     bind(&not_smi);
   }
   // Check for heap number and load double value from it.
-  ld(scratch1, FieldMemOperand(object, HeapObject::kMapOffset));
+  Ld(scratch1, FieldMemOperand(object, HeapObject::kMapOffset));
   Branch(not_number, ne, scratch1, Operand(heap_number_map));
 
   if ((flags & AVOID_NANS_AND_INFINITIES) != 0) {
     // If exponent is all ones the number is either a NaN or +/-Infinity.
     Register exponent = scratch1;
     Register mask_reg = scratch2;
-    lwu(exponent, FieldMemOperand(object, HeapNumber::kExponentOffset));
+    Lwu(exponent, FieldMemOperand(object, HeapNumber::kExponentOffset));
     li(mask_reg, HeapNumber::kExponentMask);
 
     And(exponent, exponent, mask_reg);
     Branch(not_number, eq, exponent, Operand(mask_reg));
   }
-  ldc1(result, FieldMemOperand(object, HeapNumber::kValueOffset));
+  Ldc1(result, FieldMemOperand(object, HeapNumber::kValueOffset));
   bind(&done);
 }
 
 
 void MacroAssembler::SmiToDoubleFPURegister(Register smi,
                                             FPURegister value,
                                             Register scratch1) {
   dsra32(scratch1, smi, 0);
   mtc1(scratch1, value);
   cvt_d_w(value, value);
@@ skipping 457 matching lines @@
        zero_reg,
        Operand(zero_reg),
        bd);
 }
 
 void MacroAssembler::SetCounter(StatsCounter* counter, int value,
                                 Register scratch1, Register scratch2) {
   if (FLAG_native_code_counters && counter->Enabled()) {
     li(scratch1, Operand(value));
     li(scratch2, Operand(ExternalReference(counter)));
-    sw(scratch1, MemOperand(scratch2));
+    Sw(scratch1, MemOperand(scratch2));
   }
 }
 
 
 void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,
                                       Register scratch1, Register scratch2) {
   DCHECK(value > 0);
   if (FLAG_native_code_counters && counter->Enabled()) {
     li(scratch2, Operand(ExternalReference(counter)));
-    lw(scratch1, MemOperand(scratch2));
+    Lw(scratch1, MemOperand(scratch2));
     Addu(scratch1, scratch1, Operand(value));
-    sw(scratch1, MemOperand(scratch2));
+    Sw(scratch1, MemOperand(scratch2));
   }
 }
 
 
 void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,
                                       Register scratch1, Register scratch2) {
   DCHECK(value > 0);
   if (FLAG_native_code_counters && counter->Enabled()) {
     li(scratch2, Operand(ExternalReference(counter)));
-    lw(scratch1, MemOperand(scratch2));
+    Lw(scratch1, MemOperand(scratch2));
     Subu(scratch1, scratch1, Operand(value));
-    sw(scratch1, MemOperand(scratch2));
+    Sw(scratch1, MemOperand(scratch2));
   }
 }
 
 
 // -----------------------------------------------------------------------------
 // Debugging.
 
 void MacroAssembler::Assert(Condition cc, BailoutReason reason,
                             Register rs, Operand rt) {
   if (emit_debug_code())
@@ skipping 55 matching lines @@
     while (abort_instructions++ < kExpectedAbortInstructions) {
       nop();
     }
   }
 }
 
 
 void MacroAssembler::LoadContext(Register dst, int context_chain_length) {
   if (context_chain_length > 0) {
     // Move up the chain of contexts to the context containing the slot.
-    ld(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
+    Ld(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
     for (int i = 1; i < context_chain_length; i++) {
-      ld(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
+      Ld(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
     }
   } else {
     // Slot is in the current function context.  Move it into the
     // destination register in case we store into it (the write barrier
     // cannot be allowed to destroy the context in esi).
     Move(dst, cp);
   }
 }
 
 void MacroAssembler::LoadNativeContextSlot(int index, Register dst) {
-  ld(dst, NativeContextMemOperand());
-  ld(dst, ContextMemOperand(dst, index));
+  Ld(dst, NativeContextMemOperand());
+  Ld(dst, ContextMemOperand(dst, index));
 }
 
 
 void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
                                                   Register map,
                                                   Register scratch) {
   // Load the initial map. The global functions all have initial maps.
-  ld(map, FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
+  Ld(map, FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
   if (emit_debug_code()) {
     Label ok, fail;
     CheckMap(map, scratch, Heap::kMetaMapRootIndex, &fail, DO_SMI_CHECK);
     Branch(&ok);
     bind(&fail);
     Abort(kGlobalFunctionsMustHaveInitialMap);
     bind(&ok);
   }
 }
 
@@ skipping 23 matching lines @@
     nop();  // Pad the empty space.
   } else {
     PushStandardFrame(a1);
     nop(Assembler::CODE_AGE_SEQUENCE_NOP);
     nop(Assembler::CODE_AGE_SEQUENCE_NOP);
     nop(Assembler::CODE_AGE_SEQUENCE_NOP);
   }
 }
 
 void MacroAssembler::EmitLoadFeedbackVector(Register vector) {
-  ld(vector, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
-  ld(vector, FieldMemOperand(vector, JSFunction::kFeedbackVectorOffset));
-  ld(vector, FieldMemOperand(vector, Cell::kValueOffset));
+  Ld(vector, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+  Ld(vector, FieldMemOperand(vector, JSFunction::kFeedbackVectorOffset));
+  Ld(vector, FieldMemOperand(vector, Cell::kValueOffset));
 }
 
 
 void MacroAssembler::EnterFrame(StackFrame::Type type,
                                 bool load_constant_pool_pointer_reg) {
   // Out-of-line constant pool not implemented on mips64.
   UNREACHABLE();
 }
 
 
 void MacroAssembler::EnterFrame(StackFrame::Type type) {
   int stack_offset, fp_offset;
   if (type == StackFrame::INTERNAL) {
     stack_offset = -4 * kPointerSize;
     fp_offset = 2 * kPointerSize;
   } else {
     stack_offset = -3 * kPointerSize;
     fp_offset = 1 * kPointerSize;
   }
   daddiu(sp, sp, stack_offset);
   stack_offset = -stack_offset - kPointerSize;
-  sd(ra, MemOperand(sp, stack_offset));
+  Sd(ra, MemOperand(sp, stack_offset));
   stack_offset -= kPointerSize;
-  sd(fp, MemOperand(sp, stack_offset));
+  Sd(fp, MemOperand(sp, stack_offset));
   stack_offset -= kPointerSize;
   li(t9, Operand(StackFrame::TypeToMarker(type)));
-  sd(t9, MemOperand(sp, stack_offset));
+  Sd(t9, MemOperand(sp, stack_offset));
   if (type == StackFrame::INTERNAL) {
     DCHECK_EQ(stack_offset, kPointerSize);
     li(t9, Operand(CodeObject()));
-    sd(t9, MemOperand(sp, 0));
+    Sd(t9, MemOperand(sp, 0));
   } else {
     DCHECK_EQ(stack_offset, 0);
   }
   // Adjust FP to point to saved FP.
   Daddu(fp, sp, Operand(fp_offset));
 }
 
 
 void MacroAssembler::LeaveFrame(StackFrame::Type type) {
   daddiu(sp, fp, 2 * kPointerSize);
-  ld(ra, MemOperand(fp, 1 * kPointerSize));
-  ld(fp, MemOperand(fp, 0 * kPointerSize));
+  Ld(ra, MemOperand(fp, 1 * kPointerSize));
+  Ld(fp, MemOperand(fp, 0 * kPointerSize));
 }
 
 void MacroAssembler::EnterBuiltinFrame(Register context, Register target,
                                        Register argc) {
   Push(ra, fp);
   Move(fp, sp);
   Push(context, target, argc);
 }
 
 void MacroAssembler::LeaveBuiltinFrame(Register context, Register target,
@@ skipping 17 matching lines @@
   // [fp + 1 (==kCallerPCOffset)] - saved old ra
   // [fp + 0 (==kCallerFPOffset)] - saved old fp
   // [fp - 1 StackFrame::EXIT Smi
   // [fp - 2 (==kSPOffset)] - sp of the called function
   // [fp - 3 (==kCodeOffset)] - CodeObject
   // fp - (2 + stack_space + alignment) == sp == [fp - kSPOffset] - top of the
   //   new stack (will contain saved ra)
 
   // Save registers and reserve room for saved entry sp and code object.
   daddiu(sp, sp, -2 * kPointerSize - ExitFrameConstants::kFixedFrameSizeFromFp);
-  sd(ra, MemOperand(sp, 4 * kPointerSize));
-  sd(fp, MemOperand(sp, 3 * kPointerSize));
+  Sd(ra, MemOperand(sp, 4 * kPointerSize));
+  Sd(fp, MemOperand(sp, 3 * kPointerSize));
   li(at, Operand(StackFrame::TypeToMarker(frame_type)));
-  sd(at, MemOperand(sp, 2 * kPointerSize));
+  Sd(at, MemOperand(sp, 2 * kPointerSize));
   // Set up new frame pointer.
   daddiu(fp, sp, ExitFrameConstants::kFixedFrameSizeFromFp);
 
   if (emit_debug_code()) {
-    sd(zero_reg, MemOperand(fp, ExitFrameConstants::kSPOffset));
+    Sd(zero_reg, MemOperand(fp, ExitFrameConstants::kSPOffset));
   }
 
   // Accessed from ExitFrame::code_slot.
   li(t8, Operand(CodeObject()), CONSTANT_SIZE);
-  sd(t8, MemOperand(fp, ExitFrameConstants::kCodeOffset));
+  Sd(t8, MemOperand(fp, ExitFrameConstants::kCodeOffset));
 
   // Save the frame pointer and the context in top.
   li(t8, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
-  sd(fp, MemOperand(t8));
+  Sd(fp, MemOperand(t8));
   li(t8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-  sd(cp, MemOperand(t8));
+  Sd(cp, MemOperand(t8));
 
   const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
   if (save_doubles) {
     // The stack is already aligned to 0 modulo 8 for stores with sdc1.
     int kNumOfSavedRegisters = FPURegister::kMaxNumRegisters / 2;
     int space = kNumOfSavedRegisters * kDoubleSize;
     Dsubu(sp, sp, Operand(space));
     // Remember: we only need to save every 2nd double FPU value.
     for (int i = 0; i < kNumOfSavedRegisters; i++) {
       FPURegister reg = FPURegister::from_code(2 * i);
-      sdc1(reg, MemOperand(sp, i * kDoubleSize));
+      Sdc1(reg, MemOperand(sp, i * kDoubleSize));
     }
   }
 
   // Reserve place for the return address, stack space and an optional slot
   // (used by the DirectCEntryStub to hold the return value if a struct is
   // returned) and align the frame preparing for calling the runtime function.
   DCHECK(stack_space >= 0);
   Dsubu(sp, sp, Operand((stack_space + 2) * kPointerSize));
   if (frame_alignment > 0) {
     DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
     And(sp, sp, Operand(-frame_alignment));  // Align stack.
   }
 
   // Set the exit frame sp value to point just before the return address
   // location.
   daddiu(at, sp, kPointerSize);
-  sd(at, MemOperand(fp, ExitFrameConstants::kSPOffset));
+  Sd(at, MemOperand(fp, ExitFrameConstants::kSPOffset));
 }
 
 
 void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
                                     bool restore_context, bool do_return,
                                     bool argument_count_is_length) {
   // Optionally restore all double registers.
   if (save_doubles) {
     // Remember: we only need to restore every 2nd double FPU value.
     int kNumOfSavedRegisters = FPURegister::kMaxNumRegisters / 2;
     Dsubu(t8, fp, Operand(ExitFrameConstants::kFixedFrameSizeFromFp +
                           kNumOfSavedRegisters * kDoubleSize));
     for (int i = 0; i < kNumOfSavedRegisters; i++) {
       FPURegister reg = FPURegister::from_code(2 * i);
-      ldc1(reg, MemOperand(t8, i  * kDoubleSize));
+      Ldc1(reg, MemOperand(t8, i * kDoubleSize));
     }
   }
 
   // Clear top frame.
   li(t8, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
-  sd(zero_reg, MemOperand(t8));
+  Sd(zero_reg, MemOperand(t8));
 
   // Restore current context from top and clear it in debug mode.
   if (restore_context) {
     li(t8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-    ld(cp, MemOperand(t8));
+    Ld(cp, MemOperand(t8));
   }
 #ifdef DEBUG
   li(t8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-  sd(a3, MemOperand(t8));
+  Sd(a3, MemOperand(t8));
 #endif
 
   // Pop the arguments, restore registers, and return.
   mov(sp, fp);  // Respect ABI stack constraint.
-  ld(fp, MemOperand(sp, ExitFrameConstants::kCallerFPOffset));
-  ld(ra, MemOperand(sp, ExitFrameConstants::kCallerPCOffset));
+  Ld(fp, MemOperand(sp, ExitFrameConstants::kCallerFPOffset));
+  Ld(ra, MemOperand(sp, ExitFrameConstants::kCallerPCOffset));
 
   if (argument_count.is_valid()) {
     if (argument_count_is_length) {
       daddu(sp, sp, argument_count);
     } else {
       Dlsa(sp, sp, argument_count, kPointerSizeLog2, t8);
     }
   }
 
   if (do_return) {
@@ skipping 69 matching lines @@
     DCHECK(!dst.is(overflow));
     DCHECK(!src.is(overflow));
     SmiTag(dst, src);
     xor_(overflow, dst, src);  // Overflow if (value ^ 2 * value) < 0.
   }
 }
 
 
 void MacroAssembler::SmiLoadUntag(Register dst, MemOperand src) {
   if (SmiValuesAre32Bits()) {
-    lw(dst, UntagSmiMemOperand(src.rm(), src.offset()));
+    Lw(dst, UntagSmiMemOperand(src.rm(), src.offset()));
   } else {
-    lw(dst, src);
+    Lw(dst, src);
     SmiUntag(dst);
   }
 }
 
 
 void MacroAssembler::SmiLoadScale(Register dst, MemOperand src, int scale) {
   if (SmiValuesAre32Bits()) {
     // TODO(plind): not clear if lw or ld faster here, need micro-benchmark.
-    lw(dst, UntagSmiMemOperand(src.rm(), src.offset()));
+    Lw(dst, UntagSmiMemOperand(src.rm(), src.offset()));
     dsll(dst, dst, scale);
   } else {
-    lw(dst, src);
+    Lw(dst, src);
     DCHECK(scale >= kSmiTagSize);
     sll(dst, dst, scale - kSmiTagSize);
   }
 }
 
 
 // Returns 2 values: the Smi and a scaled version of the int within the Smi.
 void MacroAssembler::SmiLoadWithScale(Register d_smi,
                                       Register d_scaled,
                                       MemOperand src,
                                       int scale) {
   if (SmiValuesAre32Bits()) {
-    ld(d_smi, src);
+    Ld(d_smi, src);
     dsra(d_scaled, d_smi, kSmiShift - scale);
   } else {
-    lw(d_smi, src);
+    Lw(d_smi, src);
     DCHECK(scale >= kSmiTagSize);
     sll(d_scaled, d_smi, scale - kSmiTagSize);
   }
 }
 
 
 // Returns 2 values: the untagged Smi (int32) and scaled version of that int.
 void MacroAssembler::SmiLoadUntagWithScale(Register d_int,
                                            Register d_scaled,
                                            MemOperand src,
                                            int scale) {
   if (SmiValuesAre32Bits()) {
-    lw(d_int, UntagSmiMemOperand(src.rm(), src.offset()));
+    Lw(d_int, UntagSmiMemOperand(src.rm(), src.offset()));
     dsll(d_scaled, d_int, scale);
   } else {
-    lw(d_int, src);
+    Lw(d_int, src);
     // Need both the int and the scaled in, so use two instructions.
     SmiUntag(d_int);
     sll(d_scaled, d_int, scale);
   }
 }
 
 
 void MacroAssembler::UntagAndJumpIfSmi(Register dst,
                                        Register src,
                                        Label* smi_case) {
@@ skipping 118 matching lines @@
   bind(&done);
 }
 
 void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
                                                      Register scratch) {
   if (emit_debug_code()) {
     Label done_checking;
     AssertNotSmi(object);
     LoadRoot(scratch, Heap::kUndefinedValueRootIndex);
     Branch(&done_checking, eq, object, Operand(scratch));
-    ld(t8, FieldMemOperand(object, HeapObject::kMapOffset));
+    Ld(t8, FieldMemOperand(object, HeapObject::kMapOffset));
     LoadRoot(scratch, Heap::kAllocationSiteMapRootIndex);
     Assert(eq, kExpectedUndefinedOrCell, t8, Operand(scratch));
     bind(&done_checking);
   }
 }
 
 
 void MacroAssembler::AssertIsRoot(Register reg, Heap::RootListIndex index) {
   if (emit_debug_code()) {
     DCHECK(!reg.is(at));
     LoadRoot(at, index);
     Check(eq, kHeapNumberMapRegisterClobbered, reg, Operand(at));
   }
 }
 
 
 void MacroAssembler::JumpIfNotHeapNumber(Register object,
                                          Register heap_number_map,
                                          Register scratch,
                                          Label* on_not_heap_number) {
-  ld(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+  Ld(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
   AssertIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   Branch(on_not_heap_number, ne, scratch, Operand(heap_number_map));
 }
 
 
 void MacroAssembler::JumpIfNonSmisNotBothSequentialOneByteStrings(
     Register first, Register second, Register scratch1, Register scratch2,
     Label* failure) {
   // Test that both first and second are sequential one-byte strings.
   // Assume that they are non-smis.
-  ld(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
-  ld(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
-  lbu(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
-  lbu(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
+  Ld(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
+  Ld(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
+  Lbu(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
+  Lbu(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
 
   JumpIfBothInstanceTypesAreNotSequentialOneByte(scratch1, scratch2, scratch1,
                                                  scratch2, failure);
 }
 
 
 void MacroAssembler::JumpIfNotBothSequentialOneByteStrings(Register first,
                                                            Register second,
                                                            Register scratch1,
                                                            Register scratch2,
@@ skipping 213 matching lines @@
 
 void MacroAssembler::EmitSeqStringSetCharCheck(Register string,
                                                Register index,
                                                Register value,
                                                Register scratch,
                                                uint32_t encoding_mask) {
   Label is_object;
   SmiTst(string, at);
   Check(ne, kNonObject, at, Operand(zero_reg));
 
-  ld(at, FieldMemOperand(string, HeapObject::kMapOffset));
-  lbu(at, FieldMemOperand(at, Map::kInstanceTypeOffset));
+  Ld(at, FieldMemOperand(string, HeapObject::kMapOffset));
+  Lbu(at, FieldMemOperand(at, Map::kInstanceTypeOffset));
 
   andi(at, at, kStringRepresentationMask | kStringEncodingMask);
   li(scratch, Operand(encoding_mask));
   Check(eq, kUnexpectedStringType, at, Operand(scratch));
 
   // TODO(plind): requires Smi size check code for mips32.
 
-  ld(at, FieldMemOperand(string, String::kLengthOffset));
+  Ld(at, FieldMemOperand(string, String::kLengthOffset));
   Check(lt, kIndexIsTooLarge, index, Operand(at));
 
   DCHECK(Smi::kZero == 0);
   Check(ge, kIndexIsNegative, index, Operand(zero_reg));
 }
 
 
 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
                                           int num_double_arguments,
                                           Register scratch) {
   int frame_alignment = ActivationFrameAlignment();
 
   // n64: Up to eight simple arguments in a0..a3, a4..a7, No argument slots.
   // O32: Up to four simple arguments are passed in registers a0..a3.
   // Those four arguments must have reserved argument slots on the stack for
   // mips, even though those argument slots are not normally used.
   // Both ABIs: Remaining arguments are pushed on the stack, above (higher
   // address than) the (O32) argument slots. (arg slot calculation handled by
   // CalculateStackPassedWords()).
   int stack_passed_arguments = CalculateStackPassedWords(
       num_reg_arguments, num_double_arguments);
   if (frame_alignment > kPointerSize) {
     // Make stack end at alignment and make room for num_arguments - 4 words
     // and the original value of sp.
     mov(scratch, sp);
     Dsubu(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize));
     DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
     And(sp, sp, Operand(-frame_alignment));
-    sd(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
+    Sd(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
   } else {
     Dsubu(sp, sp, Operand(stack_passed_arguments * kPointerSize));
   }
 }
 
 
 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
                                           Register scratch) {
   PrepareCallCFunction(num_reg_arguments, 0, scratch);
 }
@@ skipping 61 matching lines @@
     mov(t9, function);
     function = t9;
   }
 
   Call(function);
 
   int stack_passed_arguments = CalculateStackPassedWords(
       num_reg_arguments, num_double_arguments);
 
   if (base::OS::ActivationFrameAlignment() > kPointerSize) {
-    ld(sp, MemOperand(sp, stack_passed_arguments * kPointerSize));
+    Ld(sp, MemOperand(sp, stack_passed_arguments * kPointerSize));
   } else {
     Daddu(sp, sp, Operand(stack_passed_arguments * kPointerSize));
   }
 }
 
 
 #undef BRANCH_ARGS_CHECK
 
 
 void MacroAssembler::CheckPageFlag(
     Register object,
     Register scratch,
     int mask,
     Condition cc,
     Label* condition_met) {
   And(scratch, object, Operand(~Page::kPageAlignmentMask));
-  ld(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
+  Ld(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
   And(scratch, scratch, Operand(mask));
   Branch(condition_met, cc, scratch, Operand(zero_reg));
 }
 
 
 void MacroAssembler::JumpIfBlack(Register object,
                                  Register scratch0,
                                  Register scratch1,
                                  Label* on_black) {
   HasColor(object, scratch0, scratch1, on_black, 1, 1);  // kBlackBitPattern.
@@ skipping 56 matching lines @@
   DCHECK(strcmp(Marking::kGreyBitPattern, "10") == 0);
   DCHECK(strcmp(Marking::kImpossibleBitPattern, "01") == 0);
 
   // Since both black and grey have a 1 in the first position and white does
   // not have a 1 there we only need to check one bit.
   // Note that we are using a 4-byte aligned 8-byte load.
   if (emit_debug_code()) {
     LoadWordPair(load_scratch,
                  MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
   } else {
-    lwu(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+    Lwu(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
   }
   And(t8, mask_scratch, load_scratch);
   Branch(value_is_white, eq, t8, Operand(zero_reg));
 }
 
 
 void MacroAssembler::LoadInstanceDescriptors(Register map,
                                              Register descriptors) {
-  ld(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
+  Ld(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
 }
 
 
 void MacroAssembler::NumberOfOwnDescriptors(Register dst, Register map) {
-  lwu(dst, FieldMemOperand(map, Map::kBitField3Offset));
+  Lwu(dst, FieldMemOperand(map, Map::kBitField3Offset));
   DecodeField<Map::NumberOfOwnDescriptorsBits>(dst);
 }
 
 
 void MacroAssembler::EnumLength(Register dst, Register map) {
   STATIC_ASSERT(Map::EnumLengthBits::kShift == 0);
-  lwu(dst, FieldMemOperand(map, Map::kBitField3Offset));
+  Lwu(dst, FieldMemOperand(map, Map::kBitField3Offset));
   And(dst, dst, Operand(Map::EnumLengthBits::kMask));
   SmiTag(dst);
 }
 
 
 void MacroAssembler::LoadAccessor(Register dst, Register holder,
                                   int accessor_index,
                                   AccessorComponent accessor) {
-  ld(dst, FieldMemOperand(holder, HeapObject::kMapOffset));
+  Ld(dst, FieldMemOperand(holder, HeapObject::kMapOffset));
   LoadInstanceDescriptors(dst, dst);
-  ld(dst,
+  Ld(dst,
      FieldMemOperand(dst, DescriptorArray::GetValueOffset(accessor_index)));
   int offset = accessor == ACCESSOR_GETTER ? AccessorPair::kGetterOffset
                                            : AccessorPair::kSetterOffset;
-  ld(dst, FieldMemOperand(dst, offset));
+  Ld(dst, FieldMemOperand(dst, offset));
 }
 
 
 void MacroAssembler::CheckEnumCache(Label* call_runtime) {
   Register null_value = a5;
   Register  empty_fixed_array_value = a6;
   LoadRoot(empty_fixed_array_value, Heap::kEmptyFixedArrayRootIndex);
   Label next, start;
   mov(a2, a0);
 
   // Check if the enum length field is properly initialized, indicating that
   // there is an enum cache.
-  ld(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
+  Ld(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
 
   EnumLength(a3, a1);
   Branch(
       call_runtime, eq, a3, Operand(Smi::FromInt(kInvalidEnumCacheSentinel)));
 
   LoadRoot(null_value, Heap::kNullValueRootIndex);
   jmp(&start);
 
   bind(&next);
-  ld(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
+  Ld(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
 
   // For all objects but the receiver, check that the cache is empty.
   EnumLength(a3, a1);
   Branch(call_runtime, ne, a3, Operand(Smi::kZero));
 
   bind(&start);
 
   // Check that there are no elements. Register a2 contains the current JS
   // object we've reached through the prototype chain.
   Label no_elements;
-  ld(a2, FieldMemOperand(a2, JSObject::kElementsOffset));
+  Ld(a2, FieldMemOperand(a2, JSObject::kElementsOffset));
   Branch(&no_elements, eq, a2, Operand(empty_fixed_array_value));
 
   // Second chance, the object may be using the empty slow element dictionary.
   LoadRoot(at, Heap::kEmptySlowElementDictionaryRootIndex);
   Branch(call_runtime, ne, a2, Operand(at));
 
   bind(&no_elements);
-  ld(a2, FieldMemOperand(a1, Map::kPrototypeOffset));
+  Ld(a2, FieldMemOperand(a1, Map::kPrototypeOffset));
   Branch(&next, ne, a2, Operand(null_value));
 }
 
 
 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) {
   DCHECK(!output_reg.is(input_reg));
   Label done;
   li(output_reg, Operand(255));
   // Normal branch: nop in delay slot.
   Branch(&done, gt, input_reg, Operand(output_reg));
@@ skipping 43 matching lines @@
   const int kMementoMapOffset = JSArray::kSize - kHeapObjectTag;
   const int kMementoLastWordOffset =
       kMementoMapOffset + AllocationMemento::kSize - kPointerSize;
 
   // Bail out if the object is not in new space.
   JumpIfNotInNewSpace(receiver_reg, scratch_reg, no_memento_found);
   // If the object is in new space, we need to check whether it is on the same
   // page as the current top.
   Daddu(scratch_reg, receiver_reg, Operand(kMementoLastWordOffset));
   li(at, Operand(new_space_allocation_top_adr));
-  ld(at, MemOperand(at));
+  Ld(at, MemOperand(at));
   Xor(scratch_reg, scratch_reg, Operand(at));
   And(scratch_reg, scratch_reg, Operand(~Page::kPageAlignmentMask));
   Branch(&top_check, eq, scratch_reg, Operand(zero_reg));
   // The object is on a different page than allocation top. Bail out if the
   // object sits on the page boundary as no memento can follow and we cannot
   // touch the memory following it.
   Daddu(scratch_reg, receiver_reg, Operand(kMementoLastWordOffset));
   Xor(scratch_reg, scratch_reg, Operand(receiver_reg));
   And(scratch_reg, scratch_reg, Operand(~Page::kPageAlignmentMask));
   Branch(no_memento_found, ne, scratch_reg, Operand(zero_reg));
   // Continue with the actual map check.
   jmp(&map_check);
   // If top is on the same page as the current object, we need to check whether
   // we are below top.
   bind(&top_check);
   Daddu(scratch_reg, receiver_reg, Operand(kMementoLastWordOffset));
   li(at, Operand(new_space_allocation_top_adr));
-  ld(at, MemOperand(at));
+  Ld(at, MemOperand(at));
   Branch(no_memento_found, ge, scratch_reg, Operand(at));
   // Memento map check.
   bind(&map_check);
-  ld(scratch_reg, MemOperand(receiver_reg, kMementoMapOffset));
+  Ld(scratch_reg, MemOperand(receiver_reg, kMementoMapOffset));
   Branch(no_memento_found, ne, scratch_reg,
          Operand(isolate()->factory()->allocation_memento_map()));
 }
 
 
 Register GetRegisterThatIsNotOneOf(Register reg1,
                                    Register reg2,
                                    Register reg3,
                                    Register reg4,
                                    Register reg5,
@@ skipping 103 matching lines @@
   if (mag.shift > 0) sra(result, result, mag.shift);
   srl(at, dividend, 31);
   Addu(result, result, Operand(at));
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_MIPS64