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Side by Side Diff: src/mips64/constants-mips64.h

Issue 2829073002: MIPS64: Move load/store instructions to macro-assembler. (Closed)
Patch Set: Created 3 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_CONSTANTS_H_ 5 #ifndef V8_MIPS_CONSTANTS_H_
6 #define V8_MIPS_CONSTANTS_H_ 6 #define V8_MIPS_CONSTANTS_H_
7 7
8 #include "src/base/logging.h" 8 #include "src/base/logging.h"
9 #include "src/base/macros.h" 9 #include "src/base/macros.h"
10 #include "src/globals.h" 10 #include "src/globals.h"
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1172 // ----------------------------------------------------------------------------- 1172 // -----------------------------------------------------------------------------
1173 // Specific instructions, constants, and masks. 1173 // Specific instructions, constants, and masks.
1174 // These constants are declared in assembler-mips.cc, as they use named 1174 // These constants are declared in assembler-mips.cc, as they use named
1175 // registers and other constants. 1175 // registers and other constants.
1176 1176
1177 // addiu(sp, sp, 4) aka Pop() operation or part of Pop(r) 1177 // addiu(sp, sp, 4) aka Pop() operation or part of Pop(r)
1178 // operations as post-increment of sp. 1178 // operations as post-increment of sp.
1179 extern const Instr kPopInstruction; 1179 extern const Instr kPopInstruction;
1180 // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp. 1180 // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
1181 extern const Instr kPushInstruction; 1181 extern const Instr kPushInstruction;
1182 // sw(r, MemOperand(sp, 0)) 1182 // Sw(r, MemOperand(sp, 0))
1183 extern const Instr kPushRegPattern; 1183 extern const Instr kPushRegPattern;
1184 // lw(r, MemOperand(sp, 0)) 1184 // Lw(r, MemOperand(sp, 0))
1185 extern const Instr kPopRegPattern; 1185 extern const Instr kPopRegPattern;
1186 extern const Instr kLwRegFpOffsetPattern; 1186 extern const Instr kLwRegFpOffsetPattern;
1187 extern const Instr kSwRegFpOffsetPattern; 1187 extern const Instr kSwRegFpOffsetPattern;
1188 extern const Instr kLwRegFpNegOffsetPattern; 1188 extern const Instr kLwRegFpNegOffsetPattern;
1189 extern const Instr kSwRegFpNegOffsetPattern; 1189 extern const Instr kSwRegFpNegOffsetPattern;
1190 // A mask for the Rt register for push, pop, lw, sw instructions. 1190 // A mask for the Rt register for push, pop, lw, sw instructions.
1191 extern const Instr kRtMask; 1191 extern const Instr kRtMask;
1192 extern const Instr kLwSwInstrTypeMask; 1192 extern const Instr kLwSwInstrTypeMask;
1193 extern const Instr kLwSwInstrArgumentMask; 1193 extern const Instr kLwSwInstrArgumentMask;
1194 extern const Instr kLwSwOffsetMask; 1194 extern const Instr kLwSwOffsetMask;
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1677 // C/C++ argument slots size. 1677 // C/C++ argument slots size.
1678 const int kCArgSlotCount = 0; 1678 const int kCArgSlotCount = 0;
1679 1679
1680 // TODO(plind): below should be based on kPointerSize 1680 // TODO(plind): below should be based on kPointerSize
1681 // TODO(plind): find all usages and remove the needless instructions for n64. 1681 // TODO(plind): find all usages and remove the needless instructions for n64.
1682 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2; 1682 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2;
1683 1683
1684 const int kInvalidStackOffset = -1; 1684 const int kInvalidStackOffset = -1;
1685 const int kBranchReturnOffset = 2 * Instruction::kInstrSize; 1685 const int kBranchReturnOffset = 2 * Instruction::kInstrSize;
1686 1686
1687 static const int kNegOffset = 0x00008000;
1688
1687 InstructionBase::Type InstructionBase::InstructionType() const { 1689 InstructionBase::Type InstructionBase::InstructionType() const {
1688 switch (OpcodeFieldRaw()) { 1690 switch (OpcodeFieldRaw()) {
1689 case SPECIAL: 1691 case SPECIAL:
1690 if (FunctionFieldToBitNumber(FunctionFieldRaw()) & 1692 if (FunctionFieldToBitNumber(FunctionFieldRaw()) &
1691 kFunctionFieldRegisterTypeMask) { 1693 kFunctionFieldRegisterTypeMask) {
1692 return kRegisterType; 1694 return kRegisterType;
1693 } 1695 }
1694 return kUnsupported; 1696 return kUnsupported;
1695 case SPECIAL2: 1697 case SPECIAL2:
1696 switch (FunctionFieldRaw()) { 1698 switch (FunctionFieldRaw()) {
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1906 } 1908 }
1907 break; 1909 break;
1908 default: 1910 default:
1909 return false; 1911 return false;
1910 } 1912 }
1911 } 1913 }
1912 } // namespace internal 1914 } // namespace internal
1913 } // namespace v8 1915 } // namespace v8
1914 1916
1915 #endif // #ifndef V8_MIPS_CONSTANTS_H_ 1917 #endif // #ifndef V8_MIPS_CONSTANTS_H_
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