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1 // Copyright 2016 the V8 project authors. All rights reserved. | 1 // Copyright 2016 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/simd-scalar-lowering.h" | 5 #include "src/compiler/simd-scalar-lowering.h" |
6 #include "src/compiler/diamond.h" | 6 #include "src/compiler/diamond.h" |
7 #include "src/compiler/linkage.h" | 7 #include "src/compiler/linkage.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
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89 V(F32x4Splat) \ | 89 V(F32x4Splat) \ |
90 V(F32x4ExtractLane) \ | 90 V(F32x4ExtractLane) \ |
91 V(F32x4ReplaceLane) \ | 91 V(F32x4ReplaceLane) \ |
92 V(F32x4SConvertI32x4) \ | 92 V(F32x4SConvertI32x4) \ |
93 V(F32x4UConvertI32x4) \ | 93 V(F32x4UConvertI32x4) \ |
94 V(F32x4Abs) \ | 94 V(F32x4Abs) \ |
95 V(F32x4Neg) \ | 95 V(F32x4Neg) \ |
96 V(F32x4Add) \ | 96 V(F32x4Add) \ |
97 V(F32x4Sub) \ | 97 V(F32x4Sub) \ |
98 V(F32x4Mul) \ | 98 V(F32x4Mul) \ |
99 V(F32x4Div) \ | |
100 V(F32x4Min) \ | 99 V(F32x4Min) \ |
101 V(F32x4Max) | 100 V(F32x4Max) |
102 | 101 |
103 #define FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(V) \ | 102 #define FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(V) \ |
104 V(F32x4Eq) \ | 103 V(F32x4Eq) \ |
105 V(F32x4Ne) \ | 104 V(F32x4Ne) \ |
106 V(F32x4Lt) \ | 105 V(F32x4Lt) \ |
107 V(F32x4Le) \ | 106 V(F32x4Le) \ |
108 V(F32x4Gt) \ | 107 V(F32x4Gt) \ |
109 V(F32x4Ge) | 108 V(F32x4Ge) |
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639 break; | 638 break; |
640 } | 639 } |
641 #define F32X4_BINOP_CASE(name) \ | 640 #define F32X4_BINOP_CASE(name) \ |
642 case IrOpcode::kF32x4##name: { \ | 641 case IrOpcode::kF32x4##name: { \ |
643 LowerBinaryOp(node, rep_type, machine()->Float32##name()); \ | 642 LowerBinaryOp(node, rep_type, machine()->Float32##name()); \ |
644 break; \ | 643 break; \ |
645 } | 644 } |
646 F32X4_BINOP_CASE(Add) | 645 F32X4_BINOP_CASE(Add) |
647 F32X4_BINOP_CASE(Sub) | 646 F32X4_BINOP_CASE(Sub) |
648 F32X4_BINOP_CASE(Mul) | 647 F32X4_BINOP_CASE(Mul) |
649 F32X4_BINOP_CASE(Div) | |
650 F32X4_BINOP_CASE(Min) | 648 F32X4_BINOP_CASE(Min) |
651 F32X4_BINOP_CASE(Max) | 649 F32X4_BINOP_CASE(Max) |
652 #undef F32X4_BINOP_CASE | 650 #undef F32X4_BINOP_CASE |
653 #define F32X4_UNOP_CASE(name) \ | 651 #define F32X4_UNOP_CASE(name) \ |
654 case IrOpcode::kF32x4##name: { \ | 652 case IrOpcode::kF32x4##name: { \ |
655 LowerUnaryOp(node, rep_type, machine()->Float32##name()); \ | 653 LowerUnaryOp(node, rep_type, machine()->Float32##name()); \ |
656 break; \ | 654 break; \ |
657 } | 655 } |
658 F32X4_UNOP_CASE(Abs) | 656 F32X4_UNOP_CASE(Abs) |
659 F32X4_UNOP_CASE(Neg) | 657 F32X4_UNOP_CASE(Neg) |
660 F32X4_UNOP_CASE(Sqrt) | |
661 #undef F32x4_UNOP_CASE | 658 #undef F32x4_UNOP_CASE |
662 case IrOpcode::kF32x4SConvertI32x4: { | 659 case IrOpcode::kF32x4SConvertI32x4: { |
663 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundInt32ToFloat32()); | 660 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundInt32ToFloat32()); |
664 break; | 661 break; |
665 } | 662 } |
666 case IrOpcode::kF32x4UConvertI32x4: { | 663 case IrOpcode::kF32x4UConvertI32x4: { |
667 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundUint32ToFloat32()); | 664 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundUint32ToFloat32()); |
668 break; | 665 break; |
669 } | 666 } |
670 case IrOpcode::kI32x4Splat: | 667 case IrOpcode::kI32x4Splat: |
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865 } else { | 862 } else { |
866 UNREACHABLE(); | 863 UNREACHABLE(); |
867 } | 864 } |
868 } | 865 } |
869 ReplaceNode(phi, rep_nodes); | 866 ReplaceNode(phi, rep_nodes); |
870 } | 867 } |
871 } | 868 } |
872 } // namespace compiler | 869 } // namespace compiler |
873 } // namespace internal | 870 } // namespace internal |
874 } // namespace v8 | 871 } // namespace v8 |
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